diff options
Diffstat (limited to 'include/linux/platform_data')
40 files changed, 1481 insertions, 78 deletions
diff --git a/include/linux/platform_data/ad5449.h b/include/linux/platform_data/ad5449.h new file mode 100644 index 000000000000..bd712bd4b94e --- /dev/null +++ b/include/linux/platform_data/ad5449.h @@ -0,0 +1,40 @@ +/* + * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog + * Converter driver. + * + * Copyright 2012 Analog Devices Inc. + * Author: Lars-Peter Clausen <lars@metafoo.de> + * + * Licensed under the GPL-2. + */ + +#ifndef __LINUX_PLATFORM_DATA_AD5449_H__ +#define __LINUX_PLATFORM_DATA_AD5449_H__ + +/** + * enum ad5449_sdo_mode - AD5449 SDO pin configuration + * @AD5449_SDO_DRIVE_FULL: Drive the SDO pin with full strength. + * @AD5449_SDO_DRIVE_WEAK: Drive the SDO pin with not full strength. + * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode. + * @AD5449_SDO_DISABLED: Disable the SDO pin, in this mode it is not possible to + * read back from the device. + */ +enum ad5449_sdo_mode { + AD5449_SDO_DRIVE_FULL = 0x0, + AD5449_SDO_DRIVE_WEAK = 0x1, + AD5449_SDO_OPEN_DRAIN = 0x2, + AD5449_SDO_DISABLED = 0x3, +}; + +/** + * struct ad5449_platform_data - Platform data for the ad5449 DAC driver + * @sdo_mode: SDO pin mode + * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the + * outputs to midscale (true) or to zero scale(false). + */ +struct ad5449_platform_data { + enum ad5449_sdo_mode sdo_mode; + bool hardware_clear_to_midscale; +}; + +#endif diff --git a/include/linux/platform_data/ad7298.h b/include/linux/platform_data/ad7298.h new file mode 100644 index 000000000000..fbf8adf1363a --- /dev/null +++ b/include/linux/platform_data/ad7298.h @@ -0,0 +1,20 @@ +/* + * AD7298 SPI ADC driver + * + * Copyright 2011 Analog Devices Inc. + * + * Licensed under the GPL-2. + */ + +#ifndef __LINUX_PLATFORM_DATA_AD7298_H__ +#define __LINUX_PLATFORM_DATA_AD7298_H__ + +/** + * struct ad7298_platform_data - Platform data for the ad7298 ADC driver + * @ext_ref: Whether to use an external reference voltage. + **/ +struct ad7298_platform_data { + bool ext_ref; +}; + +#endif /* IIO_ADC_AD7298_H_ */ diff --git a/include/linux/platform_data/ad7793.h b/include/linux/platform_data/ad7793.h new file mode 100644 index 000000000000..7ea6751aae6d --- /dev/null +++ b/include/linux/platform_data/ad7793.h @@ -0,0 +1,112 @@ +/* + * AD7792/AD7793 SPI ADC driver + * + * Copyright 2011 Analog Devices Inc. + * + * Licensed under the GPL-2. + */ +#ifndef __LINUX_PLATFORM_DATA_AD7793_H__ +#define __LINUX_PLATFORM_DATA_AD7793_H__ + +/** + * enum ad7793_clock_source - AD7793 clock source selection + * @AD7793_CLK_SRC_INT: Internal 64 kHz clock, not available at the CLK pin. + * @AD7793_CLK_SRC_INT_CO: Internal 64 kHz clock, available at the CLK pin. + * @AD7793_CLK_SRC_EXT: Use external clock. + * @AD7793_CLK_SRC_EXT_DIV2: Use external clock divided by 2. + */ +enum ad7793_clock_source { + AD7793_CLK_SRC_INT, + AD7793_CLK_SRC_INT_CO, + AD7793_CLK_SRC_EXT, + AD7793_CLK_SRC_EXT_DIV2, +}; + +/** + * enum ad7793_bias_voltage - AD7793 bias voltage selection + * @AD7793_BIAS_VOLTAGE_DISABLED: Bias voltage generator disabled + * @AD7793_BIAS_VOLTAGE_AIN1: Bias voltage connected to AIN1(-). + * @AD7793_BIAS_VOLTAGE_AIN2: Bias voltage connected to AIN2(-). + * @AD7793_BIAS_VOLTAGE_AIN3: Bias voltage connected to AIN3(-). + * Only valid for AD7795/AD7796. + */ +enum ad7793_bias_voltage { + AD7793_BIAS_VOLTAGE_DISABLED, + AD7793_BIAS_VOLTAGE_AIN1, + AD7793_BIAS_VOLTAGE_AIN2, + AD7793_BIAS_VOLTAGE_AIN3, +}; + +/** + * enum ad7793_refsel - AD7793 reference voltage selection + * @AD7793_REFSEL_REFIN1: External reference applied between REFIN1(+) + * and REFIN1(-). + * @AD7793_REFSEL_REFIN2: External reference applied between REFIN2(+) and + * and REFIN1(-). Only valid for AD7795/AD7796. + * @AD7793_REFSEL_INTERNAL: Internal 1.17 V reference. + */ +enum ad7793_refsel { + AD7793_REFSEL_REFIN1 = 0, + AD7793_REFSEL_REFIN2 = 1, + AD7793_REFSEL_INTERNAL = 2, +}; + +/** + * enum ad7793_current_source_direction - AD7793 excitation current direction + * @AD7793_IEXEC1_IOUT1_IEXEC2_IOUT2: Current source IEXC1 connected to pin + * IOUT1, current source IEXC2 connected to pin IOUT2. + * @AD7793_IEXEC1_IOUT2_IEXEC2_IOUT1: Current source IEXC2 connected to pin + * IOUT1, current source IEXC1 connected to pin IOUT2. + * @AD7793_IEXEC1_IEXEC2_IOUT1: Both current sources connected to pin IOUT1. + * Only valid when the current sources are set to 10 uA or 210 uA. + * @AD7793_IEXEC1_IEXEC2_IOUT2: Both current sources connected to Pin IOUT2. + * Only valid when the current ources are set to 10 uA or 210 uA. + */ +enum ad7793_current_source_direction { + AD7793_IEXEC1_IOUT1_IEXEC2_IOUT2 = 0, + AD7793_IEXEC1_IOUT2_IEXEC2_IOUT1 = 1, + AD7793_IEXEC1_IEXEC2_IOUT1 = 2, + AD7793_IEXEC1_IEXEC2_IOUT2 = 3, +}; + +/** + * enum ad7793_excitation_current - AD7793 excitation current selection + * @AD7793_IX_DISABLED: Excitation current Disabled. + * @AD7793_IX_10uA: Enable 10 micro-ampere excitation current. + * @AD7793_IX_210uA: Enable 210 micro-ampere excitation current. + * @AD7793_IX_1mA: Enable 1 milli-Ampere excitation current. + */ +enum ad7793_excitation_current { + AD7793_IX_DISABLED = 0, + AD7793_IX_10uA = 1, + AD7793_IX_210uA = 2, + AD7793_IX_1mA = 3, +}; + +/** + * struct ad7793_platform_data - AD7793 platform data + * @clock_src: Clock source selection + * @burnout_current: If set to true the 100nA burnout current is enabled. + * @boost_enable: Enable boost for the bias voltage generator. + * @buffered: If set to true configure the device for buffered input mode. + * @unipolar: If set to true sample in unipolar mode, if set to false sample in + * bipolar mode. + * @refsel: Reference voltage selection + * @bias_voltage: Bias voltage selection + * @exitation_current: Excitation current selection + * @current_source_direction: Excitation current direction selection + */ +struct ad7793_platform_data { + enum ad7793_clock_source clock_src; + bool burnout_current; + bool boost_enable; + bool buffered; + bool unipolar; + + enum ad7793_refsel refsel; + enum ad7793_bias_voltage bias_voltage; + enum ad7793_excitation_current exitation_current; + enum ad7793_current_source_direction current_source_direction; +}; + +#endif /* IIO_ADC_AD7793_H_ */ diff --git a/include/linux/platform_data/ad7887.h b/include/linux/platform_data/ad7887.h new file mode 100644 index 000000000000..1e06eac3174d --- /dev/null +++ b/include/linux/platform_data/ad7887.h @@ -0,0 +1,26 @@ +/* + * AD7887 SPI ADC driver + * + * Copyright 2010 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ +#ifndef IIO_ADC_AD7887_H_ +#define IIO_ADC_AD7887_H_ + +/** + * struct ad7887_platform_data - AD7887 ADC driver platform data + * @en_dual: Whether to use dual channel mode. If set to true AIN1 becomes the + * second input channel, and Vref is internally connected to Vdd. If set to + * false the device is used in single channel mode and AIN1/Vref is used as + * VREF input. + * @use_onchip_ref: Whether to use the onchip reference. If set to true the + * internal 2.5V reference is used. If set to false a external reference is + * used. + */ +struct ad7887_platform_data { + bool en_dual; + bool use_onchip_ref; +}; + +#endif /* IIO_ADC_AD7887_H_ */ diff --git a/include/linux/platform_data/ads7828.h b/include/linux/platform_data/ads7828.h new file mode 100644 index 000000000000..3245f45f9d77 --- /dev/null +++ b/include/linux/platform_data/ads7828.h @@ -0,0 +1,29 @@ +/* + * TI ADS7828 A/D Converter platform data definition + * + * Copyright (c) 2012 Savoir-faire Linux Inc. + * Vivien Didelot <vivien.didelot@savoirfairelinux.com> + * + * For further information, see the Documentation/hwmon/ads7828 file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _PDATA_ADS7828_H +#define _PDATA_ADS7828_H + +/** + * struct ads7828_platform_data - optional ADS7828 connectivity info + * @diff_input: Differential input mode. + * @ext_vref: Use an external voltage reference. + * @vref_mv: Voltage reference value, if external. + */ +struct ads7828_platform_data { + bool diff_input; + bool ext_vref; + unsigned int vref_mv; +}; + +#endif /* _PDATA_ADS7828_H */ diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h index 63f3c2804239..92c7fd72f636 100644 --- a/include/linux/platform_data/asoc-imx-ssi.h +++ b/include/linux/platform_data/asoc-imx-ssi.h @@ -17,5 +17,7 @@ struct imx_ssi_platform_data { void (*ac97_warm_reset)(struct snd_ac97 *ac97); }; +extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); + #endif /* __MACH_SSI_H */ diff --git a/include/linux/platform_data/asoc-s3c.h b/include/linux/platform_data/asoc-s3c.h index aa9875f77c40..88272591a895 100644 --- a/include/linux/platform_data/asoc-s3c.h +++ b/include/linux/platform_data/asoc-s3c.h @@ -38,12 +38,6 @@ struct samsung_i2s { #define QUIRK_NEED_RSTCLR (1 << 3) /* Quirks of the I2S controller */ u32 quirks; - - /* - * Array of clock names that can be used to generate I2S signals. - * Also corresponds to clocks of I2SMOD[10] - */ - const char **src_clk; dma_addr_t idma_addr; }; diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index b0f2c56a8ea2..6a293b7fff3b 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h @@ -8,6 +8,55 @@ #define __ATMEL_H__ #include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> +#include <linux/device.h> +#include <linux/i2c.h> +#include <linux/leds.h> +#include <linux/spi/spi.h> +#include <linux/usb/atmel_usba_udc.h> +#include <linux/atmel-mci.h> +#include <sound/atmel-ac97c.h> +#include <linux/serial.h> +#include <linux/platform_data/macb.h> + +/* + * at91: 6 USARTs and one DBGU port (SAM9260) + * avr32: 4 + */ +#define ATMEL_MAX_UART 7 + + /* USB Device */ +struct at91_udc_data { + int vbus_pin; /* high == host powering us */ + u8 vbus_active_low; /* vbus polarity */ + u8 vbus_polled; /* Use polling, not interrupt */ + int pullup_pin; /* active == D+ pulled up */ + u8 pullup_active_low; /* true == pullup_pin is active low */ +}; + + /* Compact Flash */ +struct at91_cf_data { + int irq_pin; /* I/O IRQ */ + int det_pin; /* Card detect */ + int vcc_pin; /* power switching */ + int rst_pin; /* card reset */ + u8 chipselect; /* EBI Chip Select number */ + u8 flags; +#define AT91_CF_TRUE_IDE 0x01 +#define AT91_IDE_SWAP_A0_A2 0x02 +}; + + /* USB Host */ +#define AT91_MAX_USBH_PORTS 3 +struct at91_usbh_data { + int vbus_pin[AT91_MAX_USBH_PORTS]; /* port power-control pin */ + int overcurrent_pin[AT91_MAX_USBH_PORTS]; + u8 ports; /* number of ports on root hub */ + u8 overcurrent_supported; + u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS]; + u8 overcurrent_status[AT91_MAX_USBH_PORTS]; + u8 overcurrent_changed[AT91_MAX_USBH_PORTS]; +}; /* NAND / SmartMedia */ struct atmel_nand_data { @@ -24,4 +73,28 @@ struct atmel_nand_data { unsigned int num_parts; }; + /* Serial */ +struct atmel_uart_data { + int num; /* port num */ + short use_dma_tx; /* use transmit DMA? */ + short use_dma_rx; /* use receive DMA? */ + void __iomem *regs; /* virt. base address, if any */ + struct serial_rs485 rs485; /* rs485 settings */ +}; + + /* Touchscreen Controller */ +struct at91_tsadcc_data { + unsigned int adc_clock; + u8 pendet_debounce; + u8 ts_sample_hold_time; +}; + +/* CAN */ +struct at91_can_data { + void (*transceiver_switch)(int on); +}; + +/* FIXME: this needs a better location, but gets stuff building again */ +extern int at91_suspend_entering_slow_clock(void); + #endif /* __ATMEL_H__ */ diff --git a/include/linux/platform_data/clk-integrator.h b/include/linux/platform_data/clk-integrator.h index 83fe9c283bb8..280edac9d0a5 100644 --- a/include/linux/platform_data/clk-integrator.h +++ b/include/linux/platform_data/clk-integrator.h @@ -1 +1,3 @@ void integrator_clk_init(bool is_cp); +void integrator_impd1_clk_init(void __iomem *base, unsigned int id); +void integrator_impd1_clk_exit(unsigned int id); diff --git a/include/linux/platform_data/clocksource-nomadik-mtu.h b/include/linux/platform_data/clocksource-nomadik-mtu.h new file mode 100644 index 000000000000..80088973b734 --- /dev/null +++ b/include/linux/platform_data/clocksource-nomadik-mtu.h @@ -0,0 +1,9 @@ +#ifndef __PLAT_MTU_H +#define __PLAT_MTU_H + +void nmdk_timer_init(void __iomem *base, int irq); +void nmdk_clkevt_reset(void); +void nmdk_clksrc_reset(void); + +#endif /* __PLAT_MTU_H */ + diff --git a/include/linux/platform_data/cpsw.h b/include/linux/platform_data/cpsw.h index c4e23d029498..24368a2e8b87 100644 --- a/include/linux/platform_data/cpsw.h +++ b/include/linux/platform_data/cpsw.h @@ -18,9 +18,7 @@ #include <linux/if_ether.h> struct cpsw_slave_data { - u32 slave_reg_ofs; - u32 sliver_reg_ofs; - const char *phy_id; + char phy_id[MII_BUS_ID_SIZE]; int phy_if; u8 mac_addr[ETH_ALEN]; }; @@ -28,27 +26,14 @@ struct cpsw_slave_data { struct cpsw_platform_data { u32 ss_reg_ofs; /* Subsystem control register offset */ u32 channels; /* number of cpdma channels (symmetric) */ - u32 cpdma_reg_ofs; /* cpdma register offset */ - u32 cpdma_sram_ofs; /* cpdma sram offset */ - u32 slaves; /* number of slave cpgmac ports */ struct cpsw_slave_data *slave_data; - - u32 ale_reg_ofs; /* address lookup engine reg offset */ + u32 cpts_active_slave; /* time stamping slave */ + u32 cpts_clock_mult; /* convert input clock ticks to nanoseconds */ + u32 cpts_clock_shift; /* convert input clock ticks to nanoseconds */ u32 ale_entries; /* ale table size */ - - u32 host_port_reg_ofs; /* cpsw cpdma host port registers */ - u32 host_port_num; /* The port number for the host port */ - - u32 hw_stats_reg_ofs; /* cpsw hardware statistics counters */ - - u32 bd_ram_ofs; /* embedded buffer descriptor RAM offset*/ u32 bd_ram_size; /*buffer descriptor ram size */ - u32 hw_ram_addr; /*if the HW address for BD RAM is different */ - bool no_bd_ram; /* no embedded BD ram*/ - u32 rx_descs; /* Number of Rx Descriptios */ - u32 mac_control; /* Mac control register */ }; diff --git a/include/linux/platform_data/crypto-ux500.h b/include/linux/platform_data/crypto-ux500.h index 5b2d0817e26a..94df96d9a336 100644 --- a/include/linux/platform_data/crypto-ux500.h +++ b/include/linux/platform_data/crypto-ux500.h @@ -7,7 +7,7 @@ #ifndef _CRYPTO_UX500_H #define _CRYPTO_UX500_H #include <linux/dmaengine.h> -#include <plat/ste_dma40.h> +#include <linux/platform_data/dma-ste-dma40.h> struct hash_platform_data { void *mem_to_engine; diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h index d0c5825876f8..8db5ae03b6e3 100644 --- a/include/linux/platform_data/davinci_asp.h +++ b/include/linux/platform_data/davinci_asp.h @@ -16,12 +16,13 @@ #ifndef __DAVINCI_ASP_H #define __DAVINCI_ASP_H +#include <linux/genalloc.h> + struct snd_platform_data { u32 tx_dma_offset; u32 rx_dma_offset; int asp_chan_q; /* event queue number for ASP channel */ int ram_chan_q; /* event queue number for RAM channel */ - unsigned int codec_fmt; /* * Allowing this is more efficient and eliminates left and right swaps * caused by underruns, but will swap the left and right channels @@ -30,6 +31,7 @@ struct snd_platform_data { unsigned enable_channel_combine:1; unsigned sram_size_playback; unsigned sram_size_capture; + struct gen_pool *sram_pool; /* * If McBSP peripheral gets the clock from an external pin, diff --git a/include/linux/platform_data/db8500_thermal.h b/include/linux/platform_data/db8500_thermal.h new file mode 100644 index 000000000000..3bf60902e902 --- /dev/null +++ b/include/linux/platform_data/db8500_thermal.h @@ -0,0 +1,38 @@ +/* + * db8500_thermal.h - DB8500 Thermal Management Implementation + * + * Copyright (C) 2012 ST-Ericsson + * Copyright (C) 2012 Linaro Ltd. + * + * Author: Hongbo Zhang <hongbo.zhang@linaro.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DB8500_THERMAL_H_ +#define _DB8500_THERMAL_H_ + +#include <linux/thermal.h> + +#define COOLING_DEV_MAX 8 + +struct db8500_trip_point { + unsigned long temp; + enum thermal_trip_type type; + char cdev_name[COOLING_DEV_MAX][THERMAL_NAME_LENGTH]; +}; + +struct db8500_thsens_platform_data { + struct db8500_trip_point trip_points[THERMAL_MAX_TRIPS]; + int num_trips; +}; + +#endif /* _DB8500_THERMAL_H_ */ diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h index 1b9080385b46..f6d30cc1cb77 100644 --- a/include/linux/platform_data/dma-imx.h +++ b/include/linux/platform_data/dma-imx.h @@ -61,7 +61,9 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan) static inline int imx_dma_is_general_purpose(struct dma_chan *chan) { return strstr(dev_name(chan->device->dev), "sdma") || - !strcmp(dev_name(chan->device->dev), "imx-dma"); + !strcmp(dev_name(chan->device->dev), "imx1-dma") || + !strcmp(dev_name(chan->device->dev), "imx21-dma") || + !strcmp(dev_name(chan->device->dev), "imx27-dma"); } #endif diff --git a/include/linux/platform_data/dma-mv_xor.h b/include/linux/platform_data/dma-mv_xor.h index 2ba1f7d76eef..8ec18f64e396 100644 --- a/include/linux/platform_data/dma-mv_xor.h +++ b/include/linux/platform_data/dma-mv_xor.h @@ -10,15 +10,14 @@ #include <linux/dmaengine.h> #include <linux/mbus.h> -#define MV_XOR_SHARED_NAME "mv_xor_shared" -#define MV_XOR_NAME "mv_xor" +#define MV_XOR_NAME "mv_xor" -struct mv_xor_platform_data { - struct platform_device *shared; - int hw_id; +struct mv_xor_channel_data { dma_cap_mask_t cap_mask; - size_t pool_size; }; +struct mv_xor_platform_data { + struct mv_xor_channel_data *channels; +}; #endif diff --git a/include/linux/platform_data/dma-ste-dma40.h b/include/linux/platform_data/dma-ste-dma40.h new file mode 100644 index 000000000000..9ff93b065686 --- /dev/null +++ b/include/linux/platform_data/dma-ste-dma40.h @@ -0,0 +1,223 @@ +/* + * Copyright (C) ST-Ericsson SA 2007-2010 + * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson + * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson + * License terms: GNU General Public License (GPL) version 2 + */ + + +#ifndef STE_DMA40_H +#define STE_DMA40_H + +#include <linux/dmaengine.h> +#include <linux/scatterlist.h> +#include <linux/workqueue.h> +#include <linux/interrupt.h> + +/* + * Maxium size for a single dma descriptor + * Size is limited to 16 bits. + * Size is in the units of addr-widths (1,2,4,8 bytes) + * Larger transfers will be split up to multiple linked desc + */ +#define STEDMA40_MAX_SEG_SIZE 0xFFFF + +/* dev types for memcpy */ +#define STEDMA40_DEV_DST_MEMORY (-1) +#define STEDMA40_DEV_SRC_MEMORY (-1) + +enum stedma40_mode { + STEDMA40_MODE_LOGICAL = 0, + STEDMA40_MODE_PHYSICAL, + STEDMA40_MODE_OPERATION, +}; + +enum stedma40_mode_opt { + STEDMA40_PCHAN_BASIC_MODE = 0, + STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0, + STEDMA40_PCHAN_MODULO_MODE, + STEDMA40_PCHAN_DOUBLE_DST_MODE, + STEDMA40_LCHAN_SRC_PHY_DST_LOG, + STEDMA40_LCHAN_SRC_LOG_DST_PHY, +}; + +#define STEDMA40_ESIZE_8_BIT 0x0 +#define STEDMA40_ESIZE_16_BIT 0x1 +#define STEDMA40_ESIZE_32_BIT 0x2 +#define STEDMA40_ESIZE_64_BIT 0x3 + +/* The value 4 indicates that PEN-reg shall be set to 0 */ +#define STEDMA40_PSIZE_PHY_1 0x4 +#define STEDMA40_PSIZE_PHY_2 0x0 +#define STEDMA40_PSIZE_PHY_4 0x1 +#define STEDMA40_PSIZE_PHY_8 0x2 +#define STEDMA40_PSIZE_PHY_16 0x3 + +/* + * The number of elements differ in logical and + * physical mode + */ +#define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2 +#define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4 +#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8 +#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16 + +/* Maximum number of possible physical channels */ +#define STEDMA40_MAX_PHYS 32 + +enum stedma40_flow_ctrl { + STEDMA40_NO_FLOW_CTRL, + STEDMA40_FLOW_CTRL, +}; + +enum stedma40_periph_data_width { + STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT, + STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT, + STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT, + STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT +}; + +enum stedma40_xfer_dir { + STEDMA40_MEM_TO_MEM = 1, + STEDMA40_MEM_TO_PERIPH, + STEDMA40_PERIPH_TO_MEM, + STEDMA40_PERIPH_TO_PERIPH +}; + + +/** + * struct stedma40_chan_cfg - dst/src channel configuration + * + * @big_endian: true if the src/dst should be read as big endian + * @data_width: Data width of the src/dst hardware + * @p_size: Burst size + * @flow_ctrl: Flow control on/off. + */ +struct stedma40_half_channel_info { + bool big_endian; + enum stedma40_periph_data_width data_width; + int psize; + enum stedma40_flow_ctrl flow_ctrl; +}; + +/** + * struct stedma40_chan_cfg - Structure to be filled by client drivers. + * + * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH + * @high_priority: true if high-priority + * @realtime: true if realtime mode is to be enabled. Only available on DMA40 + * version 3+, i.e DB8500v2+ + * @mode: channel mode: physical, logical, or operation + * @mode_opt: options for the chosen channel mode + * @src_dev_type: Src device type + * @dst_dev_type: Dst device type + * @src_info: Parameters for dst half channel + * @dst_info: Parameters for dst half channel + * @use_fixed_channel: if true, use physical channel specified by phy_channel + * @phy_channel: physical channel to use, only if use_fixed_channel is true + * + * This structure has to be filled by the client drivers. + * It is recommended to do all dma configurations for clients in the machine. + * + */ +struct stedma40_chan_cfg { + enum stedma40_xfer_dir dir; + bool high_priority; + bool realtime; + enum stedma40_mode mode; + enum stedma40_mode_opt mode_opt; + int src_dev_type; + int dst_dev_type; + struct stedma40_half_channel_info src_info; + struct stedma40_half_channel_info dst_info; + + bool use_fixed_channel; + int phy_channel; +}; + +/** + * struct stedma40_platform_data - Configuration struct for the dma device. + * + * @dev_len: length of dev_tx and dev_rx + * @dev_tx: mapping between destination event line and io address + * @dev_rx: mapping between source event line and io address + * @memcpy: list of memcpy event lines + * @memcpy_len: length of memcpy + * @memcpy_conf_phy: default configuration of physical channel memcpy + * @memcpy_conf_log: default configuration of logical channel memcpy + * @disabled_channels: A vector, ending with -1, that marks physical channels + * that are for different reasons not available for the driver. + */ +struct stedma40_platform_data { + u32 dev_len; + const dma_addr_t *dev_tx; + const dma_addr_t *dev_rx; + int *memcpy; + u32 memcpy_len; + struct stedma40_chan_cfg *memcpy_conf_phy; + struct stedma40_chan_cfg *memcpy_conf_log; + int disabled_channels[STEDMA40_MAX_PHYS]; + bool use_esram_lcla; +}; + +#ifdef CONFIG_STE_DMA40 + +/** + * stedma40_filter() - Provides stedma40_chan_cfg to the + * ste_dma40 dma driver via the dmaengine framework. + * does some checking of what's provided. + * + * Never directly called by client. It used by dmaengine. + * @chan: dmaengine handle. + * @data: Must be of type: struct stedma40_chan_cfg and is + * the configuration of the framework. + * + * + */ + +bool stedma40_filter(struct dma_chan *chan, void *data); + +/** + * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave + * (=device) + * + * @chan: dmaengine handle + * @addr: source or destination physicall address. + * @size: bytes to transfer + * @direction: direction of transfer + * @flags: is actually enum dma_ctrl_flags. See dmaengine.h + */ + +static inline struct +dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, + dma_addr_t addr, + unsigned int size, + enum dma_transfer_direction direction, + unsigned long flags) +{ + struct scatterlist sg; + sg_init_table(&sg, 1); + sg.dma_address = addr; + sg.length = size; + + return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags); +} + +#else +static inline bool stedma40_filter(struct dma_chan *chan, void *data) +{ + return false; +} + +static inline struct +dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, + dma_addr_t addr, + unsigned int size, + enum dma_transfer_direction direction, + unsigned long flags) +{ + return NULL; +} +#endif + +#endif diff --git a/include/linux/platform_data/dmtimer-omap.h b/include/linux/platform_data/dmtimer-omap.h new file mode 100644 index 000000000000..a19b78d826e9 --- /dev/null +++ b/include/linux/platform_data/dmtimer-omap.h @@ -0,0 +1,31 @@ +/* + * DMTIMER platform data for TI OMAP platforms + * + * Copyright (C) 2012 Texas Instruments + * Author: Jon Hunter <jon-hunter@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__ +#define __PLATFORM_DATA_DMTIMER_OMAP_H__ + +struct dmtimer_platform_data { + /* set_timer_src - Only used for OMAP1 devices */ + int (*set_timer_src)(struct platform_device *pdev, int source); + u32 timer_capability; + u32 timer_errata; + int (*get_context_loss_count)(struct device *); +}; + +#endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */ diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h index e8741c2678d5..5d50b25a73d7 100644 --- a/include/linux/platform_data/gpio-omap.h +++ b/include/linux/platform_data/gpio-omap.h @@ -26,7 +26,6 @@ #include <linux/io.h> #include <linux/platform_device.h> -#include <mach/irqs.h> #define OMAP1_MPUIO_BASE 0xfffb5000 diff --git a/include/linux/platform_data/gpio-ts5500.h b/include/linux/platform_data/gpio-ts5500.h new file mode 100644 index 000000000000..b10d11c9bb49 --- /dev/null +++ b/include/linux/platform_data/gpio-ts5500.h @@ -0,0 +1,27 @@ +/* + * GPIO (DIO) header for Technologic Systems TS-5500 + * + * Copyright (c) 2012 Savoir-faire Linux Inc. + * Vivien Didelot <vivien.didelot@savoirfairelinux.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _PDATA_GPIO_TS5500_H +#define _PDATA_GPIO_TS5500_H + +/** + * struct ts5500_dio_platform_data - TS-5500 pin block configuration + * @base: The GPIO base number to use. + * @strap: The only pin connected to an interrupt in a block is input-only. + * If you need a bidirectional line which can trigger an IRQ, you + * may strap it with an in/out pin. This flag indicates this case. + */ +struct ts5500_dio_platform_data { + int base; + bool strap; +}; + +#endif /* _PDATA_GPIO_TS5500_H */ diff --git a/include/linux/platform_data/iommu-omap.h b/include/linux/platform_data/iommu-omap.h new file mode 100644 index 000000000000..c677b9f2fefa --- /dev/null +++ b/include/linux/platform_data/iommu-omap.h @@ -0,0 +1,49 @@ +/* + * omap iommu: main structures + * + * Copyright (C) 2008-2009 Nokia Corporation + * + * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define MMU_REG_SIZE 256 + +/** + * struct iommu_arch_data - omap iommu private data + * @name: name of the iommu device + * @iommu_dev: handle of the iommu device + * + * This is an omap iommu private data object, which binds an iommu user + * to its iommu device. This object should be placed at the iommu user's + * dev_archdata so generic IOMMU API can be used without having to + * utilize omap-specific plumbing anymore. + */ +struct omap_iommu_arch_data { + const char *name; + struct omap_iommu *iommu_dev; +}; + +/** + * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod + * @da_start: device address where the va space starts. + * @da_end: device address where the va space ends. + * @nr_tlb_entries: number of entries supported by the translation + * look-aside buffer (TLB). + */ +struct omap_mmu_dev_attr { + u32 da_start; + u32 da_end; + int nr_tlb_entries; +}; + +struct iommu_platform_data { + const char *name; + const char *clk_name; + const int nr_tlb_entries; + u32 da_start; + u32 da_end; +}; diff --git a/include/linux/platform_data/leds-omap.h b/include/linux/platform_data/leds-omap.h new file mode 100644 index 000000000000..56c9b2a0ada5 --- /dev/null +++ b/include/linux/platform_data/leds-omap.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2006 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef ASMARM_ARCH_LED_H +#define ASMARM_ARCH_LED_H + +struct omap_led_config { + struct led_classdev cdev; + s16 gpio; +}; + +struct omap_led_platform_data { + s16 nr_leds; + struct omap_led_config *leds; +}; + +#endif diff --git a/include/linux/platform_data/macb.h b/include/linux/platform_data/macb.h index b081c7245ec8..044a124bfbbc 100644 --- a/include/linux/platform_data/macb.h +++ b/include/linux/platform_data/macb.h @@ -12,6 +12,7 @@ struct macb_platform_data { u32 phy_mask; int phy_irq_pin; /* PHY IRQ */ u8 is_rmii; /* using RMII interface? */ + u8 rev_eth_addr; /* reverse Ethernet address byte order */ }; #endif /* __MACB_PDATA_H__ */ diff --git a/include/linux/platform_data/mmc-omap.h b/include/linux/platform_data/mmc-omap.h new file mode 100644 index 000000000000..2bf1b30cb5dc --- /dev/null +++ b/include/linux/platform_data/mmc-omap.h @@ -0,0 +1,151 @@ +/* + * MMC definitions for OMAP2 + * + * Copyright (C) 2006 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define OMAP_MMC_MAX_SLOTS 2 + +/* + * struct omap_mmc_dev_attr.flags possibilities + * + * OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can + * operate with either 1.8Vdc or 3.0Vdc card voltages; this flag + * should be set if this is the case. See for example Section 22.5.3 + * "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia + * Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R). + * + * OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers + * don't work correctly on some MMC controller instances on some + * OMAP3 SoCs; this flag should be set if this is the case. See + * for example Advisory 2.1.1.128 "MMC: Multiple Block Read + * Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_ + * Revision F (October 2010) (SPRZ278F). + */ +#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0) +#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1) + +struct mmc_card; + +struct omap_mmc_dev_attr { + u8 flags; +}; + +struct omap_mmc_platform_data { + /* back-link to device */ + struct device *dev; + + /* number of slots per controller */ + unsigned nr_slots:2; + + /* set if your board has components or wiring that limits the + * maximum frequency on the MMC bus */ + unsigned int max_freq; + + /* switch the bus to a new slot */ + int (*switch_slot)(struct device *dev, int slot); + /* initialize board-specific MMC functionality, can be NULL if + * not supported */ + int (*init)(struct device *dev); + void (*cleanup)(struct device *dev); + void (*shutdown)(struct device *dev); + + /* To handle board related suspend/resume functionality for MMC */ + int (*suspend)(struct device *dev, int slot); + int (*resume)(struct device *dev, int slot); + + /* Return context loss count due to PM states changing */ + int (*get_context_loss_count)(struct device *dev); + + /* Integrating attributes from the omap_hwmod layer */ + u8 controller_flags; + + /* Register offset deviation */ + u16 reg_offset; + + struct omap_mmc_slot_data { + + /* + * 4/8 wires and any additional host capabilities + * need to OR'd all capabilities (ref. linux/mmc/host.h) + */ + u8 wires; /* Used for the MMC driver on omap1 and 2420 */ + u32 caps; /* Used for the MMC driver on 2430 and later */ + u32 pm_caps; /* PM capabilities of the mmc */ + + /* + * nomux means "standard" muxing is wrong on this board, and + * that board-specific code handled it before common init logic. + */ + unsigned nomux:1; + + /* switch pin can be for card detect (default) or card cover */ + unsigned cover:1; + + /* use the internal clock */ + unsigned internal_clock:1; + + /* nonremovable e.g. eMMC */ + unsigned nonremovable:1; + + /* Try to sleep or power off when possible */ + unsigned power_saving:1; + + /* If using power_saving and the MMC power is not to go off */ + unsigned no_off:1; + + /* eMMC does not handle power off when not in sleep state */ + unsigned no_regulator_off_init:1; + + /* Regulator off remapped to sleep */ + unsigned vcc_aux_disable_is_sleep:1; + + /* we can put the features above into this variable */ +#define HSMMC_HAS_PBIAS (1 << 0) +#define HSMMC_HAS_UPDATED_RESET (1 << 1) +#define HSMMC_HAS_HSPE_SUPPORT (1 << 2) +#define MMC_OMAP7XX (1 << 3) +#define MMC_OMAP15XX (1 << 4) +#define MMC_OMAP16XX (1 << 5) + unsigned features; + + int switch_pin; /* gpio (card detect) */ + int gpio_wp; /* gpio (write protect) */ + + int (*set_bus_mode)(struct device *dev, int slot, int bus_mode); + int (*set_power)(struct device *dev, int slot, + int power_on, int vdd); + int (*get_ro)(struct device *dev, int slot); + void (*remux)(struct device *dev, int slot, int power_on); + /* Call back before enabling / disabling regulators */ + void (*before_set_reg)(struct device *dev, int slot, + int power_on, int vdd); + /* Call back after enabling / disabling regulators */ + void (*after_set_reg)(struct device *dev, int slot, + int power_on, int vdd); + /* if we have special card, init it using this callback */ + void (*init_card)(struct mmc_card *card); + + /* return MMC cover switch state, can be NULL if not supported. + * + * possible return values: + * 0 - closed + * 1 - open + */ + int (*get_cover_state)(struct device *dev, int slot); + + const char *name; + u32 ocr_mask; + + /* Card detection IRQs */ + int card_detect_irq; + int (*card_detect)(struct device *dev, int slot); + + unsigned int ban_openended:1; + + } slots[OMAP_MMC_MAX_SLOTS]; +}; diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h index 1a68c1e5fe53..24d32ca34bef 100644 --- a/include/linux/platform_data/mtd-nand-omap2.h +++ b/include/linux/platform_data/mtd-nand-omap2.h @@ -8,9 +8,13 @@ * published by the Free Software Foundation. */ -#include <plat/gpmc.h> +#ifndef _MTD_NAND_OMAP2_H +#define _MTD_NAND_OMAP2_H + #include <linux/mtd/partitions.h> +#define GPMC_BCH_NUM_REMAINDER 8 + enum nand_io { NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */ NAND_OMAP_POLLED, /* polled mode, without prefetch */ @@ -18,10 +22,38 @@ enum nand_io { NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */ }; +enum omap_ecc { + /* 1-bit ecc: stored at end of spare area */ + OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */ + OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ + /* 1-bit ecc: stored at beginning of spare area as romcode */ + OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ + OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */ + OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */ +}; + +struct gpmc_nand_regs { + void __iomem *gpmc_status; + void __iomem *gpmc_nand_command; + void __iomem *gpmc_nand_address; + void __iomem *gpmc_nand_data; + void __iomem *gpmc_prefetch_config1; + void __iomem *gpmc_prefetch_config2; + void __iomem *gpmc_prefetch_control; + void __iomem *gpmc_prefetch_status; + void __iomem *gpmc_ecc_config; + void __iomem *gpmc_ecc_control; + void __iomem *gpmc_ecc_size_config; + void __iomem *gpmc_ecc1_result; + void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER]; + void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER]; +}; + struct omap_nand_platform_data { int cs; struct mtd_partition *parts; - struct gpmc_timings *gpmc_t; int nr_parts; bool dev_ready; enum nand_io xfer_type; @@ -30,14 +62,4 @@ struct omap_nand_platform_data { struct gpmc_nand_regs reg; }; -/* minimum size for IO mapping */ -#define NAND_IO_SIZE 4 - -#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) -extern int gpmc_nand_init(struct omap_nand_platform_data *d); -#else -static inline int gpmc_nand_init(struct omap_nand_platform_data *d) -{ - return 0; -} #endif diff --git a/include/linux/platform_data/mtd-onenand-omap2.h b/include/linux/platform_data/mtd-onenand-omap2.h index 2858667d2e4f..685af7e8b120 100644 --- a/include/linux/platform_data/mtd-onenand-omap2.h +++ b/include/linux/platform_data/mtd-onenand-omap2.h @@ -9,17 +9,15 @@ * published by the Free Software Foundation. */ +#ifndef __MTD_ONENAND_OMAP2_H +#define __MTD_ONENAND_OMAP2_H + #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #define ONENAND_SYNC_READ (1 << 0) #define ONENAND_SYNC_READWRITE (1 << 1) - -struct onenand_freq_info { - u16 maf_id; - u16 dev_id; - u16 ver_id; -}; +#define ONENAND_IN_OMAP34XX (1 << 2) struct omap_onenand_platform_data { int cs; @@ -27,27 +25,9 @@ struct omap_onenand_platform_data { struct mtd_partition *parts; int nr_parts; int (*onenand_setup)(void __iomem *, int *freq_ptr); - int (*get_freq)(const struct onenand_freq_info *freq_info, - bool *clk_dep); int dma_channel; u8 flags; u8 regulator_can_sleep; u8 skip_initial_unlocking; }; - -#define ONENAND_MAX_PARTITIONS 8 - -#if defined(CONFIG_MTD_ONENAND_OMAP2) || \ - defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) - -extern void gpmc_onenand_init(struct omap_onenand_platform_data *d); - -#else - -#define board_onenand_data NULL - -static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d) -{ -} - #endif diff --git a/include/linux/platform_data/omap-twl4030.h b/include/linux/platform_data/omap-twl4030.h index c7bef788daab..ee60ef79d792 100644 --- a/include/linux/platform_data/omap-twl4030.h +++ b/include/linux/platform_data/omap-twl4030.h @@ -25,8 +25,34 @@ #ifndef _OMAP_TWL4030_H_ #define _OMAP_TWL4030_H_ +/* To select if only one channel is connected in a stereo port */ +#define OMAP_TWL4030_LEFT (1 << 0) +#define OMAP_TWL4030_RIGHT (1 << 1) + struct omap_tw4030_pdata { const char *card_name; + /* Voice port is connected to McBSP3 */ + bool voice_connected; + + /* The driver will parse the connection flags if this flag is set */ + bool custom_routing; + /* Flags to indicate connected audio ports. */ + u8 has_hs; + u8 has_hf; + u8 has_predriv; + u8 has_carkit; + bool has_ear; + + bool has_mainmic; + bool has_submic; + bool has_hsmic; + bool has_carkitmic; + bool has_digimic0; + bool has_digimic1; + u8 has_linein; + + /* Jack detect GPIO or <= 0 if it is not implemented */ + int jack_detect; }; #endif /* _OMAP_TWL4030_H_ */ diff --git a/include/linux/platform_data/omap-wd-timer.h b/include/linux/platform_data/omap-wd-timer.h new file mode 100644 index 000000000000..d75f5f802d98 --- /dev/null +++ b/include/linux/platform_data/omap-wd-timer.h @@ -0,0 +1,38 @@ +/* + * OMAP2+ WDTIMER-specific function prototypes + * + * Copyright (C) 2012 Texas Instruments, Inc. + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H +#define __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H + +#include <linux/types.h> + +/* + * Standardized OMAP reset source bits + * + * This is a subset of the ones listed in arch/arm/mach-omap2/prm.h + * and are the only ones needed in the watchdog driver. + */ +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 + +/** + * struct omap_wd_timer_platform_data - WDTIMER integration to the host SoC + * @read_reset_sources - fn ptr for the SoC to indicate the last reset cause + * + * The function pointed to by @read_reset_sources must return its data + * in a standard format - search for RST_SRC_ID_SHIFT in + * arch/arm/mach-omap2 + */ +struct omap_wd_timer_platform_data { + u32 (*read_reset_sources)(void); +}; + +#endif diff --git a/include/linux/platform_data/omap_drm.h b/include/linux/platform_data/omap_drm.h index 3da73bdc2031..f4e4a237ebd2 100644 --- a/include/linux/platform_data/omap_drm.h +++ b/include/linux/platform_data/omap_drm.h @@ -46,6 +46,7 @@ struct omap_kms_platform_data { }; struct omap_drm_platform_data { + uint32_t omaprev; struct omap_kms_platform_data *kms_pdata; }; diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h index 30dea251b835..dfbc65d10484 100644 --- a/include/linux/platform_data/pinctrl-coh901.h +++ b/include/linux/platform_data/pinctrl-coh901.h @@ -13,14 +13,10 @@ * struct u300_gpio_platform - U300 GPIO platform data * @ports: number of GPIO block ports * @gpio_base: first GPIO number for this block (use a free range) - * @gpio_irq_base: first GPIO IRQ number for this block (use a free range) - * @pinctrl_device: pin control device to spawn as child */ struct u300_gpio_platform { u8 ports; int gpio_base; - int gpio_irq_base; - struct platform_device *pinctrl_device; }; #endif /* __MACH_U300_GPIO_U300_H */ diff --git a/include/linux/platform_data/pinctrl-nomadik.h b/include/linux/platform_data/pinctrl-nomadik.h new file mode 100644 index 000000000000..f73b2f0c55b7 --- /dev/null +++ b/include/linux/platform_data/pinctrl-nomadik.h @@ -0,0 +1,266 @@ +/* + * Structures and registers for GPIO access in the Nomadik SoC + * + * Copyright (C) 2008 STMicroelectronics + * Author: Prafulla WADASKAR <prafulla.wadaskar@st.com> + * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __PLAT_NOMADIK_GPIO +#define __PLAT_NOMADIK_GPIO + +/* + * pin configurations are represented by 32-bit integers: + * + * bit 0.. 8 - Pin Number (512 Pins Maximum) + * bit 9..10 - Alternate Function Selection + * bit 11..12 - Pull up/down state + * bit 13 - Sleep mode behaviour + * bit 14 - Direction + * bit 15 - Value (if output) + * bit 16..18 - SLPM pull up/down state + * bit 19..20 - SLPM direction + * bit 21..22 - SLPM Value (if output) + * bit 23..25 - PDIS value (if input) + * bit 26 - Gpio mode + * bit 27 - Sleep mode + * + * to facilitate the definition, the following macros are provided + * + * PIN_CFG_DEFAULT - default config (0): + * pull up/down = disabled + * sleep mode = input/wakeup + * direction = input + * value = low + * SLPM direction = same as normal + * SLPM pull = same as normal + * SLPM value = same as normal + * + * PIN_CFG - default config with alternate function + */ + +typedef unsigned long pin_cfg_t; + +#define PIN_NUM_MASK 0x1ff +#define PIN_NUM(x) ((x) & PIN_NUM_MASK) + +#define PIN_ALT_SHIFT 9 +#define PIN_ALT_MASK (0x3 << PIN_ALT_SHIFT) +#define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT) +#define PIN_GPIO (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT) +#define PIN_ALT_A (NMK_GPIO_ALT_A << PIN_ALT_SHIFT) +#define PIN_ALT_B (NMK_GPIO_ALT_B << PIN_ALT_SHIFT) +#define PIN_ALT_C (NMK_GPIO_ALT_C << PIN_ALT_SHIFT) + +#define PIN_PULL_SHIFT 11 +#define PIN_PULL_MASK (0x3 << PIN_PULL_SHIFT) +#define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT) +#define PIN_PULL_NONE (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT) +#define PIN_PULL_UP (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT) +#define PIN_PULL_DOWN (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT) + +#define PIN_SLPM_SHIFT 13 +#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT) +#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT) +#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT) +#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT) +/* These two replace the above in DB8500v2+ */ +#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT) +#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT) +#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE + +#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */ +#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */ + +#define PIN_DIR_SHIFT 14 +#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT) +#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT) +#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT) +#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT) + +#define PIN_VAL_SHIFT 15 +#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT) +#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT) +#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT) +#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT) + +#define PIN_SLPM_PULL_SHIFT 16 +#define PIN_SLPM_PULL_MASK (0x7 << PIN_SLPM_PULL_SHIFT) +#define PIN_SLPM_PULL(x) \ + (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT) +#define PIN_SLPM_PULL_NONE \ + ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT) +#define PIN_SLPM_PULL_UP \ + ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT) +#define PIN_SLPM_PULL_DOWN \ + ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT) + +#define PIN_SLPM_DIR_SHIFT 19 +#define PIN_SLPM_DIR_MASK (0x3 << PIN_SLPM_DIR_SHIFT) +#define PIN_SLPM_DIR(x) \ + (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT) +#define PIN_SLPM_DIR_INPUT ((1 + 0) << PIN_SLPM_DIR_SHIFT) +#define PIN_SLPM_DIR_OUTPUT ((1 + 1) << PIN_SLPM_DIR_SHIFT) + +#define PIN_SLPM_VAL_SHIFT 21 +#define PIN_SLPM_VAL_MASK (0x3 << PIN_SLPM_VAL_SHIFT) +#define PIN_SLPM_VAL(x) \ + (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT) +#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT) +#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT) + +#define PIN_SLPM_PDIS_SHIFT 23 +#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT) +#define PIN_SLPM_PDIS(x) \ + (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT) +#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT) +#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT) +#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT) + +#define PIN_LOWEMI_SHIFT 25 +#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT) +#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT) +#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT) +#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT) + +#define PIN_GPIOMODE_SHIFT 26 +#define PIN_GPIOMODE_MASK (0x1 << PIN_GPIOMODE_SHIFT) +#define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT) +#define PIN_GPIOMODE_DISABLED (0 << PIN_GPIOMODE_SHIFT) +#define PIN_GPIOMODE_ENABLED (1 << PIN_GPIOMODE_SHIFT) + +#define PIN_SLEEPMODE_SHIFT 27 +#define PIN_SLEEPMODE_MASK (0x1 << PIN_SLEEPMODE_SHIFT) +#define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT) +#define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT) +#define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT) + + +/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */ +#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN) +#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP) +#define PIN_INPUT_NOPULL (PIN_DIR_INPUT | PIN_PULL_NONE) +#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW) +#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH) + +#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN) +#define PIN_SLPM_INPUT_PULLUP (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP) +#define PIN_SLPM_INPUT_NOPULL (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE) +#define PIN_SLPM_OUTPUT_LOW (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW) +#define PIN_SLPM_OUTPUT_HIGH (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH) + +#define PIN_CFG_DEFAULT (0) + +#define PIN_CFG(num, alt) \ + (PIN_CFG_DEFAULT |\ + (PIN_NUM(num) | PIN_##alt)) + +#define PIN_CFG_INPUT(num, alt, pull) \ + (PIN_CFG_DEFAULT |\ + (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull)) + +#define PIN_CFG_OUTPUT(num, alt, val) \ + (PIN_CFG_DEFAULT |\ + (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val)) + +/* + * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving + * the "gpio" namespace for generic and cross-machine functions + */ + +#define GPIO_BLOCK_SHIFT 5 +#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT) + +/* Register in the logic block */ +#define NMK_GPIO_DAT 0x00 +#define NMK_GPIO_DATS 0x04 +#define NMK_GPIO_DATC 0x08 +#define NMK_GPIO_PDIS 0x0c +#define NMK_GPIO_DIR 0x10 +#define NMK_GPIO_DIRS 0x14 +#define NMK_GPIO_DIRC 0x18 +#define NMK_GPIO_SLPC 0x1c +#define NMK_GPIO_AFSLA 0x20 +#define NMK_GPIO_AFSLB 0x24 +#define NMK_GPIO_LOWEMI 0x28 + +#define NMK_GPIO_RIMSC 0x40 +#define NMK_GPIO_FIMSC 0x44 +#define NMK_GPIO_IS 0x48 +#define NMK_GPIO_IC 0x4c +#define NMK_GPIO_RWIMSC 0x50 +#define NMK_GPIO_FWIMSC 0x54 +#define NMK_GPIO_WKS 0x58 +/* These appear in DB8540 and later ASICs */ +#define NMK_GPIO_EDGELEVEL 0x5C +#define NMK_GPIO_LEVEL 0x60 + +/* Alternate functions: function C is set in hw by setting both A and B */ +#define NMK_GPIO_ALT_GPIO 0 +#define NMK_GPIO_ALT_A 1 +#define NMK_GPIO_ALT_B 2 +#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B) + +#define NMK_GPIO_ALT_CX_SHIFT 2 +#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) +#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) +#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) +#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) + +/* Pull up/down values */ +enum nmk_gpio_pull { + NMK_GPIO_PULL_NONE, + NMK_GPIO_PULL_UP, + NMK_GPIO_PULL_DOWN, +}; + +/* Sleep mode */ +enum nmk_gpio_slpm { + NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_NOCHANGE, + NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, +}; + +/* Older deprecated pin config API that should go away soon */ +extern int nmk_config_pin(pin_cfg_t cfg, bool sleep); +extern int nmk_config_pins(pin_cfg_t *cfgs, int num); +extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num); +extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode); +extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull); +#ifdef CONFIG_PINCTRL_NOMADIK +extern int nmk_gpio_set_mode(int gpio, int gpio_mode); +#else +static inline int nmk_gpio_set_mode(int gpio, int gpio_mode) +{ + return -ENODEV; +} +#endif +extern int nmk_gpio_get_mode(int gpio); + +extern void nmk_gpio_wakeups_suspend(void); +extern void nmk_gpio_wakeups_resume(void); + +extern void nmk_gpio_clocks_enable(void); +extern void nmk_gpio_clocks_disable(void); + +extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up); + +/* + * Platform data to register a block: only the initial gpio/irq number. + */ +struct nmk_gpio_platform_data { + char *name; + int first_gpio; + int first_irq; + int num_gpio; + u32 (*get_secondary_status)(unsigned int bank); + void (*set_ioforce)(bool enable); + bool supports_sleepmode; +}; + +#endif /* __PLAT_NOMADIK_GPIO */ diff --git a/include/linux/platform_data/pn544.h b/include/linux/platform_data/pn544.h new file mode 100644 index 000000000000..713bfd703342 --- /dev/null +++ b/include/linux/platform_data/pn544.h @@ -0,0 +1,44 @@ +/* + * Driver include for the PN544 NFC chip. + * + * Copyright (C) Nokia Corporation + * + * Author: Jari Vanhala <ext-jari.vanhala@nokia.com> + * Contact: Matti Aaltoenn <matti.j.aaltonen@nokia.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef _PN544_H_ +#define _PN544_H_ + +#include <linux/i2c.h> + +enum { + NFC_GPIO_ENABLE, + NFC_GPIO_FW_RESET, + NFC_GPIO_IRQ +}; + +/* board config */ +struct pn544_nfc_platform_data { + int (*request_resources) (struct i2c_client *client); + void (*free_resources) (void); + void (*enable) (int fw); + int (*test) (void); + void (*disable) (void); + int (*get_gpio)(int type); +}; + +#endif /* _PN544_H_ */ diff --git a/include/linux/platform_data/pxa2xx_udc.h b/include/linux/platform_data/pxa2xx_udc.h new file mode 100644 index 000000000000..c6c5e98b5b82 --- /dev/null +++ b/include/linux/platform_data/pxa2xx_udc.h @@ -0,0 +1,27 @@ +/* + * This supports machine-specific differences in how the PXA2xx + * USB Device Controller (UDC) is wired. + * + * It is set in linux/arch/arm/mach-pxa/<machine>.c or in + * linux/arch/mach-ixp4xx/<machine>.c and used in + * the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c + */ +#ifndef PXA2XX_UDC_H +#define PXA2XX_UDC_H + +struct pxa2xx_udc_mach_info { + int (*udc_is_connected)(void); /* do we see host? */ + void (*udc_command)(int cmd); +#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */ +#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */ + + /* Boards following the design guidelines in the developer's manual, + * with on-chip GPIOs not Lubbock's weird hardware, can have a sane + * VBUS IRQ and omit the methods above. Store the GPIO number + * here. Note that sometimes the signals go through inverters... + */ + bool gpio_pullup_inverted; + int gpio_pullup; /* high == pullup activated */ +}; + +#endif diff --git a/include/linux/platform_data/pxa_sdhci.h b/include/linux/platform_data/pxa_sdhci.h index 59acd987ed34..27d3156d093a 100644 --- a/include/linux/platform_data/pxa_sdhci.h +++ b/include/linux/platform_data/pxa_sdhci.h @@ -38,6 +38,7 @@ * @max_speed: the maximum speed supported * @host_caps: Standard MMC host capabilities bit field. * @quirks: quirks of platfrom + * @quirks2: quirks2 of platfrom * @pm_caps: pm_caps of platfrom */ struct sdhci_pxa_platdata { @@ -48,9 +49,10 @@ struct sdhci_pxa_platdata { unsigned int ext_cd_gpio; bool ext_cd_gpio_invert; unsigned int max_speed; - unsigned int host_caps; - unsigned int host_caps2; + u32 host_caps; + u32 host_caps2; unsigned int quirks; + unsigned int quirks2; unsigned int pm_caps; }; diff --git a/include/linux/platform_data/sa11x0-serial.h b/include/linux/platform_data/sa11x0-serial.h new file mode 100644 index 000000000000..4504d5d592f0 --- /dev/null +++ b/include/linux/platform_data/sa11x0-serial.h @@ -0,0 +1,33 @@ +/* + * Author: Nicolas Pitre + * + * Moved and changed lots, Russell King + * + * Low level machine dependent UART functions. + */ +#ifndef SA11X0_SERIAL_H +#define SA11X0_SERIAL_H + +struct uart_port; +struct uart_info; + +/* + * This is a temporary structure for registering these + * functions; it is intended to be discarded after boot. + */ +struct sa1100_port_fns { + void (*set_mctrl)(struct uart_port *, u_int); + u_int (*get_mctrl)(struct uart_port *); + void (*pm)(struct uart_port *, u_int, u_int); + int (*set_wake)(struct uart_port *, u_int); +}; + +#ifdef CONFIG_SERIAL_SA1100 +void sa1100_register_uart_fns(struct sa1100_port_fns *fns); +void sa1100_register_uart(int idx, int port); +#else +#define sa1100_register_uart_fns(fns) do { } while (0) +#define sa1100_register_uart(idx,port) do { } while (0) +#endif + +#endif diff --git a/include/linux/platform_data/spi-clps711x.h b/include/linux/platform_data/spi-clps711x.h new file mode 100644 index 000000000000..301956e63143 --- /dev/null +++ b/include/linux/platform_data/spi-clps711x.h @@ -0,0 +1,21 @@ +/* + * CLPS711X SPI bus driver definitions + * + * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H +#define ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H + +/* Board specific platform_data */ +struct spi_clps711x_pdata { + int *chipselect; /* Array of GPIO-numbers */ + int num_chipselect; /* Total count of GPIOs */ +}; + +#endif diff --git a/include/linux/platform_data/spi-omap2-mcspi.h b/include/linux/platform_data/spi-omap2-mcspi.h index a357eb26bd25..a65572d53211 100644 --- a/include/linux/platform_data/spi-omap2-mcspi.h +++ b/include/linux/platform_data/spi-omap2-mcspi.h @@ -7,9 +7,13 @@ #define OMAP4_MCSPI_REG_OFFSET 0x100 +#define MCSPI_PINDIR_D0_IN_D1_OUT 0 +#define MCSPI_PINDIR_D0_OUT_D1_IN 1 + struct omap2_mcspi_platform_config { unsigned short num_cs; unsigned int regs_offset; + unsigned int pin_dir:1; }; struct omap2_mcspi_dev_attr { diff --git a/include/linux/platform_data/uio_dmem_genirq.h b/include/linux/platform_data/uio_dmem_genirq.h new file mode 100644 index 000000000000..973c1bb32168 --- /dev/null +++ b/include/linux/platform_data/uio_dmem_genirq.h @@ -0,0 +1,26 @@ +/* + * include/linux/platform_data/uio_dmem_genirq.h + * + * Copyright (C) 2012 Damian Hobson-Garcia + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _UIO_DMEM_GENIRQ_H +#define _UIO_DMEM_GENIRQ_H + +#include <linux/uio_driver.h> + +struct uio_dmem_genirq_pdata { + struct uio_info uioinfo; + unsigned int *dynamic_region_sizes; + unsigned int num_dynamic_regions; +}; +#endif /* _UIO_DMEM_GENIRQ_H */ diff --git a/include/linux/platform_data/uio_pruss.h b/include/linux/platform_data/uio_pruss.h index f39140aabc6f..3d47d219827f 100644 --- a/include/linux/platform_data/uio_pruss.h +++ b/include/linux/platform_data/uio_pruss.h @@ -20,6 +20,7 @@ /* To configure the PRUSS INTC base offset for UIO driver */ struct uio_pruss_pdata { - u32 pintc_base; + u32 pintc_base; + struct gen_pool *sram_pool; }; #endif /* _UIO_PRUSS_H_ */ diff --git a/include/linux/platform_data/usb-omap.h b/include/linux/platform_data/usb-omap.h new file mode 100644 index 000000000000..8570bcfe6311 --- /dev/null +++ b/include/linux/platform_data/usb-omap.h @@ -0,0 +1,80 @@ +/* + * usb-omap.h - Platform data for the various OMAP USB IPs + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com + * + * This software is distributed under the terms of the GNU General Public + * License ("GPL") version 2, as published by the Free Software Foundation. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#define OMAP3_HS_USB_PORTS 3 + +enum usbhs_omap_port_mode { + OMAP_USBHS_PORT_MODE_UNUSED, + OMAP_EHCI_PORT_MODE_PHY, + OMAP_EHCI_PORT_MODE_TLL, + OMAP_EHCI_PORT_MODE_HSIC, + OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0, + OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM, + OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0, + OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM, + OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0, + OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM, + OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0, + OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM, + OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0, + OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM +}; + +struct usbtll_omap_platform_data { + enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; +}; + +struct ehci_hcd_omap_platform_data { + enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; + int reset_gpio_port[OMAP3_HS_USB_PORTS]; + struct regulator *regulator[OMAP3_HS_USB_PORTS]; + unsigned phy_reset:1; +}; + +struct ohci_hcd_omap_platform_data { + enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; + unsigned es2_compatibility:1; +}; + +struct usbhs_omap_platform_data { + enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; + + struct ehci_hcd_omap_platform_data *ehci_data; + struct ohci_hcd_omap_platform_data *ohci_data; +}; + +/*-------------------------------------------------------------------------*/ + +struct omap_musb_board_data { + u8 interface_type; + u8 mode; + u16 power; + unsigned extvbus:1; + void (*set_phy_power)(u8 on); + void (*clear_irq)(void); + void (*set_mode)(u8 mode); + void (*reset)(void); +}; + +enum musb_interface { + MUSB_INTERFACE_ULPI, + MUSB_INTERFACE_UTMI +}; |