diff options
Diffstat (limited to 'include/linux/spi')
| -rw-r--r-- | include/linux/spi/Kbuild | 1 | ||||
| -rw-r--r-- | include/linux/spi/ad7877.h | 24 | ||||
| -rw-r--r-- | include/linux/spi/spi.h | 82 | ||||
| -rw-r--r-- | include/linux/spi/spidev.h | 124 |
4 files changed, 200 insertions, 31 deletions
diff --git a/include/linux/spi/Kbuild b/include/linux/spi/Kbuild new file mode 100644 index 000000000000..d375a082986e --- /dev/null +++ b/include/linux/spi/Kbuild @@ -0,0 +1 @@ +header-y += spidev.h diff --git a/include/linux/spi/ad7877.h b/include/linux/spi/ad7877.h new file mode 100644 index 000000000000..cdbed816f25e --- /dev/null +++ b/include/linux/spi/ad7877.h @@ -0,0 +1,24 @@ +/* linux/spi/ad7877.h */ + +/* Touchscreen characteristics vary between boards and models. The + * platform_data for the device's "struct device" holds this information. + * + * It's OK if the min/max values are zero. + */ +struct ad7877_platform_data { + u16 model; /* 7877 */ + u16 vref_delay_usecs; /* 0 for external vref; etc */ + u16 x_plate_ohms; + u16 y_plate_ohms; + + u16 x_min, x_max; + u16 y_min, y_max; + u16 pressure_min, pressure_max; + + u8 stopacq_polarity; /* 1 = Active HIGH, 0 = Active LOW */ + u8 first_conversion_delay; /* 0 = 0.5us, 1 = 128us, 2 = 1ms, 3 = 8ms */ + u8 acquisition_time; /* 0 = 2us, 1 = 4us, 2 = 8us, 3 = 16us */ + u8 averaging; /* 0 = 1, 1 = 4, 2 = 8, 3 = 16 */ + u8 pen_down_acc_interval; /* 0 = covert once, 1 = every 0.5 ms, + 2 = ever 1 ms, 3 = every 8 ms,*/ +}; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 4f0f8c2e58a5..b6bedc3ee95c 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -32,11 +32,12 @@ extern struct bus_type spi_bus_type; * @max_speed_hz: Maximum clock rate to be used with this chip * (on this board); may be changed by the device's driver. * The spi_transfer.speed_hz can override this for each transfer. - * @chip-select: Chipselect, distinguishing chips handled by "master". + * @chip_select: Chipselect, distinguishing chips handled by @master. * @mode: The spi mode defines how data is clocked out and in. * This may be changed by the device's driver. - * The "active low" default for chipselect mode can be overridden, - * as can the "MSB first" default for each word in a transfer. + * The "active low" default for chipselect mode can be overridden + * (by specifying SPI_CS_HIGH) as can the "MSB first" default for + * each word in a transfer (by specifying SPI_LSB_FIRST). * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). @@ -48,14 +49,18 @@ extern struct bus_type spi_bus_type; * @controller_state: Controller's runtime state * @controller_data: Board-specific definitions for controller, such as * FIFO initialization parameters; from board_info.controller_data + * @modalias: Name of the driver to use with this device, or an alias + * for that name. This appears in the sysfs "modalias" attribute + * for driver coldplugging, and in uevents used for hotplugging * - * An spi_device is used to interchange data between an SPI slave + * A @spi_device is used to interchange data between an SPI slave * (usually a discrete chip) and CPU memory. * - * In "dev", the platform_data is used to hold information about this + * In @dev, the platform_data is used to hold information about this * device that's meaningful to the device's protocol driver, but not * to its controller. One example might be an identifier for a chip - * variant with slightly different functionality. + * variant with slightly different functionality; another might be + * information about how this particular board wires the chip's pins. */ struct spi_device { struct device dev; @@ -77,13 +82,15 @@ struct spi_device { void *controller_data; const char *modalias; - // likely need more hooks for more protocol options affecting how - // the controller talks to each chip, like: - // - memory packing (12 bit samples into low bits, others zeroed) - // - priority - // - drop chipselect after each word - // - chipselect delays - // - ... + /* + * likely need more hooks for more protocol options affecting how + * the controller talks to each chip, like: + * - memory packing (12 bit samples into low bits, others zeroed) + * - priority + * - drop chipselect after each word + * - chipselect delays + * - ... + */ }; static inline struct spi_device *to_spi_device(struct device *dev) @@ -146,6 +153,11 @@ static inline struct spi_driver *to_spi_driver(struct device_driver *drv) extern int spi_register_driver(struct spi_driver *sdrv); +/** + * spi_unregister_driver - reverse effect of spi_register_driver + * @sdrv: the driver to unregister + * Context: can sleep + */ static inline void spi_unregister_driver(struct spi_driver *sdrv) { if (sdrv) @@ -165,18 +177,20 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) * @setup: updates the device mode and clocking records used by a * device's SPI controller; protocol code may call this. This * must fail if an unrecognized or unsupported mode is requested. + * It's always safe to call this unless transfers are pending on + * the device whose settings are being modified. * @transfer: adds a message to the controller's transfer queue. * @cleanup: frees controller-specific state * - * Each SPI master controller can communicate with one or more spi_device + * Each SPI master controller can communicate with one or more @spi_device * children. These make a small bus, sharing MOSI, MISO and SCK signals * but not chip select signals. Each device may be configured to use a * different clock rate, since those shared signals are ignored unless * the chip is selected. * * The driver for an SPI controller manages access to those devices through - * a queue of spi_message transactions, copyin data between CPU memory and - * an SPI slave device). For each such message it queues, it calls the + * a queue of spi_message transactions, copying data between CPU memory and + * an SPI slave device. For each such message it queues, it calls the * message's completion function when the transaction completes. */ struct spi_master { @@ -280,27 +294,27 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum); * struct spi_transfer - a read/write buffer pair * @tx_buf: data to be written (dma-safe memory), or NULL * @rx_buf: data to be read (dma-safe memory), or NULL - * @tx_dma: DMA address of tx_buf, if spi_message.is_dma_mapped - * @rx_dma: DMA address of rx_buf, if spi_message.is_dma_mapped + * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped + * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped * @len: size of rx and tx buffers (in bytes) * @speed_hz: Select a speed other then the device default for this - * transfer. If 0 the default (from spi_device) is used. + * transfer. If 0 the default (from @spi_device) is used. * @bits_per_word: select a bits_per_word other then the device default - * for this transfer. If 0 the default (from spi_device) is used. + * for this transfer. If 0 the default (from @spi_device) is used. * @cs_change: affects chipselect after this transfer completes * @delay_usecs: microseconds to delay after this transfer before * (optionally) changing the chipselect status, then starting - * the next transfer or completing this spi_message. - * @transfer_list: transfers are sequenced through spi_message.transfers + * the next transfer or completing this @spi_message. + * @transfer_list: transfers are sequenced through @spi_message.transfers * * SPI transfers always write the same number of bytes as they read. - * Protocol drivers should always provide rx_buf and/or tx_buf. + * Protocol drivers should always provide @rx_buf and/or @tx_buf. * In some cases, they may also want to provide DMA addresses for * the data being transferred; that may reduce overhead, when the * underlying driver uses dma. * * If the transmit buffer is null, zeroes will be shifted out - * while filling rx_buf. If the receive buffer is null, the data + * while filling @rx_buf. If the receive buffer is null, the data * shifted in will be discarded. Only "len" bytes shift out (or in). * It's an error to try to shift out a partial word. (For example, by * shifting out three bytes with word size of sixteen or twenty bits; @@ -309,7 +323,7 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum); * In-memory data values are always in native CPU byte order, translated * from the wire byte order (big-endian except with SPI_LSB_FIRST). So * for example when bits_per_word is sixteen, buffers are 2N bytes long - * and hold N sixteen bit words in CPU byte order. + * (@len = 2N) and hold N sixteen bit words in CPU byte order. * * When the word size of the SPI transfer is not a power-of-two multiple * of eight bits, those in-memory words include extra bits. In-memory @@ -318,7 +332,7 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum); * * All SPI transfers start with the relevant chipselect active. Normally * it stays selected until after the last transfer in a message. Drivers - * can affect the chipselect signal using cs_change: + * can affect the chipselect signal using cs_change. * * (i) If the transfer isn't the last one in the message, this flag is * used to make the chipselect briefly go inactive in the middle of the @@ -372,7 +386,7 @@ struct spi_transfer { * @queue: for use by whichever driver currently owns the message * @state: for use by whichever driver currently owns the message * - * An spi_message is used to execute an atomic sequence of data transfers, + * A @spi_message is used to execute an atomic sequence of data transfers, * each represented by a struct spi_transfer. The sequence is "atomic" * in the sense that no other spi_message may use that SPI bus until that * sequence completes. On some systems, many such sequences can execute as @@ -464,8 +478,9 @@ static inline void spi_message_free(struct spi_message *m) } /** - * spi_setup -- setup SPI mode and clock rate + * spi_setup - setup SPI mode and clock rate * @spi: the device whose settings are being modified + * Context: can sleep * * SPI protocol drivers may need to update the transfer mode if the * device doesn't work with the mode 0 default. They may likewise need @@ -474,7 +489,7 @@ static inline void spi_message_free(struct spi_message *m) * The changes take effect the next time the device is selected and data * is transferred to or from it. * - * Note that this call wil fail if the protocol driver specifies an option + * Note that this call will fail if the protocol driver specifies an option * that the underlying controller or its driver does not support. For * example, not all hardware supports wire transfers using nine bit words, * LSB-first wire encoding, or active-high chipselects. @@ -487,9 +502,10 @@ spi_setup(struct spi_device *spi) /** - * spi_async -- asynchronous SPI transfer + * spi_async - asynchronous SPI transfer * @spi: device with which data will be exchanged * @message: describes the data transfers, including completion callback + * Context: any (irqs may be blocked, etc) * * This call may be used in_irq and other contexts which can't sleep, * as well as from task contexts which can sleep. @@ -535,6 +551,7 @@ extern int spi_sync(struct spi_device *spi, struct spi_message *message); * @spi: device to which data will be written * @buf: data buffer * @len: data buffer size + * Context: can sleep * * This writes the buffer and returns zero or a negative error code. * Callable only from contexts that can sleep. @@ -558,8 +575,9 @@ spi_write(struct spi_device *spi, const u8 *buf, size_t len) * @spi: device from which data will be read * @buf: data buffer * @len: data buffer size + * Context: can sleep * - * This writes the buffer and returns zero or a negative error code. + * This reads the buffer and returns zero or a negative error code. * Callable only from contexts that can sleep. */ static inline int @@ -585,6 +603,7 @@ extern int spi_write_then_read(struct spi_device *spi, * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read * @spi: device with which data will be exchanged * @cmd: command to be written before data is read back + * Context: can sleep * * This returns the (unsigned) eight bit number returned by the * device, or else a negative error code. Callable only from @@ -605,6 +624,7 @@ static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read * @spi: device with which data will be exchanged * @cmd: command to be written before data is read back + * Context: can sleep * * This returns the (unsigned) sixteen bit number returned by the * device, or else a negative error code. Callable only from diff --git a/include/linux/spi/spidev.h b/include/linux/spi/spidev.h new file mode 100644 index 000000000000..7d700be57490 --- /dev/null +++ b/include/linux/spi/spidev.h @@ -0,0 +1,124 @@ +/* + * include/linux/spi/spidev.h + * + * Copyright (C) 2006 SWAPP + * Andrea Paterniani <a.paterniani@swapp-eng.it> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef SPIDEV_H +#define SPIDEV_H + + +/* User space versions of kernel symbols for SPI clocking modes, + * matching <linux/spi/spi.h> + */ + +#define SPI_CPHA 0x01 +#define SPI_CPOL 0x02 + +#define SPI_MODE_0 (0|0) +#define SPI_MODE_1 (0|SPI_CPHA) +#define SPI_MODE_2 (SPI_CPOL|0) +#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) + + +/*---------------------------------------------------------------------------*/ + +/* IOCTL commands */ + +#define SPI_IOC_MAGIC 'k' + +/** + * struct spi_ioc_transfer - describes a single SPI transfer + * @tx_buf: Holds pointer to userspace buffer with transmit data, or null. + * If no data is provided, zeroes are shifted out. + * @rx_buf: Holds pointer to userspace buffer for receive data, or null. + * @len: Length of tx and rx buffers, in bytes. + * @speed_hz: Temporary override of the device's bitrate. + * @bits_per_word: Temporary override of the device's wordsize. + * @delay_usecs: If nonzero, how long to delay after the last bit transfer + * before optionally deselecting the device before the next transfer. + * @cs_change: True to deselect device before starting the next transfer. + * + * This structure is mapped directly to the kernel spi_transfer structure; + * the fields have the same meanings, except of course that the pointers + * are in a different address space (and may be of different sizes in some + * cases, such as 32-bit i386 userspace over a 64-bit x86_64 kernel). + * Zero-initialize the structure, including currently unused fields, to + * accomodate potential future updates. + * + * SPI_IOC_MESSAGE gives userspace the equivalent of kernel spi_sync(). + * Pass it an array of related transfers, they'll execute together. + * Each transfer may be half duplex (either direction) or full duplex. + * + * struct spi_ioc_transfer mesg[4]; + * ... + * status = ioctl(fd, SPI_IOC_MESSAGE(4), mesg); + * + * So for example one transfer might send a nine bit command (right aligned + * in a 16-bit word), the next could read a block of 8-bit data before + * terminating that command by temporarily deselecting the chip; the next + * could send a different nine bit command (re-selecting the chip), and the + * last transfer might write some register values. + */ +struct spi_ioc_transfer { + __u64 tx_buf; + __u64 rx_buf; + + __u32 len; + __u32 speed_hz; + + __u16 delay_usecs; + __u8 bits_per_word; + __u8 cs_change; + __u32 pad; + + /* If the contents of 'struct spi_ioc_transfer' ever change + * incompatibly, then the ioctl number (currently 0) must change; + * ioctls with constant size fields get a bit more in the way of + * error checking than ones (like this) where that field varies. + * + * NOTE: struct layout is the same in 64bit and 32bit userspace. + */ +}; + +/* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */ +#define SPI_MSGSIZE(N) \ + ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \ + ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0) +#define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)]) + + +/* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) */ +#define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, __u8) +#define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, __u8) + +/* Read / Write SPI bit justification */ +#define SPI_IOC_RD_LSB_FIRST _IOR(SPI_IOC_MAGIC, 2, __u8) +#define SPI_IOC_WR_LSB_FIRST _IOW(SPI_IOC_MAGIC, 2, __u8) + +/* Read / Write SPI device word length (1..N) */ +#define SPI_IOC_RD_BITS_PER_WORD _IOR(SPI_IOC_MAGIC, 3, __u8) +#define SPI_IOC_WR_BITS_PER_WORD _IOW(SPI_IOC_MAGIC, 3, __u8) + +/* Read / Write SPI device default max speed hz */ +#define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32) +#define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32) + + + +#endif /* SPIDEV_H */ |