diff options
Diffstat (limited to '')
107 files changed, 8617 insertions, 819 deletions
diff --git a/sound/soc/codecs/88pm860x-codec.c b/sound/soc/codecs/88pm860x-codec.c index 3c4b10ff48c1..922006dd0583 100644 --- a/sound/soc/codecs/88pm860x-codec.c +++ b/sound/soc/codecs/88pm860x-codec.c @@ -945,11 +945,11 @@ static int pm860x_pcm_hw_params(struct snd_pcm_substream *substream, unsigned char inf = 0, mask = 0; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: inf &= ~PCM_INF2_18WL; break; - case SNDRV_PCM_FORMAT_S18_3LE: + case 18: inf |= PCM_INF2_18WL; break; default: @@ -1044,11 +1044,11 @@ static int pm860x_i2s_hw_params(struct snd_pcm_substream *substream, unsigned char inf; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: inf = 0; break; - case SNDRV_PCM_FORMAT_S18_3LE: + case 18: inf = PCM_INF2_18WL; break; default: diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 0b9571c858f8..8838838e25ed 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -47,6 +47,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CS42L52 if I2C && INPUT select SND_SOC_CS42L56 if I2C && INPUT select SND_SOC_CS42L73 if I2C + select SND_SOC_CS4265 if I2C select SND_SOC_CS4270 if I2C select SND_SOC_CS4271 if SND_SOC_I2C_AND_SPI select SND_SOC_CS42XX8_I2C if I2C @@ -74,10 +75,12 @@ config SND_SOC_ALL_CODECS select SND_SOC_PCM3008 select SND_SOC_PCM512x_I2C if I2C select SND_SOC_PCM512x_SPI if SPI_MASTER + select SND_SOC_RT286 if I2C select SND_SOC_RT5631 if I2C select SND_SOC_RT5640 if I2C select SND_SOC_RT5645 if I2C select SND_SOC_RT5651 if I2C + select SND_SOC_RT5670 if I2C select SND_SOC_RT5677 if I2C select SND_SOC_SGTL5000 if I2C select SND_SOC_SI476X if MFD_SI476X_CORE @@ -91,6 +94,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_STA350 if I2C select SND_SOC_STA529 if I2C select SND_SOC_STAC9766 if SND_SOC_AC97_BUS + select SND_SOC_TAS2552 if I2C select SND_SOC_TAS5086 if I2C select SND_SOC_TLV320AIC23_I2C if I2C select SND_SOC_TLV320AIC23_SPI if SPI_MASTER @@ -338,6 +342,11 @@ config SND_SOC_CS42L73 tristate "Cirrus Logic CS42L73 CODEC" depends on I2C +config SND_SOC_CS4265 + tristate "Cirrus Logic CS4265 CODEC" + depends on I2C + select REGMAP_I2C + # Cirrus Logic CS4270 Codec config SND_SOC_CS4270 tristate "Cirrus Logic CS4270 CODEC" @@ -445,9 +454,16 @@ config SND_SOC_RL6231 default y if SND_SOC_RT5640=y default y if SND_SOC_RT5645=y default y if SND_SOC_RT5651=y + default y if SND_SOC_RT5670=y + default y if SND_SOC_RT5677=y default m if SND_SOC_RT5640=m default m if SND_SOC_RT5645=m default m if SND_SOC_RT5651=m + default m if SND_SOC_RT5670=m + default m if SND_SOC_RT5677=m + +config SND_SOC_RT286 + tristate config SND_SOC_RT5631 tristate @@ -461,6 +477,9 @@ config SND_SOC_RT5645 config SND_SOC_RT5651 tristate +config SND_SOC_RT5670 + tristate + config SND_SOC_RT5677 tristate @@ -521,6 +540,10 @@ config SND_SOC_STA529 config SND_SOC_STAC9766 tristate +config SND_SOC_TAS2552 + tristate "Texas Instruments TAS2552 Mono Audio amplifier" + depends on I2C + config SND_SOC_TAS5086 tristate "Texas Instruments TAS5086 speaker amplifier" depends on I2C @@ -541,7 +564,9 @@ config SND_SOC_TLV320AIC26 depends on SPI config SND_SOC_TLV320AIC31XX - tristate + tristate "Texas Instruments TLV320AIC31xx CODECs" + depends on I2C + select REGMAP_I2C config SND_SOC_TLV320AIC32X4 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 1bd6e1cf6f82..20afe0f0c5be 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -37,6 +37,7 @@ snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o snd-soc-cs42l52-objs := cs42l52.o snd-soc-cs42l56-objs := cs42l56.o snd-soc-cs42l73-objs := cs42l73.o +snd-soc-cs4265-objs := cs4265.o snd-soc-cs4270-objs := cs4270.o snd-soc-cs4271-objs := cs4271.o snd-soc-cs42xx8-objs := cs42xx8.o @@ -68,10 +69,12 @@ snd-soc-pcm512x-objs := pcm512x.o snd-soc-pcm512x-i2c-objs := pcm512x-i2c.o snd-soc-pcm512x-spi-objs := pcm512x-spi.o snd-soc-rl6231-objs := rl6231.o +snd-soc-rt286-objs := rt286.o snd-soc-rt5631-objs := rt5631.o snd-soc-rt5640-objs := rt5640.o snd-soc-rt5645-objs := rt5645.o snd-soc-rt5651-objs := rt5651.o +snd-soc-rt5670-objs := rt5670.o snd-soc-rt5677-objs := rt5677.o snd-soc-sgtl5000-objs := sgtl5000.o snd-soc-alc5623-objs := alc5623.o @@ -162,6 +165,7 @@ snd-soc-wm-hubs-objs := wm_hubs.o # Amp snd-soc-max9877-objs := max9877.o snd-soc-tpa6130a2-objs := tpa6130a2.o +snd-soc-tas2552-objs := tas2552.o obj-$(CONFIG_SND_SOC_88PM860X) += snd-soc-88pm860x.o obj-$(CONFIG_SND_SOC_AB8500_CODEC) += snd-soc-ab8500-codec.o @@ -204,6 +208,7 @@ obj-$(CONFIG_SND_SOC_CS42L51_I2C) += snd-soc-cs42l51-i2c.o obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o obj-$(CONFIG_SND_SOC_CS42L56) += snd-soc-cs42l56.o obj-$(CONFIG_SND_SOC_CS42L73) += snd-soc-cs42l73.o +obj-$(CONFIG_SND_SOC_CS4265) += snd-soc-cs4265.o obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o obj-$(CONFIG_SND_SOC_CS4271) += snd-soc-cs4271.o obj-$(CONFIG_SND_SOC_CS42XX8) += snd-soc-cs42xx8.o @@ -235,10 +240,12 @@ obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o obj-$(CONFIG_SND_SOC_PCM512x_SPI) += snd-soc-pcm512x-spi.o obj-$(CONFIG_SND_SOC_RL6231) += snd-soc-rl6231.o +obj-$(CONFIG_SND_SOC_RT286) += snd-soc-rt286.o obj-$(CONFIG_SND_SOC_RT5631) += snd-soc-rt5631.o obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o obj-$(CONFIG_SND_SOC_RT5645) += snd-soc-rt5645.o obj-$(CONFIG_SND_SOC_RT5651) += snd-soc-rt5651.o +obj-$(CONFIG_SND_SOC_RT5670) += snd-soc-rt5670.o obj-$(CONFIG_SND_SOC_RT5677) += snd-soc-rt5677.o obj-$(CONFIG_SND_SOC_SGTL5000) += snd-soc-sgtl5000.o obj-$(CONFIG_SND_SOC_SIGMADSP) += snd-soc-sigmadsp.o @@ -255,6 +262,7 @@ obj-$(CONFIG_SND_SOC_STA32X) += snd-soc-sta32x.o obj-$(CONFIG_SND_SOC_STA350) += snd-soc-sta350.o obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o +obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o diff --git a/sound/soc/codecs/ac97.c b/sound/soc/codecs/ac97.c index 8d9ba4ba4bfe..e889e1b84192 100644 --- a/sound/soc/codecs/ac97.c +++ b/sound/soc/codecs/ac97.c @@ -89,8 +89,8 @@ static int ac97_soc_probe(struct snd_soc_codec *codec) int ret; /* add codec as bus device for standard ac97 */ - ret = snd_ac97_bus(codec->card->snd_card, 0, soc_ac97_ops, NULL, - &ac97_bus); + ret = snd_ac97_bus(codec->component.card->snd_card, 0, soc_ac97_ops, + NULL, &ac97_bus); if (ret < 0) return ret; diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index d71c59cf7bdd..370b742117ef 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c @@ -230,8 +230,10 @@ static int adau1701_reg_read(void *context, unsigned int reg, *value = 0; - for (i = 0; i < size; i++) - *value |= recv_buf[i] << (i * 8); + for (i = 0; i < size; i++) { + *value <<= 8; + *value |= recv_buf[i]; + } return 0; } diff --git a/sound/soc/codecs/adau17x1.c b/sound/soc/codecs/adau17x1.c index 2961fae9670a..0b659704e60c 100644 --- a/sound/soc/codecs/adau17x1.c +++ b/sound/soc/codecs/adau17x1.c @@ -359,14 +359,14 @@ static int adau17x1_hw_params(struct snd_pcm_substream *substream, if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) return 0; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: val = ADAU17X1_SERIAL_PORT1_DELAY16; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: val = ADAU17X1_SERIAL_PORT1_DELAY8; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: val = ADAU17X1_SERIAL_PORT1_DELAY0; break; default: diff --git a/sound/soc/codecs/adau1977.c b/sound/soc/codecs/adau1977.c index fd55da7cb9d4..70ab35744aba 100644 --- a/sound/soc/codecs/adau1977.c +++ b/sound/soc/codecs/adau1977.c @@ -968,7 +968,7 @@ int adau1977_probe(struct device *dev, struct regmap *regmap, if (adau1977->dvdd_reg) power_off_mask = ~0; else - power_off_mask = ~ADAU1977_BLOCK_POWER_SAI_LDO_EN; + power_off_mask = (unsigned int)~ADAU1977_BLOCK_POWER_SAI_LDO_EN; ret = regmap_update_bits(adau1977->regmap, ADAU1977_REG_BLOCK_POWER_SAI, power_off_mask, 0x00); diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index 3ba4c0f11418..041712592e29 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c @@ -547,7 +547,7 @@ static const struct ak4642_drvdata ak4648_drvdata = { .extended_frequencies = 1, }; -static struct of_device_id ak4642_of_match[]; +static const struct of_device_id ak4642_of_match[]; static int ak4642_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -593,7 +593,7 @@ static int ak4642_i2c_remove(struct i2c_client *client) return 0; } -static struct of_device_id ak4642_of_match[] = { +static const struct of_device_id ak4642_of_match[] = { { .compatible = "asahi-kasei,ak4642", .data = &ak4642_drvdata}, { .compatible = "asahi-kasei,ak4643", .data = &ak4643_drvdata}, { .compatible = "asahi-kasei,ak4648", .data = &ak4648_drvdata}, diff --git a/sound/soc/codecs/ak5386.c b/sound/soc/codecs/ak5386.c index 72e953b2cb41..8107a1cac876 100644 --- a/sound/soc/codecs/ak5386.c +++ b/sound/soc/codecs/ak5386.c @@ -14,12 +14,18 @@ #include <linux/of.h> #include <linux/of_gpio.h> #include <linux/of_device.h> +#include <linux/regulator/consumer.h> #include <sound/soc.h> #include <sound/pcm.h> #include <sound/initval.h> +static const char * const supply_names[] = { + "va", "vd" +}; + struct ak5386_priv { int reset_gpio; + struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; }; static const struct snd_soc_dapm_widget ak5386_dapm_widgets[] = { @@ -32,7 +38,42 @@ static const struct snd_soc_dapm_route ak5386_dapm_routes[] = { { "Capture", NULL, "AINR" }, }; +static int ak5386_soc_probe(struct snd_soc_codec *codec) +{ + struct ak5386_priv *priv = snd_soc_codec_get_drvdata(codec); + return regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies); +} + +static int ak5386_soc_remove(struct snd_soc_codec *codec) +{ + struct ak5386_priv *priv = snd_soc_codec_get_drvdata(codec); + regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies); + return 0; +} + +#ifdef CONFIG_PM +static int ak5386_soc_suspend(struct snd_soc_codec *codec) +{ + struct ak5386_priv *priv = snd_soc_codec_get_drvdata(codec); + regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies); + return 0; +} + +static int ak5386_soc_resume(struct snd_soc_codec *codec) +{ + struct ak5386_priv *priv = snd_soc_codec_get_drvdata(codec); + return regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies); +} +#else +#define ak5386_soc_suspend NULL +#define ak5386_soc_resume NULL +#endif /* CONFIG_PM */ + static struct snd_soc_codec_driver soc_codec_ak5386 = { + .probe = ak5386_soc_probe, + .remove = ak5386_soc_remove, + .suspend = ak5386_soc_suspend, + .resume = ak5386_soc_resume, .dapm_widgets = ak5386_dapm_widgets, .num_dapm_widgets = ARRAY_SIZE(ak5386_dapm_widgets), .dapm_routes = ak5386_dapm_routes, @@ -122,6 +163,7 @@ static int ak5386_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct ak5386_priv *priv; + int ret, i; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -130,6 +172,14 @@ static int ak5386_probe(struct platform_device *pdev) priv->reset_gpio = -EINVAL; dev_set_drvdata(dev, priv); + for (i = 0; i < ARRAY_SIZE(supply_names); i++) + priv->supplies[i].supply = supply_names[i]; + + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(priv->supplies), + priv->supplies); + if (ret < 0) + return ret; + if (of_match_device(of_match_ptr(ak5386_dt_ids), dev)) priv->reset_gpio = of_get_named_gpio(dev->of_node, "reset-gpio", 0); diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 29e198f57d4c..bd41ee4da078 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -107,7 +107,7 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_POST_PMU: val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3); - if (val & ARIZONA_SPK_SHUTDOWN_STS) { + if (val & ARIZONA_SPK_OVERHEAT_STS) { dev_crit(arizona->dev, "Speaker not enabled due to temperature\n"); return -EBUSY; @@ -159,7 +159,7 @@ static irqreturn_t arizona_thermal_warn(int irq, void *data) if (ret != 0) { dev_err(arizona->dev, "Failed to read thermal status: %d\n", ret); - } else if (val & ARIZONA_SPK_SHUTDOWN_WARN_STS) { + } else if (val & ARIZONA_SPK_OVERHEAT_WARN_STS) { dev_crit(arizona->dev, "Thermal warning\n"); } @@ -177,7 +177,7 @@ static irqreturn_t arizona_thermal_shutdown(int irq, void *data) if (ret != 0) { dev_err(arizona->dev, "Failed to read thermal status: %d\n", ret); - } else if (val & ARIZONA_SPK_SHUTDOWN_STS) { + } else if (val & ARIZONA_SPK_OVERHEAT_STS) { dev_crit(arizona->dev, "Thermal shutdown\n"); ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, @@ -223,7 +223,7 @@ int arizona_init_spk(struct snd_soc_codec *codec) break; } - ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN_WARN, + ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN, "Thermal warning", arizona_thermal_warn, arizona); if (ret != 0) @@ -231,7 +231,7 @@ int arizona_init_spk(struct snd_soc_codec *codec) "Failed to get thermal warning IRQ: %d\n", ret); - ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN, + ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT, "Thermal shutdown", arizona_thermal_shutdown, arizona); if (ret != 0) @@ -243,6 +243,31 @@ int arizona_init_spk(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_init_spk); +static const struct snd_soc_dapm_route arizona_mono_routes[] = { + { "OUT1R", NULL, "OUT1L" }, + { "OUT2R", NULL, "OUT2L" }, + { "OUT3R", NULL, "OUT3L" }, + { "OUT4R", NULL, "OUT4L" }, + { "OUT5R", NULL, "OUT5L" }, + { "OUT6R", NULL, "OUT6L" }, +}; + +int arizona_init_mono(struct snd_soc_codec *codec) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int i; + + for (i = 0; i < ARIZONA_MAX_OUTPUT; ++i) { + if (arizona->pdata.out_mono[i]) + snd_soc_dapm_add_routes(&codec->dapm, + &arizona_mono_routes[i], 1); + } + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_init_mono); + int arizona_init_gpio(struct snd_soc_codec *codec) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -1127,6 +1152,31 @@ static int arizona_startup(struct snd_pcm_substream *substream, constraint); } +static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec, + unsigned int rate) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + struct reg_default dac_comp[] = { + { 0x80, 0x3 }, + { ARIZONA_DAC_COMP_1, 0 }, + { ARIZONA_DAC_COMP_2, 0 }, + { 0x80, 0x0 }, + }; + + mutex_lock(&codec->mutex); + + dac_comp[1].def = arizona->dac_comp_coeff; + if (rate >= 176400) + dac_comp[2].def = arizona->dac_comp_enabled; + + mutex_unlock(&codec->mutex); + + regmap_multi_reg_write(arizona->regmap, + dac_comp, + ARRAY_SIZE(dac_comp)); +} + static int arizona_hw_params_rate(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -1153,6 +1203,15 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: + switch (priv->arizona->type) { + case WM5102: + arizona_wm5102_set_dac_comp(codec, + params_rate(params)); + break; + default: + break; + } + snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1, ARIZONA_SAMPLE_RATE_1_MASK, sr_val); if (base) @@ -1175,6 +1234,27 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, return 0; } +static bool arizona_aif_cfg_changed(struct snd_soc_codec *codec, + int base, int bclk, int lrclk, int frame) +{ + int val; + + val = snd_soc_read(codec, base + ARIZONA_AIF_BCLK_CTRL); + if (bclk != (val & ARIZONA_AIF1_BCLK_FREQ_MASK)) + return true; + + val = snd_soc_read(codec, base + ARIZONA_AIF_TX_BCLK_RATE); + if (lrclk != (val & ARIZONA_AIF1TX_BCPF_MASK)) + return true; + + val = snd_soc_read(codec, base + ARIZONA_AIF_FRAME_CTRL_1); + if (frame != (val & (ARIZONA_AIF1TX_WL_MASK | + ARIZONA_AIF1TX_SLOT_LEN_MASK))) + return true; + + return false; +} + static int arizona_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -1185,26 +1265,40 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, int base = dai->driver->base; const int *rates; int i, ret, val; + int channels = params_channels(params); int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1]; + int tdm_width = arizona->tdm_width[dai->id - 1]; + int tdm_slots = arizona->tdm_slots[dai->id - 1]; int bclk, lrclk, wl, frame, bclk_target; + bool reconfig; + unsigned int aif_tx_state, aif_rx_state; if (params_rate(params) % 8000) rates = &arizona_44k1_bclk_rates[0]; else rates = &arizona_48k_bclk_rates[0]; - bclk_target = snd_soc_params_to_bclk(params); - if (chan_limit && chan_limit < params_channels(params)) { + if (tdm_slots) { + arizona_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n", + tdm_slots, tdm_width); + bclk_target = tdm_slots * tdm_width * params_rate(params); + channels = tdm_slots; + } else { + bclk_target = snd_soc_params_to_bclk(params); + } + + if (chan_limit && chan_limit < channels) { arizona_aif_dbg(dai, "Limiting to %d channels\n", chan_limit); - bclk_target /= params_channels(params); + bclk_target /= channels; bclk_target *= chan_limit; } - /* Force stereo for I2S mode */ + /* Force multiple of 2 channels for I2S mode */ val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT); - if (params_channels(params) == 1 && (val & ARIZONA_AIF1_FMT_MASK)) { + if ((channels & 1) && (val & ARIZONA_AIF1_FMT_MASK)) { arizona_aif_dbg(dai, "Forcing stereo mode\n"); - bclk_target *= 2; + bclk_target /= channels; + bclk_target *= channels + 1; } for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) { @@ -1228,28 +1322,56 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, wl = snd_pcm_format_width(params_format(params)); frame = wl << ARIZONA_AIF1TX_WL_SHIFT | wl; + reconfig = arizona_aif_cfg_changed(codec, base, bclk, lrclk, frame); + + if (reconfig) { + /* Save AIF TX/RX state */ + aif_tx_state = snd_soc_read(codec, + base + ARIZONA_AIF_TX_ENABLES); + aif_rx_state = snd_soc_read(codec, + base + ARIZONA_AIF_RX_ENABLES); + /* Disable AIF TX/RX before reconfiguring it */ + regmap_update_bits_async(arizona->regmap, + base + ARIZONA_AIF_TX_ENABLES, 0xff, 0x0); + regmap_update_bits(arizona->regmap, + base + ARIZONA_AIF_RX_ENABLES, 0xff, 0x0); + } + ret = arizona_hw_params_rate(substream, params, dai); if (ret != 0) - return ret; + goto restore_aif; - regmap_update_bits_async(arizona->regmap, - base + ARIZONA_AIF_BCLK_CTRL, - ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); - regmap_update_bits_async(arizona->regmap, - base + ARIZONA_AIF_TX_BCLK_RATE, - ARIZONA_AIF1TX_BCPF_MASK, lrclk); - regmap_update_bits_async(arizona->regmap, - base + ARIZONA_AIF_RX_BCLK_RATE, - ARIZONA_AIF1RX_BCPF_MASK, lrclk); - regmap_update_bits_async(arizona->regmap, - base + ARIZONA_AIF_FRAME_CTRL_1, - ARIZONA_AIF1TX_WL_MASK | - ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); - regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FRAME_CTRL_2, - ARIZONA_AIF1RX_WL_MASK | - ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); + if (reconfig) { + regmap_update_bits_async(arizona->regmap, + base + ARIZONA_AIF_BCLK_CTRL, + ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); + regmap_update_bits_async(arizona->regmap, + base + ARIZONA_AIF_TX_BCLK_RATE, + ARIZONA_AIF1TX_BCPF_MASK, lrclk); + regmap_update_bits_async(arizona->regmap, + base + ARIZONA_AIF_RX_BCLK_RATE, + ARIZONA_AIF1RX_BCPF_MASK, lrclk); + regmap_update_bits_async(arizona->regmap, + base + ARIZONA_AIF_FRAME_CTRL_1, + ARIZONA_AIF1TX_WL_MASK | + ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); + regmap_update_bits(arizona->regmap, + base + ARIZONA_AIF_FRAME_CTRL_2, + ARIZONA_AIF1RX_WL_MASK | + ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); + } - return 0; +restore_aif: + if (reconfig) { + /* Restore AIF TX/RX state */ + regmap_update_bits_async(arizona->regmap, + base + ARIZONA_AIF_TX_ENABLES, + 0xff, aif_tx_state); + regmap_update_bits(arizona->regmap, + base + ARIZONA_AIF_RX_ENABLES, + 0xff, aif_rx_state); + } + return ret; } static const char *arizona_dai_clk_str(int clk_id) @@ -1324,9 +1446,63 @@ static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate) ARIZONA_AIF1_TRI, reg); } +static void arizona_set_channels_to_mask(struct snd_soc_dai *dai, + unsigned int base, + int channels, unsigned int mask) +{ + struct snd_soc_codec *codec = dai->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int slot, i; + + for (i = 0; i < channels; ++i) { + slot = ffs(mask) - 1; + if (slot < 0) + return; + + regmap_write(arizona->regmap, base + i, slot); + + mask &= ~(1 << slot); + } + + if (mask) + arizona_aif_warn(dai, "Too many channels in TDM mask\n"); +} + +static int arizona_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, + unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_codec *codec = dai->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int base = dai->driver->base; + int rx_max_chan = dai->driver->playback.channels_max; + int tx_max_chan = dai->driver->capture.channels_max; + + /* Only support TDM for the physical AIFs */ + if (dai->id > ARIZONA_MAX_AIF) + return -ENOTSUPP; + + if (slots == 0) { + tx_mask = (1 << tx_max_chan) - 1; + rx_mask = (1 << rx_max_chan) - 1; + } + + arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_3, + tx_max_chan, tx_mask); + arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_11, + rx_max_chan, rx_mask); + + arizona->tdm_width[dai->id - 1] = slot_width; + arizona->tdm_slots[dai->id - 1] = slots; + + return 0; +} + const struct snd_soc_dai_ops arizona_dai_ops = { .startup = arizona_startup, .set_fmt = arizona_set_fmt, + .set_tdm_slot = arizona_set_tdm_slot, .hw_params = arizona_hw_params, .set_sysclk = arizona_dai_set_sysclk, .set_tristate = arizona_set_tristate, @@ -1400,6 +1576,12 @@ static int arizona_validate_fll(struct arizona_fll *fll, { unsigned int Fvco_min; + if (fll->fout && Fout != fll->fout) { + arizona_fll_err(fll, + "Can't change output on active FLL\n"); + return -EINVAL; + } + if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) { arizona_fll_err(fll, "Can't scale %dMHz in to <=13.5MHz\n", @@ -1478,6 +1660,10 @@ static int arizona_calc_fratio(struct arizona_fll *fll, while (div <= ARIZONA_FLL_MAX_REFDIV) { for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO; ratio++) { + if ((ARIZONA_FLL_VCO_CORNER / 2) / + (fll->vco_mult * ratio) < Fref) + break; + if (target % (ratio * Fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; @@ -1485,11 +1671,7 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } } - for (ratio = init_ratio - 1; ratio >= 0; ratio--) { - if (ARIZONA_FLL_VCO_CORNER / (fll->vco_mult * ratio) < - Fref) - break; - + for (ratio = init_ratio - 1; ratio > 0; ratio--) { if (target % (ratio * Fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; @@ -1616,7 +1798,7 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, ARIZONA_FLL1_CTRL_UPD | cfg->n); } -static bool arizona_is_enabled_fll(struct arizona_fll *fll) +static int arizona_is_enabled_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; unsigned int reg; @@ -1632,13 +1814,26 @@ static bool arizona_is_enabled_fll(struct arizona_fll *fll) return reg & ARIZONA_FLL1_ENA; } -static void arizona_enable_fll(struct arizona_fll *fll) +static int arizona_enable_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; int ret; bool use_sync = false; + int already_enabled = arizona_is_enabled_fll(fll); struct arizona_fll_cfg cfg; + if (already_enabled < 0) + return already_enabled; + + if (already_enabled) { + /* Facilitate smooth refclk across the transition */ + regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x7, + ARIZONA_FLL1_GAIN_MASK, 0); + regmap_update_bits_async(fll->arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, + ARIZONA_FLL1_FREERUN); + } + /* * If we have both REFCLK and SYNCCLK then enable both, * otherwise apply the SYNCCLK settings to REFCLK. @@ -1666,7 +1861,7 @@ static void arizona_enable_fll(struct arizona_fll *fll) ARIZONA_FLL1_SYNC_ENA, 0); } else { arizona_fll_err(fll, "No clocks provided\n"); - return; + return -EINVAL; } /* @@ -1681,25 +1876,29 @@ static void arizona_enable_fll(struct arizona_fll *fll) ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW); - if (!arizona_is_enabled_fll(fll)) + if (!already_enabled) pm_runtime_get(arizona->dev); /* Clear any pending completions */ try_wait_for_completion(&fll->ok); regmap_update_bits_async(arizona->regmap, fll->base + 1, - ARIZONA_FLL1_FREERUN, 0); - regmap_update_bits_async(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); if (use_sync) regmap_update_bits_async(arizona->regmap, fll->base + 0x11, ARIZONA_FLL1_SYNC_ENA, ARIZONA_FLL1_SYNC_ENA); + if (already_enabled) + regmap_update_bits_async(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); + ret = wait_for_completion_timeout(&fll->ok, msecs_to_jiffies(250)); if (ret == 0) arizona_fll_warn(fll, "Timed out waiting for lock\n"); + + return 0; } static void arizona_disable_fll(struct arizona_fll *fll) @@ -1713,6 +1912,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) ARIZONA_FLL1_ENA, 0, &change); regmap_update_bits(arizona->regmap, fll->base + 0x11, ARIZONA_FLL1_SYNC_ENA, 0); + regmap_update_bits_async(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); if (change) pm_runtime_put_autosuspend(arizona->dev); @@ -1721,7 +1922,7 @@ static void arizona_disable_fll(struct arizona_fll *fll) int arizona_set_fll_refclk(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout) { - int ret; + int ret = 0; if (fll->ref_src == source && fll->ref_freq == Fref) return 0; @@ -1736,17 +1937,17 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source, fll->ref_freq = Fref; if (fll->fout && Fref > 0) { - arizona_enable_fll(fll); + ret = arizona_enable_fll(fll); } - return 0; + return ret; } EXPORT_SYMBOL_GPL(arizona_set_fll_refclk); int arizona_set_fll(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout) { - int ret; + int ret = 0; if (fll->sync_src == source && fll->sync_freq == Fref && fll->fout == Fout) @@ -1768,13 +1969,12 @@ int arizona_set_fll(struct arizona_fll *fll, int source, fll->sync_freq = Fref; fll->fout = Fout; - if (Fout) { - arizona_enable_fll(fll); - } else { + if (Fout) + ret = arizona_enable_fll(fll); + else arizona_disable_fll(fll); - } - return 0; + return ret; } EXPORT_SYMBOL_GPL(arizona_set_fll); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 05ae17f5bca3..942cfb197b6d 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -249,6 +249,7 @@ extern int arizona_set_fll(struct arizona_fll *fll, int source, extern int arizona_init_spk(struct snd_soc_codec *codec); extern int arizona_init_gpio(struct snd_soc_codec *codec); +extern int arizona_init_mono(struct snd_soc_codec *codec); extern int arizona_init_dai(struct arizona_priv *priv, int dai); diff --git a/sound/soc/codecs/cs4265.c b/sound/soc/codecs/cs4265.c new file mode 100644 index 000000000000..a20b30ca52c0 --- /dev/null +++ b/sound/soc/codecs/cs4265.c @@ -0,0 +1,682 @@ +/* + * cs4265.c -- CS4265 ALSA SoC audio driver + * + * Copyright 2014 Cirrus Logic, Inc. + * + * Author: Paul Handrigan <paul.handrigan@cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/kernel.h> +#include <linux/gpio/consumer.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/input.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <linux/platform_device.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include "cs4265.h" + +struct cs4265_private { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *reset_gpio; + u8 format; + u32 sysclk; +}; + +static const struct reg_default cs4265_reg_defaults[] = { + { CS4265_PWRCTL, 0x0F }, + { CS4265_DAC_CTL, 0x08 }, + { CS4265_ADC_CTL, 0x00 }, + { CS4265_MCLK_FREQ, 0x00 }, + { CS4265_SIG_SEL, 0x40 }, + { CS4265_CHB_PGA_CTL, 0x00 }, + { CS4265_CHA_PGA_CTL, 0x00 }, + { CS4265_ADC_CTL2, 0x19 }, + { CS4265_DAC_CHA_VOL, 0x00 }, + { CS4265_DAC_CHB_VOL, 0x00 }, + { CS4265_DAC_CTL2, 0xC0 }, + { CS4265_SPDIF_CTL1, 0x00 }, + { CS4265_SPDIF_CTL2, 0x00 }, + { CS4265_INT_MASK, 0x00 }, + { CS4265_STATUS_MODE_MSB, 0x00 }, + { CS4265_STATUS_MODE_LSB, 0x00 }, +}; + +static bool cs4265_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS4265_PWRCTL: + case CS4265_DAC_CTL: + case CS4265_ADC_CTL: + case CS4265_MCLK_FREQ: + case CS4265_SIG_SEL: + case CS4265_CHB_PGA_CTL: + case CS4265_CHA_PGA_CTL: + case CS4265_ADC_CTL2: + case CS4265_DAC_CHA_VOL: + case CS4265_DAC_CHB_VOL: + case CS4265_DAC_CTL2: + case CS4265_SPDIF_CTL1: + case CS4265_SPDIF_CTL2: + case CS4265_INT_MASK: + case CS4265_STATUS_MODE_MSB: + case CS4265_STATUS_MODE_LSB: + return true; + default: + return false; + } +} + +static bool cs4265_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS4265_INT_STATUS: + return true; + default: + return false; + } +} + +static DECLARE_TLV_DB_SCALE(pga_tlv, -1200, 50, 0); + +static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 0); + +static const char * const digital_input_mux_text[] = { + "SDIN1", "SDIN2" +}; + +static SOC_ENUM_SINGLE_DECL(digital_input_mux_enum, CS4265_SIG_SEL, 7, + digital_input_mux_text); + +static const struct snd_kcontrol_new digital_input_mux = + SOC_DAPM_ENUM("Digital Input Mux", digital_input_mux_enum); + +static const char * const mic_linein_text[] = { + "MIC", "LINEIN" +}; + +static SOC_ENUM_SINGLE_DECL(mic_linein_enum, CS4265_ADC_CTL2, 0, + mic_linein_text); + +static const char * const cam_mode_text[] = { + "One Byte", "Two Byte" +}; + +static SOC_ENUM_SINGLE_DECL(cam_mode_enum, CS4265_SPDIF_CTL1, 5, + cam_mode_text); + +static const char * const cam_mono_stereo_text[] = { + "Stereo", "Mono" +}; + +static SOC_ENUM_SINGLE_DECL(spdif_mono_stereo_enum, CS4265_SPDIF_CTL2, 2, + cam_mono_stereo_text); + +static const char * const mono_select_text[] = { + "Channel A", "Channel B" +}; + +static SOC_ENUM_SINGLE_DECL(spdif_mono_select_enum, CS4265_SPDIF_CTL2, 0, + mono_select_text); + +static const struct snd_kcontrol_new mic_linein_mux = + SOC_DAPM_ENUM("ADC Input Capture Mux", mic_linein_enum); + +static const struct snd_kcontrol_new loopback_ctl = + SOC_DAPM_SINGLE("Switch", CS4265_SIG_SEL, 1, 1, 0); + +static const struct snd_kcontrol_new spdif_switch = + SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 0, 0); + +static const struct snd_kcontrol_new dac_switch = + SOC_DAPM_SINGLE("Switch", CS4265_PWRCTL, 1, 1, 0); + +static const struct snd_kcontrol_new cs4265_snd_controls[] = { + + SOC_DOUBLE_R_SX_TLV("PGA Volume", CS4265_CHA_PGA_CTL, + CS4265_CHB_PGA_CTL, 0, 0x28, 0x30, pga_tlv), + SOC_DOUBLE_R_TLV("DAC Volume", CS4265_DAC_CHA_VOL, + CS4265_DAC_CHB_VOL, 0, 0xFF, 1, dac_tlv), + SOC_SINGLE("De-emp 44.1kHz Switch", CS4265_DAC_CTL, 1, + 1, 0), + SOC_SINGLE("DAC INV Switch", CS4265_DAC_CTL2, 5, + 1, 0), + SOC_SINGLE("DAC Zero Cross Switch", CS4265_DAC_CTL2, 6, + 1, 0), + SOC_SINGLE("DAC Soft Ramp Switch", CS4265_DAC_CTL2, 7, + 1, 0), + SOC_SINGLE("ADC HPF Switch", CS4265_ADC_CTL, 1, + 1, 0), + SOC_SINGLE("ADC Zero Cross Switch", CS4265_ADC_CTL2, 3, + 1, 1), + SOC_SINGLE("ADC Soft Ramp Switch", CS4265_ADC_CTL2, 7, + 1, 0), + SOC_SINGLE("E to F Buffer Disable Switch", CS4265_SPDIF_CTL1, + 6, 1, 0), + SOC_ENUM("C Data Access", cam_mode_enum), + SOC_SINGLE("Validity Bit Control Switch", CS4265_SPDIF_CTL2, + 3, 1, 0), + SOC_ENUM("SPDIF Mono/Stereo", spdif_mono_stereo_enum), + SOC_SINGLE("MMTLR Data Switch", 0, + 1, 1, 0), + SOC_ENUM("Mono Channel Select", spdif_mono_select_enum), + SND_SOC_BYTES("C Data Buffer", CS4265_C_DATA_BUFF, 24), +}; + +static const struct snd_soc_dapm_widget cs4265_dapm_widgets[] = { + + SND_SOC_DAPM_INPUT("LINEINL"), + SND_SOC_DAPM_INPUT("LINEINR"), + SND_SOC_DAPM_INPUT("MICL"), + SND_SOC_DAPM_INPUT("MICR"), + + SND_SOC_DAPM_AIF_OUT("DOUT", NULL, 0, + SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("SPDIFOUT", NULL, 0, + SND_SOC_NOPM, 0, 0), + + SND_SOC_DAPM_MUX("ADC Mux", SND_SOC_NOPM, 0, 0, &mic_linein_mux), + + SND_SOC_DAPM_ADC("ADC", NULL, CS4265_PWRCTL, 2, 1), + SND_SOC_DAPM_PGA("Pre-amp MIC", CS4265_PWRCTL, 3, + 1, NULL, 0), + + SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, + 0, 0, &digital_input_mux), + + SND_SOC_DAPM_MIXER("SDIN1 Input Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("SDIN2 Input Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("SPDIF Transmitter", SND_SOC_NOPM, 0, 0, NULL, 0), + + SND_SOC_DAPM_SWITCH("Loopback", SND_SOC_NOPM, 0, 0, + &loopback_ctl), + SND_SOC_DAPM_SWITCH("SPDIF", SND_SOC_NOPM, 0, 0, + &spdif_switch), + SND_SOC_DAPM_SWITCH("DAC", CS4265_PWRCTL, 1, 1, + &dac_switch), + + SND_SOC_DAPM_AIF_IN("DIN1", NULL, 0, + SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("DIN2", NULL, 0, + SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("TXIN", NULL, 0, + CS4265_SPDIF_CTL2, 5, 1), + + SND_SOC_DAPM_OUTPUT("LINEOUTL"), + SND_SOC_DAPM_OUTPUT("LINEOUTR"), + +}; + +static const struct snd_soc_dapm_route cs4265_audio_map[] = { + + {"DIN1", NULL, "DAI1 Playback"}, + {"DIN2", NULL, "DAI2 Playback"}, + {"SDIN1 Input Mixer", NULL, "DIN1"}, + {"SDIN2 Input Mixer", NULL, "DIN2"}, + {"Input Mux", "SDIN1", "SDIN1 Input Mixer"}, + {"Input Mux", "SDIN2", "SDIN2 Input Mixer"}, + {"DAC", "Switch", "Input Mux"}, + {"SPDIF", "Switch", "Input Mux"}, + {"LINEOUTL", NULL, "DAC"}, + {"LINEOUTR", NULL, "DAC"}, + {"SPDIFOUT", NULL, "SPDIF"}, + + {"ADC Mux", "LINEIN", "LINEINL"}, + {"ADC Mux", "LINEIN", "LINEINR"}, + {"ADC Mux", "MIC", "MICL"}, + {"ADC Mux", "MIC", "MICR"}, + {"ADC", NULL, "ADC Mux"}, + {"DOUT", NULL, "ADC"}, + {"DAI1 Capture", NULL, "DOUT"}, + {"DAI2 Capture", NULL, "DOUT"}, + + /* Loopback */ + {"Loopback", "Switch", "ADC"}, + {"DAC", NULL, "Loopback"}, +}; + +struct cs4265_clk_para { + u32 mclk; + u32 rate; + u8 fm_mode; /* values 1, 2, or 4 */ + u8 mclkdiv; +}; + +static const struct cs4265_clk_para clk_map_table[] = { + /*32k*/ + {8192000, 32000, 0, 0}, + {12288000, 32000, 0, 1}, + {16384000, 32000, 0, 2}, + {24576000, 32000, 0, 3}, + {32768000, 32000, 0, 4}, + + /*44.1k*/ + {11289600, 44100, 0, 0}, + {16934400, 44100, 0, 1}, + {22579200, 44100, 0, 2}, + {33868000, 44100, 0, 3}, + {45158400, 44100, 0, 4}, + + /*48k*/ + {12288000, 48000, 0, 0}, + {18432000, 48000, 0, 1}, + {24576000, 48000, 0, 2}, + {36864000, 48000, 0, 3}, + {49152000, 48000, 0, 4}, + + /*64k*/ + {8192000, 64000, 1, 0}, + {1228800, 64000, 1, 1}, + {1693440, 64000, 1, 2}, + {2457600, 64000, 1, 3}, + {3276800, 64000, 1, 4}, + + /* 88.2k */ + {11289600, 88200, 1, 0}, + {16934400, 88200, 1, 1}, + {22579200, 88200, 1, 2}, + {33868000, 88200, 1, 3}, + {45158400, 88200, 1, 4}, + + /* 96k */ + {12288000, 96000, 1, 0}, + {18432000, 96000, 1, 1}, + {24576000, 96000, 1, 2}, + {36864000, 96000, 1, 3}, + {49152000, 96000, 1, 4}, + + /* 128k */ + {8192000, 128000, 2, 0}, + {12288000, 128000, 2, 1}, + {16934400, 128000, 2, 2}, + {24576000, 128000, 2, 3}, + {32768000, 128000, 2, 4}, + + /* 176.4k */ + {11289600, 176400, 2, 0}, + {16934400, 176400, 2, 1}, + {22579200, 176400, 2, 2}, + {33868000, 176400, 2, 3}, + {49152000, 176400, 2, 4}, + + /* 192k */ + {12288000, 192000, 2, 0}, + {18432000, 192000, 2, 1}, + {24576000, 192000, 2, 2}, + {36864000, 192000, 2, 3}, + {49152000, 192000, 2, 4}, +}; + +static int cs4265_get_clk_index(int mclk, int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(clk_map_table); i++) { + if (clk_map_table[i].rate == rate && + clk_map_table[i].mclk == mclk) + return i; + } + return -EINVAL; +} + +static int cs4265_set_sysclk(struct snd_soc_dai *codec_dai, int clk_id, + unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs4265_private *cs4265 = snd_soc_codec_get_drvdata(codec); + int i; + + if (clk_id != 0) { + dev_err(codec->dev, "Invalid clk_id %d\n", clk_id); + return -EINVAL; + } + for (i = 0; i < ARRAY_SIZE(clk_map_table); i++) { + if (clk_map_table[i].mclk == freq) { + cs4265->sysclk = freq; + return 0; + } + } + cs4265->sysclk = 0; + dev_err(codec->dev, "Invalid freq parameter %d\n", freq); + return -EINVAL; +} + +static int cs4265_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs4265_private *cs4265 = snd_soc_codec_get_drvdata(codec); + u8 iface = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_ADC_MASTER, + CS4265_ADC_MASTER); + break; + case SND_SOC_DAIFMT_CBS_CFS: + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_ADC_MASTER, + 0); + break; + default: + return -EINVAL; + } + + /* interface format */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + iface |= SND_SOC_DAIFMT_I2S; + break; + case SND_SOC_DAIFMT_RIGHT_J: + iface |= SND_SOC_DAIFMT_RIGHT_J; + break; + case SND_SOC_DAIFMT_LEFT_J: + iface |= SND_SOC_DAIFMT_LEFT_J; + break; + default: + return -EINVAL; + } + + cs4265->format = iface; + return 0; +} + +static int cs4265_digital_mute(struct snd_soc_dai *dai, int mute) +{ + struct snd_soc_codec *codec = dai->codec; + + if (mute) { + snd_soc_update_bits(codec, CS4265_DAC_CTL, + CS4265_DAC_CTL_MUTE, + CS4265_DAC_CTL_MUTE); + snd_soc_update_bits(codec, CS4265_SPDIF_CTL2, + CS4265_SPDIF_CTL2_MUTE, + CS4265_SPDIF_CTL2_MUTE); + } else { + snd_soc_update_bits(codec, CS4265_DAC_CTL, + CS4265_DAC_CTL_MUTE, + 0); + snd_soc_update_bits(codec, CS4265_SPDIF_CTL2, + CS4265_SPDIF_CTL2_MUTE, + 0); + } + return 0; +} + +static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs4265_private *cs4265 = snd_soc_codec_get_drvdata(codec); + int index; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE && + ((cs4265->format & SND_SOC_DAIFMT_FORMAT_MASK) + == SND_SOC_DAIFMT_RIGHT_J)) + return -EINVAL; + + index = cs4265_get_clk_index(cs4265->sysclk, params_rate(params)); + if (index >= 0) { + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_ADC_FM, clk_map_table[index].fm_mode); + snd_soc_update_bits(codec, CS4265_MCLK_FREQ, + CS4265_MCLK_FREQ_MASK, + clk_map_table[index].mclkdiv); + + } else { + dev_err(codec->dev, "can't get correct mclk\n"); + return -EINVAL; + } + + switch (cs4265->format & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + snd_soc_update_bits(codec, CS4265_DAC_CTL, + CS4265_DAC_CTL_DIF, (1 << 4)); + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_ADC_DIF, (1 << 4)); + snd_soc_update_bits(codec, CS4265_SPDIF_CTL2, + CS4265_SPDIF_CTL2_DIF, (1 << 6)); + break; + case SND_SOC_DAIFMT_RIGHT_J: + if (params_width(params) == 16) { + snd_soc_update_bits(codec, CS4265_DAC_CTL, + CS4265_DAC_CTL_DIF, (1 << 5)); + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_SPDIF_CTL2_DIF, (1 << 7)); + } else { + snd_soc_update_bits(codec, CS4265_DAC_CTL, + CS4265_DAC_CTL_DIF, (3 << 5)); + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_SPDIF_CTL2_DIF, (1 << 7)); + } + break; + case SND_SOC_DAIFMT_LEFT_J: + snd_soc_update_bits(codec, CS4265_DAC_CTL, + CS4265_DAC_CTL_DIF, 0); + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_ADC_DIF, 0); + snd_soc_update_bits(codec, CS4265_ADC_CTL, + CS4265_SPDIF_CTL2_DIF, (1 << 6)); + + break; + default: + return -EINVAL; + } + return 0; +} + +static int cs4265_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + switch (level) { + case SND_SOC_BIAS_ON: + break; + case SND_SOC_BIAS_PREPARE: + snd_soc_update_bits(codec, CS4265_PWRCTL, + CS4265_PWRCTL_PDN, 0); + break; + case SND_SOC_BIAS_STANDBY: + snd_soc_update_bits(codec, CS4265_PWRCTL, + CS4265_PWRCTL_PDN, + CS4265_PWRCTL_PDN); + break; + case SND_SOC_BIAS_OFF: + snd_soc_update_bits(codec, CS4265_PWRCTL, + CS4265_PWRCTL_PDN, + CS4265_PWRCTL_PDN); + break; + } + codec->dapm.bias_level = level; + return 0; +} + +#define CS4265_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \ + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \ + SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000) + +#define CS4265_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_U24_LE) + +static const struct snd_soc_dai_ops cs4265_ops = { + .hw_params = cs4265_pcm_hw_params, + .digital_mute = cs4265_digital_mute, + .set_fmt = cs4265_set_fmt, + .set_sysclk = cs4265_set_sysclk, +}; + +static struct snd_soc_dai_driver cs4265_dai[] = { + { + .name = "cs4265-dai1", + .playback = { + .stream_name = "DAI1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = CS4265_RATES, + .formats = CS4265_FORMATS, + }, + .capture = { + .stream_name = "DAI1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = CS4265_RATES, + .formats = CS4265_FORMATS, + }, + .ops = &cs4265_ops, + }, + { + .name = "cs4265-dai2", + .playback = { + .stream_name = "DAI2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = CS4265_RATES, + .formats = CS4265_FORMATS, + }, + .capture = { + .stream_name = "DAI2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = CS4265_RATES, + .formats = CS4265_FORMATS, + }, + .ops = &cs4265_ops, + }, +}; + +static const struct snd_soc_codec_driver soc_codec_cs4265 = { + .set_bias_level = cs4265_set_bias_level, + + .dapm_widgets = cs4265_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs4265_dapm_widgets), + .dapm_routes = cs4265_audio_map, + .num_dapm_routes = ARRAY_SIZE(cs4265_audio_map), + + .controls = cs4265_snd_controls, + .num_controls = ARRAY_SIZE(cs4265_snd_controls), +}; + +static const struct regmap_config cs4265_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = CS4265_MAX_REGISTER, + .reg_defaults = cs4265_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(cs4265_reg_defaults), + .readable_reg = cs4265_readable_register, + .volatile_reg = cs4265_volatile_register, + .cache_type = REGCACHE_RBTREE, +}; + +static int cs4265_i2c_probe(struct i2c_client *i2c_client, + const struct i2c_device_id *id) +{ + struct cs4265_private *cs4265; + int ret = 0; + unsigned int devid = 0; + unsigned int reg; + + cs4265 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4265_private), + GFP_KERNEL); + if (cs4265 == NULL) + return -ENOMEM; + cs4265->dev = &i2c_client->dev; + + cs4265->regmap = devm_regmap_init_i2c(i2c_client, &cs4265_regmap); + if (IS_ERR(cs4265->regmap)) { + ret = PTR_ERR(cs4265->regmap); + dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); + return ret; + } + + cs4265->reset_gpio = devm_gpiod_get(&i2c_client->dev, + "reset-gpios"); + if (IS_ERR(cs4265->reset_gpio)) { + ret = PTR_ERR(cs4265->reset_gpio); + if (ret != -ENOENT && ret != -ENOSYS) + return ret; + + cs4265->reset_gpio = NULL; + } else { + ret = gpiod_direction_output(cs4265->reset_gpio, 0); + if (ret) + return ret; + mdelay(1); + gpiod_set_value_cansleep(cs4265->reset_gpio, 1); + + } + + i2c_set_clientdata(i2c_client, cs4265); + + ret = regmap_read(cs4265->regmap, CS4265_CHIP_ID, ®); + devid = reg & CS4265_CHIP_ID_MASK; + if (devid != CS4265_CHIP_ID_VAL) { + ret = -ENODEV; + dev_err(&i2c_client->dev, + "CS4265 Device ID (%X). Expected %X\n", + devid, CS4265_CHIP_ID); + return ret; + } + dev_info(&i2c_client->dev, + "CS4265 Version %x\n", + reg & CS4265_REV_ID_MASK); + + regmap_write(cs4265->regmap, CS4265_PWRCTL, 0x0F); + + ret = snd_soc_register_codec(&i2c_client->dev, + &soc_codec_cs4265, cs4265_dai, + ARRAY_SIZE(cs4265_dai)); + return ret; +} + +static int cs4265_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + +static const struct of_device_id cs4265_of_match[] = { + { .compatible = "cirrus,cs4265", }, + { } +}; +MODULE_DEVICE_TABLE(of, cs4265_of_match); + +static const struct i2c_device_id cs4265_id[] = { + { "cs4265", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cs4265_id); + +static struct i2c_driver cs4265_i2c_driver = { + .driver = { + .name = "cs4265", + .owner = THIS_MODULE, + .of_match_table = cs4265_of_match, + }, + .id_table = cs4265_id, + .probe = cs4265_i2c_probe, + .remove = cs4265_i2c_remove, +}; + +module_i2c_driver(cs4265_i2c_driver); + +MODULE_DESCRIPTION("ASoC CS4265 driver"); +MODULE_AUTHOR("Paul Handrigan, Cirrus Logic Inc, <paul.handrigan@cirrus.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs4265.h b/sound/soc/codecs/cs4265.h new file mode 100644 index 000000000000..0a80a8dcec67 --- /dev/null +++ b/sound/soc/codecs/cs4265.h @@ -0,0 +1,64 @@ +/* + * cs4265.h -- CS4265 ALSA SoC audio driver + * + * Copyright 2014 Cirrus Logic, Inc. + * + * Author: Paul Handrigan <paul.handrigan@cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __CS4265_H__ +#define __CS4265_H__ + +#define CS4265_CHIP_ID 0x1 +#define CS4265_CHIP_ID_VAL 0xD0 +#define CS4265_CHIP_ID_MASK 0xF0 +#define CS4265_REV_ID_MASK 0x0F + +#define CS4265_PWRCTL 0x02 +#define CS4265_PWRCTL_PDN 1 + +#define CS4265_DAC_CTL 0x3 +#define CS4265_DAC_CTL_MUTE (1 << 2) +#define CS4265_DAC_CTL_DIF (3 << 4) + +#define CS4265_ADC_CTL 0x4 +#define CS4265_ADC_MASTER 1 +#define CS4265_ADC_DIF (1 << 4) +#define CS4265_ADC_FM (3 << 6) + +#define CS4265_MCLK_FREQ 0x5 +#define CS4265_MCLK_FREQ_MASK (7 << 4) + +#define CS4265_SIG_SEL 0x6 +#define CS4265_SIG_SEL_LOOP (1 << 1) + +#define CS4265_CHB_PGA_CTL 0x7 +#define CS4265_CHA_PGA_CTL 0x8 + +#define CS4265_ADC_CTL2 0x9 + +#define CS4265_DAC_CHA_VOL 0xA +#define CS4265_DAC_CHB_VOL 0xB + +#define CS4265_DAC_CTL2 0xC + +#define CS4265_INT_STATUS 0xD +#define CS4265_INT_MASK 0xE +#define CS4265_STATUS_MODE_MSB 0xF +#define CS4265_STATUS_MODE_LSB 0x10 + +#define CS4265_SPDIF_CTL1 0x11 + +#define CS4265_SPDIF_CTL2 0x12 +#define CS4265_SPDIF_CTL2_MUTE (1 << 4) +#define CS4265_SPDIF_CTL2_DIF (3 << 6) + +#define CS4265_C_DATA_BUFF 0x13 +#define CS4265_MAX_REGISTER 0x2A + +#endif diff --git a/sound/soc/codecs/cs4270.c b/sound/soc/codecs/cs4270.c index 9947a9583679..e6d4ff9fd992 100644 --- a/sound/soc/codecs/cs4270.c +++ b/sound/soc/codecs/cs4270.c @@ -664,10 +664,8 @@ static int cs4270_i2c_probe(struct i2c_client *i2c_client, cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private), GFP_KERNEL); - if (!cs4270) { - dev_err(&i2c_client->dev, "could not allocate codec\n"); + if (!cs4270) return -ENOMEM; - } /* get the power supply regulators */ for (i = 0; i < ARRAY_SIZE(supply_names); i++) diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 071fc77f2f06..969167d8b71e 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -399,15 +399,15 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { CS42L52_MASTERB_VOL, 0, 0x34, 0xE4, hl_tlv), SOC_DOUBLE_R_SX_TLV("Headphone Volume", CS42L52_HPA_VOL, - CS42L52_HPB_VOL, 0, 0x34, 0xCC, hpd_tlv), + CS42L52_HPB_VOL, 0, 0x34, 0xC0, hpd_tlv), SOC_ENUM("Headphone Analog Gain", hp_gain_enum), SOC_DOUBLE_R_SX_TLV("Speaker Volume", CS42L52_SPKA_VOL, - CS42L52_SPKB_VOL, 0, 0x1, 0xff, hl_tlv), + CS42L52_SPKB_VOL, 0, 0x40, 0xC0, hl_tlv), SOC_DOUBLE_R_SX_TLV("Bypass Volume", CS42L52_PASSTHRUA_VOL, - CS42L52_PASSTHRUB_VOL, 6, 0x18, 0x90, pga_tlv), + CS42L52_PASSTHRUB_VOL, 0, 0x88, 0x90, pga_tlv), SOC_DOUBLE("Bypass Mute", CS42L52_MISC_CTL, 4, 5, 1, 0), @@ -417,10 +417,10 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { SOC_ENUM("MIC Bias Level", mic_bias_level_enum), SOC_DOUBLE_R_SX_TLV("ADC Volume", CS42L52_ADCA_VOL, - CS42L52_ADCB_VOL, 7, 0x80, 0xA0, ipd_tlv), + CS42L52_ADCB_VOL, 0, 0xA0, 0x78, ipd_tlv), SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume", CS42L52_ADCA_MIXER_VOL, CS42L52_ADCB_MIXER_VOL, - 6, 0x7f, 0x19, ipd_tlv), + 0, 0x19, 0x7F, ipd_tlv), SOC_DOUBLE("ADC Switch", CS42L52_ADC_MISC_CTL, 0, 1, 1, 0), @@ -428,11 +428,11 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { CS42L52_ADCB_MIXER_VOL, 7, 1, 1), SOC_DOUBLE_R_SX_TLV("PGA Volume", CS42L52_PGAA_CTL, - CS42L52_PGAB_CTL, 0, 0x28, 0x30, pga_tlv), + CS42L52_PGAB_CTL, 0, 0x28, 0x24, pga_tlv), SOC_DOUBLE_R_SX_TLV("PCM Mixer Volume", CS42L52_PCMA_MIXER_VOL, CS42L52_PCMB_MIXER_VOL, - 0, 0x7f, 0x19, mix_tlv), + 0, 0x19, 0x7f, mix_tlv), SOC_DOUBLE_R("PCM Mixer Switch", CS42L52_PCMA_MIXER_VOL, CS42L52_PCMB_MIXER_VOL, 7, 1, 1), diff --git a/sound/soc/codecs/cs42l56.c b/sound/soc/codecs/cs42l56.c index fdc4bd27b0df..c766a5a9ce80 100644 --- a/sound/soc/codecs/cs42l56.c +++ b/sound/soc/codecs/cs42l56.c @@ -318,24 +318,32 @@ static const struct soc_enum adca_swap_enum = ARRAY_SIZE(left_swap_text), left_swap_text, swap_values); +static const struct snd_kcontrol_new adca_swap_mux = + SOC_DAPM_ENUM("Route", adca_swap_enum); static const struct soc_enum pcma_swap_enum = SOC_VALUE_ENUM_SINGLE(CS42L56_CHAN_MIX_SWAP, 4, 3, ARRAY_SIZE(left_swap_text), left_swap_text, swap_values); +static const struct snd_kcontrol_new pcma_swap_mux = + SOC_DAPM_ENUM("Route", pcma_swap_enum); static const struct soc_enum adcb_swap_enum = SOC_VALUE_ENUM_SINGLE(CS42L56_CHAN_MIX_SWAP, 2, 3, ARRAY_SIZE(right_swap_text), right_swap_text, swap_values); +static const struct snd_kcontrol_new adcb_swap_mux = + SOC_DAPM_ENUM("Route", adcb_swap_enum); static const struct soc_enum pcmb_swap_enum = SOC_VALUE_ENUM_SINGLE(CS42L56_CHAN_MIX_SWAP, 6, 3, ARRAY_SIZE(right_swap_text), right_swap_text, swap_values); +static const struct snd_kcontrol_new pcmb_swap_mux = + SOC_DAPM_ENUM("Route", pcmb_swap_enum); static const struct snd_kcontrol_new hpa_switch = SOC_DAPM_SINGLE("Switch", CS42L56_PWRCTL_2, 6, 1, 1); @@ -421,15 +429,15 @@ static const struct soc_enum ng_delay_enum = static const struct snd_kcontrol_new cs42l56_snd_controls[] = { SOC_DOUBLE_R_SX_TLV("Master Volume", CS42L56_MASTER_A_VOLUME, - CS42L56_MASTER_B_VOLUME, 0, 0x34, 0xfd, adv_tlv), + CS42L56_MASTER_B_VOLUME, 0, 0x34, 0xE4, adv_tlv), SOC_DOUBLE("Master Mute Switch", CS42L56_DSP_MUTE_CTL, 0, 1, 1, 1), SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume", CS42L56_ADCA_MIX_VOLUME, - CS42L56_ADCB_MIX_VOLUME, 0, 0x88, 0xa9, hl_tlv), + CS42L56_ADCB_MIX_VOLUME, 0, 0x88, 0x90, hl_tlv), SOC_DOUBLE("ADC Mixer Mute Switch", CS42L56_DSP_MUTE_CTL, 6, 7, 1, 1), SOC_DOUBLE_R_SX_TLV("PCM Mixer Volume", CS42L56_PCMA_MIX_VOLUME, - CS42L56_PCMB_MIX_VOLUME, 0, 0x88, 0xa9, hl_tlv), + CS42L56_PCMB_MIX_VOLUME, 0, 0x88, 0x90, hl_tlv), SOC_DOUBLE("PCM Mixer Mute Switch", CS42L56_DSP_MUTE_CTL, 4, 5, 1, 1), SOC_SINGLE_TLV("Analog Advisory Volume", @@ -438,16 +446,16 @@ static const struct snd_kcontrol_new cs42l56_snd_controls[] = { CS42L56_DIGINPUT_ADV_VOLUME, 0, 0x00, 1, adv_tlv), SOC_DOUBLE_R_SX_TLV("PGA Volume", CS42L56_PGAA_MUX_VOLUME, - CS42L56_PGAB_MUX_VOLUME, 0, 0x34, 0xfd, pga_tlv), + CS42L56_PGAB_MUX_VOLUME, 0, 0x34, 0x24, pga_tlv), SOC_DOUBLE_R_TLV("ADC Volume", CS42L56_ADCA_ATTENUATOR, CS42L56_ADCB_ATTENUATOR, 0, 0x00, 1, adc_tlv), SOC_DOUBLE("ADC Mute Switch", CS42L56_MISC_ADC_CTL, 2, 3, 1, 1), SOC_DOUBLE("ADC Boost Switch", CS42L56_GAIN_BIAS_CTL, 3, 2, 1, 1), SOC_DOUBLE_R_SX_TLV("Headphone Volume", CS42L56_HPA_VOLUME, - CS42L56_HPA_VOLUME, 0, 0x44, 0x55, hl_tlv), + CS42L56_HPB_VOLUME, 0, 0x84, 0x48, hl_tlv), SOC_DOUBLE_R_SX_TLV("LineOut Volume", CS42L56_LOA_VOLUME, - CS42L56_LOA_VOLUME, 0, 0x44, 0x55, hl_tlv), + CS42L56_LOB_VOLUME, 0, 0x84, 0x48, hl_tlv), SOC_SINGLE_TLV("Bass Shelving Volume", CS42L56_TONE_CTL, 0, 0x00, 1, tone_tlv), @@ -467,11 +475,6 @@ static const struct snd_kcontrol_new cs42l56_snd_controls[] = { SOC_SINGLE("ADCA Invert", CS42L56_MISC_ADC_CTL, 2, 1, 1), SOC_SINGLE("ADCB Invert", CS42L56_MISC_ADC_CTL, 3, 1, 1), - SOC_ENUM("PCMA Swap", pcma_swap_enum), - SOC_ENUM("PCMB Swap", pcmb_swap_enum), - SOC_ENUM("ADCA Swap", adca_swap_enum), - SOC_ENUM("ADCB Swap", adcb_swap_enum), - SOC_DOUBLE("HPF Switch", CS42L56_HPF_CTL, 5, 7, 1, 1), SOC_DOUBLE("HPF Freeze Switch", CS42L56_HPF_CTL, 4, 6, 1, 1), SOC_ENUM("HPFA Corner Freq", hpfa_freq_enum), @@ -570,6 +573,16 @@ static const struct snd_soc_dapm_widget cs42l56_dapm_widgets[] = { SND_SOC_DAPM_ADC("ADCA", NULL, CS42L56_PWRCTL_1, 1, 1), SND_SOC_DAPM_ADC("ADCB", NULL, CS42L56_PWRCTL_1, 2, 1), + SND_SOC_DAPM_MUX("ADCA Swap Mux", SND_SOC_NOPM, 0, 0, + &adca_swap_mux), + SND_SOC_DAPM_MUX("ADCB Swap Mux", SND_SOC_NOPM, 0, 0, + &adcb_swap_mux), + + SND_SOC_DAPM_MUX("PCMA Swap Mux", SND_SOC_NOPM, 0, 0, + &pcma_swap_mux), + SND_SOC_DAPM_MUX("PCMB Swap Mux", SND_SOC_NOPM, 0, 0, + &pcmb_swap_mux), + SND_SOC_DAPM_DAC("DACA", NULL, SND_SOC_NOPM, 0, 0), SND_SOC_DAPM_DAC("DACB", NULL, SND_SOC_NOPM, 0, 0), @@ -607,8 +620,19 @@ static const struct snd_soc_dapm_route cs42l56_audio_map[] = { {"Digital Output Mux", NULL, "ADCA"}, {"Digital Output Mux", NULL, "ADCB"}, - {"ADCB", NULL, "ADCB Mux"}, - {"ADCA", NULL, "ADCA Mux"}, + {"ADCB", NULL, "ADCB Swap Mux"}, + {"ADCA", NULL, "ADCA Swap Mux"}, + + {"ADCA Swap Mux", NULL, "ADCA"}, + {"ADCB Swap Mux", NULL, "ADCB"}, + + {"DACA", "Left", "ADCA Swap Mux"}, + {"DACA", "LR 2", "ADCA Swap Mux"}, + {"DACA", "Right", "ADCA Swap Mux"}, + + {"DACB", "Left", "ADCB Swap Mux"}, + {"DACB", "LR 2", "ADCB Swap Mux"}, + {"DACB", "Right", "ADCB Swap Mux"}, {"ADCA Mux", NULL, "AIN3A"}, {"ADCA Mux", NULL, "AIN2A"}, @@ -633,30 +657,32 @@ static const struct snd_soc_dapm_route cs42l56_audio_map[] = { {"PGAB Input Mux", NULL, "AIN2B"}, {"PGAB Input Mux", NULL, "AIN3B"}, - {"LOB", NULL, "Lineout Right"}, - {"LOA", NULL, "Lineout Left"}, - - {"Lineout Right", "Switch", "LINEOUTB Input Mux"}, - {"Lineout Left", "Switch", "LINEOUTA Input Mux"}, + {"LOB", "Switch", "LINEOUTB Input Mux"}, + {"LOA", "Switch", "LINEOUTA Input Mux"}, {"LINEOUTA Input Mux", "PGAA", "PGAA"}, {"LINEOUTB Input Mux", "PGAB", "PGAB"}, {"LINEOUTA Input Mux", "DACA", "DACA"}, {"LINEOUTB Input Mux", "DACB", "DACB"}, - {"HPA", NULL, "Headphone Left"}, - {"HPB", NULL, "Headphone Right"}, - - {"Headphone Right", "Switch", "HPB Input Mux"}, - {"Headphone Left", "Switch", "HPA Input Mux"}, + {"HPA", "Switch", "HPB Input Mux"}, + {"HPB", "Switch", "HPA Input Mux"}, {"HPA Input Mux", "PGAA", "PGAA"}, {"HPB Input Mux", "PGAB", "PGAB"}, {"HPA Input Mux", "DACA", "DACA"}, {"HPB Input Mux", "DACB", "DACB"}, - {"DACB", NULL, "HiFi Playback"}, - {"DACA", NULL, "HiFi Playback"}, + {"DACA", NULL, "PCMA Swap Mux"}, + {"DACB", NULL, "PCMB Swap Mux"}, + + {"PCMB Swap Mux", "Left", "HiFi Playback"}, + {"PCMB Swap Mux", "LR 2", "HiFi Playback"}, + {"PCMB Swap Mux", "Right", "HiFi Playback"}, + + {"PCMA Swap Mux", "Left", "HiFi Playback"}, + {"PCMA Swap Mux", "LR 2", "HiFi Playback"}, + {"PCMA Swap Mux", "Right", "HiFi Playback"}, }; diff --git a/sound/soc/codecs/cs42l73.c b/sound/soc/codecs/cs42l73.c index ae3717992d56..0e7b9eb2ba61 100644 --- a/sound/soc/codecs/cs42l73.c +++ b/sound/soc/codecs/cs42l73.c @@ -401,7 +401,7 @@ static const struct snd_kcontrol_new cs42l73_snd_controls[] = { CS42L73_LOBAVOL, 0, 0x41, 0x4B, hpaloa_tlv), SOC_DOUBLE_R_SX_TLV("Input PGA Analog Volume", CS42L73_MICAPREPGAAVOL, - CS42L73_MICBPREPGABVOL, 5, 0x34, + CS42L73_MICBPREPGABVOL, 0, 0x34, 0x24, micpga_tlv), SOC_DOUBLE_R("MIC Preamp Switch", CS42L73_MICAPREPGAAVOL, @@ -1408,10 +1408,8 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client, cs42l73 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l73_private), GFP_KERNEL); - if (!cs42l73) { - dev_err(&i2c_client->dev, "could not allocate codec\n"); + if (!cs42l73) return -ENOMEM; - } cs42l73->regmap = devm_regmap_init_i2c(i2c_client, &cs42l73_regmap); if (IS_ERR(cs42l73->regmap)) { diff --git a/sound/soc/codecs/cs42xx8.c b/sound/soc/codecs/cs42xx8.c index a25bc6061a30..02b1520ae0bc 100644 --- a/sound/soc/codecs/cs42xx8.c +++ b/sound/soc/codecs/cs42xx8.c @@ -219,6 +219,9 @@ static int cs42xx8_set_dai_fmt(struct snd_soc_dai *codec_dai, case SND_SOC_DAIFMT_RIGHT_J: val = CS42XX8_INTF_DAC_DIF_RIGHTJ | CS42XX8_INTF_ADC_DIF_RIGHTJ; break; + case SND_SOC_DAIFMT_DSP_A: + val = CS42XX8_INTF_DAC_DIF_TDM | CS42XX8_INTF_ADC_DIF_TDM; + break; default: dev_err(codec->dev, "unsupported dai format\n"); return -EINVAL; @@ -422,7 +425,7 @@ const struct cs42xx8_driver_data cs42888_data = { }; EXPORT_SYMBOL_GPL(cs42888_data); -const struct of_device_id cs42xx8_of_match[] = { +static const struct of_device_id cs42xx8_of_match[] = { { .compatible = "cirrus,cs42448", .data = &cs42448_data, }, { .compatible = "cirrus,cs42888", .data = &cs42888_data, }, { /* sentinel */ } diff --git a/sound/soc/codecs/cs42xx8.h b/sound/soc/codecs/cs42xx8.h index da0b94aee419..b2c10e537ef6 100644 --- a/sound/soc/codecs/cs42xx8.h +++ b/sound/soc/codecs/cs42xx8.h @@ -128,8 +128,8 @@ int cs42xx8_probe(struct device *dev, struct regmap *regmap); #define CS42XX8_INTF_DAC_DIF_RIGHTJ (2 << CS42XX8_INTF_DAC_DIF_SHIFT) #define CS42XX8_INTF_DAC_DIF_RIGHTJ_16 (3 << CS42XX8_INTF_DAC_DIF_SHIFT) #define CS42XX8_INTF_DAC_DIF_ONELINE_20 (4 << CS42XX8_INTF_DAC_DIF_SHIFT) -#define CS42XX8_INTF_DAC_DIF_ONELINE_24 (6 << CS42XX8_INTF_DAC_DIF_SHIFT) -#define CS42XX8_INTF_DAC_DIF_TDM (7 << CS42XX8_INTF_DAC_DIF_SHIFT) +#define CS42XX8_INTF_DAC_DIF_ONELINE_24 (5 << CS42XX8_INTF_DAC_DIF_SHIFT) +#define CS42XX8_INTF_DAC_DIF_TDM (6 << CS42XX8_INTF_DAC_DIF_SHIFT) #define CS42XX8_INTF_ADC_DIF_SHIFT 0 #define CS42XX8_INTF_ADC_DIF_WIDTH 3 #define CS42XX8_INTF_ADC_DIF_MASK (((1 << CS42XX8_INTF_ADC_DIF_WIDTH) - 1) << CS42XX8_INTF_ADC_DIF_SHIFT) @@ -138,8 +138,8 @@ int cs42xx8_probe(struct device *dev, struct regmap *regmap); #define CS42XX8_INTF_ADC_DIF_RIGHTJ (2 << CS42XX8_INTF_ADC_DIF_SHIFT) #define CS42XX8_INTF_ADC_DIF_RIGHTJ_16 (3 << CS42XX8_INTF_ADC_DIF_SHIFT) #define CS42XX8_INTF_ADC_DIF_ONELINE_20 (4 << CS42XX8_INTF_ADC_DIF_SHIFT) -#define CS42XX8_INTF_ADC_DIF_ONELINE_24 (6 << CS42XX8_INTF_ADC_DIF_SHIFT) -#define CS42XX8_INTF_ADC_DIF_TDM (7 << CS42XX8_INTF_ADC_DIF_SHIFT) +#define CS42XX8_INTF_ADC_DIF_ONELINE_24 (5 << CS42XX8_INTF_ADC_DIF_SHIFT) +#define CS42XX8_INTF_ADC_DIF_TDM (6 << CS42XX8_INTF_ADC_DIF_SHIFT) /* ADC Control & DAC De-Emphasis (Address 05h) */ #define CS42XX8_ADCCTL_ADC_HPF_FREEZE_SHIFT 7 diff --git a/sound/soc/codecs/cx20442.c b/sound/soc/codecs/cx20442.c index d5fd00a64748..8f95b0300f1a 100644 --- a/sound/soc/codecs/cx20442.c +++ b/sound/soc/codecs/cx20442.c @@ -253,7 +253,7 @@ static void v253_close(struct tty_struct *tty) /* Prevent the codec driver from further accessing the modem */ codec->hw_write = NULL; cx20442->control_data = NULL; - codec->card->pop_time = 0; + codec->component.card->pop_time = 0; } /* Line discipline .hangup() */ @@ -281,7 +281,7 @@ static void v253_receive(struct tty_struct *tty, /* Set up codec driver access to modem controls */ cx20442->control_data = tty; codec->hw_write = (hw_write_t)tty->ops->write; - codec->card->pop_time = 1; + codec->component.card->pop_time = 1; } } @@ -372,7 +372,7 @@ static int cx20442_codec_probe(struct snd_soc_codec *codec) snd_soc_codec_set_drvdata(codec, cx20442); codec->hw_write = NULL; - codec->card->pop_time = 0; + codec->component.card->pop_time = 0; return 0; } @@ -383,8 +383,8 @@ static int cx20442_codec_remove(struct snd_soc_codec *codec) struct cx20442_priv *cx20442 = snd_soc_codec_get_drvdata(codec); if (cx20442->control_data) { - struct tty_struct *tty = cx20442->control_data; - tty_hangup(tty); + struct tty_struct *tty = cx20442->control_data; + tty_hangup(tty); } if (!IS_ERR(cx20442->por)) { diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c index 9134982807b5..2cd3e5427441 100644 --- a/sound/soc/codecs/max98088.c +++ b/sound/soc/codecs/max98088.c @@ -1299,12 +1299,12 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream, rate = params_rate(params); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: snd_soc_update_bits(codec, M98088_REG_1C_DAI2_FORMAT, M98088_DAI_WS, 0); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: snd_soc_update_bits(codec, M98088_REG_1C_DAI2_FORMAT, M98088_DAI_WS, M98088_DAI_WS); break; diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c index f5fccc7a8e89..4a063fa88526 100644 --- a/sound/soc/codecs/max98090.c +++ b/sound/soc/codecs/max98090.c @@ -26,10 +26,6 @@ #include <sound/max98090.h> #include "max98090.h" -#define DEBUG -#define EXTMIC_METHOD -#define EXTMIC_METHOD_TEST - /* Allows for sparsely populated register maps */ static struct reg_default max98090_reg[] = { { 0x00, 0x00 }, /* 00 Software Reset */ @@ -820,7 +816,6 @@ static int max98090_micinput_event(struct snd_soc_dapm_widget *w, else val = (val & M98090_MIC_PA2EN_MASK) >> M98090_MIC_PA2EN_SHIFT; - if (val >= 1) { if (w->reg == M98090_REG_MIC1_INPUT_LEVEL) { max98090->pa1en = val - 1; /* Update for volatile */ @@ -1140,7 +1135,6 @@ static const struct snd_kcontrol_new max98090_mixhprsel_mux = SOC_DAPM_ENUM("MIXHPRSEL Mux", mixhprsel_mux_enum); static const struct snd_soc_dapm_widget max98090_dapm_widgets[] = { - SND_SOC_DAPM_INPUT("MIC1"), SND_SOC_DAPM_INPUT("MIC2"), SND_SOC_DAPM_INPUT("DMICL"), @@ -1304,7 +1298,6 @@ static const struct snd_soc_dapm_widget max98090_dapm_widgets[] = { }; static const struct snd_soc_dapm_widget max98091_dapm_widgets[] = { - SND_SOC_DAPM_INPUT("DMIC3"), SND_SOC_DAPM_INPUT("DMIC4"), @@ -1315,7 +1308,6 @@ static const struct snd_soc_dapm_widget max98091_dapm_widgets[] = { }; static const struct snd_soc_dapm_route max98090_dapm_routes[] = { - {"MIC1 Input", NULL, "MIC1"}, {"MIC2 Input", NULL, "MIC2"}, @@ -1493,17 +1485,14 @@ static const struct snd_soc_dapm_route max98090_dapm_routes[] = { {"SPKR", NULL, "SPK Right Out"}, {"RCVL", NULL, "RCV Left Out"}, {"RCVR", NULL, "RCV Right Out"}, - }; static const struct snd_soc_dapm_route max98091_dapm_routes[] = { - /* DMIC inputs */ {"DMIC3", NULL, "DMIC3_ENA"}, {"DMIC4", NULL, "DMIC4_ENA"}, {"DMIC3", NULL, "AHPF"}, {"DMIC4", NULL, "AHPF"}, - }; static int max98090_add_widgets(struct snd_soc_codec *codec) @@ -1531,7 +1520,6 @@ static int max98090_add_widgets(struct snd_soc_codec *codec) snd_soc_dapm_add_routes(dapm, max98091_dapm_routes, ARRAY_SIZE(max98091_dapm_routes)); - } return 0; @@ -2212,22 +2200,11 @@ static struct snd_soc_dai_driver max98090_dai[] = { } }; -static void max98090_handle_pdata(struct snd_soc_codec *codec) -{ - struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec); - struct max98090_pdata *pdata = max98090->pdata; - - if (!pdata) { - dev_err(codec->dev, "No platform data\n"); - return; - } - -} - static int max98090_probe(struct snd_soc_codec *codec) { struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec); struct max98090_cdata *cdata; + enum max98090_type devtype; int ret = 0; dev_dbg(codec->dev, "max98090_probe\n"); @@ -2263,16 +2240,21 @@ static int max98090_probe(struct snd_soc_codec *codec) } if ((ret >= M98090_REVA) && (ret <= M98090_REVA + 0x0f)) { - max98090->devtype = MAX98090; + devtype = MAX98090; dev_info(codec->dev, "MAX98090 REVID=0x%02x\n", ret); } else if ((ret >= M98091_REVA) && (ret <= M98091_REVA + 0x0f)) { - max98090->devtype = MAX98091; + devtype = MAX98091; dev_info(codec->dev, "MAX98091 REVID=0x%02x\n", ret); } else { - max98090->devtype = MAX98090; + devtype = MAX98090; dev_err(codec->dev, "Unrecognized revision 0x%02x\n", ret); } + if (max98090->devtype != devtype) { + dev_warn(codec->dev, "Mismatch in DT specified CODEC type.\n"); + max98090->devtype = devtype; + } + max98090->jack_state = M98090_JACK_STATE_NO_HEADSET; INIT_DELAYED_WORK(&max98090->jack_work, max98090_jack_work); @@ -2284,7 +2266,7 @@ static int max98090_probe(struct snd_soc_codec *codec) /* Register for interrupts */ dev_dbg(codec->dev, "irq = %d\n", max98090->irq); - ret = request_threaded_irq(max98090->irq, NULL, + ret = devm_request_threaded_irq(codec->dev, max98090->irq, NULL, max98090_interrupt, IRQF_TRIGGER_FALLING | IRQF_ONESHOT, "max98090_interrupt", codec); if (ret < 0) { @@ -2317,8 +2299,6 @@ static int max98090_probe(struct snd_soc_codec *codec) snd_soc_update_bits(codec, M98090_REG_MIC_BIAS_VOLTAGE, M98090_MBVSEL_MASK, M98090_MBVSEL_2V8); - max98090_handle_pdata(codec); - max98090_add_widgets(codec); err_access: @@ -2428,7 +2408,7 @@ static int max98090_runtime_suspend(struct device *dev) } #endif -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP static int max98090_resume(struct device *dev) { struct max98090_priv *max98090 = dev_get_drvdata(dev); @@ -2460,12 +2440,14 @@ static const struct dev_pm_ops max98090_pm = { static const struct i2c_device_id max98090_i2c_id[] = { { "max98090", MAX98090 }, + { "max98091", MAX98091 }, { } }; MODULE_DEVICE_TABLE(i2c, max98090_i2c_id); static const struct of_device_id max98090_of_match[] = { { .compatible = "maxim,max98090", }, + { .compatible = "maxim,max98091", }, { } }; MODULE_DEVICE_TABLE(of, max98090_of_match); diff --git a/sound/soc/codecs/max98095.c b/sound/soc/codecs/max98095.c index 89ec00424880..0ee6797d5083 100644 --- a/sound/soc/codecs/max98095.c +++ b/sound/soc/codecs/max98095.c @@ -1280,12 +1280,12 @@ static int max98095_dai2_hw_params(struct snd_pcm_substream *substream, rate = params_rate(params); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: snd_soc_update_bits(codec, M98095_034_DAI2_FORMAT, M98095_DAI_WS, 0); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: snd_soc_update_bits(codec, M98095_034_DAI2_FORMAT, M98095_DAI_WS, M98095_DAI_WS); break; @@ -1341,12 +1341,12 @@ static int max98095_dai3_hw_params(struct snd_pcm_substream *substream, rate = params_rate(params); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: snd_soc_update_bits(codec, M98095_03E_DAI3_FORMAT, M98095_DAI_WS, 0); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: snd_soc_update_bits(codec, M98095_03E_DAI3_FORMAT, M98095_DAI_WS, M98095_DAI_WS); break; diff --git a/sound/soc/codecs/mc13783.c b/sound/soc/codecs/mc13783.c index 9965277b595a..388f90a597fa 100644 --- a/sound/soc/codecs/mc13783.c +++ b/sound/soc/codecs/mc13783.c @@ -766,11 +766,11 @@ static int __init mc13783_codec_probe(struct platform_device *pdev) ret = of_property_read_u32(np, "adc-port", &priv->adc_ssi_port); if (ret) - return ret; + goto out; ret = of_property_read_u32(np, "dac-port", &priv->dac_ssi_port); if (ret) - return ret; + goto out; } dev_set_drvdata(&pdev->dev, priv); @@ -783,6 +783,8 @@ static int __init mc13783_codec_probe(struct platform_device *pdev) ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783, mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async)); +out: + of_node_put(np); return ret; } diff --git a/sound/soc/codecs/pcm1792a.c b/sound/soc/codecs/pcm1792a.c index 3a80ba4452df..57b0c94a710b 100644 --- a/sound/soc/codecs/pcm1792a.c +++ b/sound/soc/codecs/pcm1792a.c @@ -36,6 +36,7 @@ #define PCM1792A_DAC_VOL_LEFT 0x10 #define PCM1792A_DAC_VOL_RIGHT 0x11 #define PCM1792A_FMT_CONTROL 0x12 +#define PCM1792A_MODE_CONTROL 0x13 #define PCM1792A_SOFT_MUTE PCM1792A_FMT_CONTROL #define PCM1792A_FMT_MASK 0x70 @@ -164,6 +165,8 @@ static const struct snd_kcontrol_new pcm1792a_controls[] = { SOC_DOUBLE_R_RANGE_TLV("DAC Playback Volume", PCM1792A_DAC_VOL_LEFT, PCM1792A_DAC_VOL_RIGHT, 0, 0xf, 0xff, 0, pcm1792a_dac_tlv), + SOC_SINGLE("DAC Invert Output Switch", PCM1792A_MODE_CONTROL, 7, 1, 0), + SOC_SINGLE("DAC Rolloff Filter Switch", PCM1792A_MODE_CONTROL, 1, 1, 0), }; static const struct snd_soc_dapm_widget pcm1792a_dapm_widgets[] = { diff --git a/sound/soc/codecs/pcm1792a.h b/sound/soc/codecs/pcm1792a.h index 7a83d1fc102a..51d5470fee16 100644 --- a/sound/soc/codecs/pcm1792a.h +++ b/sound/soc/codecs/pcm1792a.h @@ -18,7 +18,8 @@ #define __PCM1792A_H__ #define PCM1792A_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_8000_48000 | \ - SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000) + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \ + SNDRV_PCM_RATE_192000) #define PCM1792A_FORMATS (SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE | \ SNDRV_PCM_FMTBIT_S16_LE) diff --git a/sound/soc/codecs/rl6231.c b/sound/soc/codecs/rl6231.c index 7b82fbe0d14c..56650d6c2f53 100644 --- a/sound/soc/codecs/rl6231.c +++ b/sound/soc/codecs/rl6231.c @@ -11,25 +11,6 @@ */ #include <linux/module.h> -#include <linux/moduleparam.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/pm.h> -#include <linux/gpio.h> -#include <linux/i2c.h> -#include <linux/regmap.h> -#include <linux/of.h> -#include <linux/of_gpio.h> -#include <linux/platform_device.h> -#include <linux/spi/spi.h> -#include <linux/acpi.h> -#include <sound/core.h> -#include <sound/pcm.h> -#include <sound/pcm_params.h> -#include <sound/soc.h> -#include <sound/soc-dapm.h> -#include <sound/initval.h> -#include <sound/tlv.h> #include "rl6231.h" diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c new file mode 100644 index 000000000000..e4f6102efc1a --- /dev/null +++ b/sound/soc/codecs/rt286.c @@ -0,0 +1,1222 @@ +/* + * rt286.c -- RT286 ALSA SoC audio codec driver + * + * Copyright 2013 Realtek Semiconductor Corp. + * Author: Bard Liao <bardliao@realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/acpi.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/jack.h> +#include <linux/workqueue.h> +#include <sound/rt286.h> +#include <sound/hda_verbs.h> + +#include "rt286.h" + +#define RT286_VENDOR_ID 0x10ec0286 + +struct rt286_priv { + struct regmap *regmap; + struct rt286_platform_data pdata; + struct i2c_client *i2c; + struct snd_soc_jack *jack; + struct delayed_work jack_detect_work; + int sys_clk; + struct reg_default *index_cache; +}; + +static struct reg_default rt286_index_def[] = { + { 0x01, 0xaaaa }, + { 0x02, 0x8aaa }, + { 0x03, 0x0002 }, + { 0x04, 0xaf01 }, + { 0x08, 0x000d }, + { 0x09, 0xd810 }, + { 0x0a, 0x0060 }, + { 0x0b, 0x0000 }, + { 0x0d, 0x2800 }, + { 0x0f, 0x0000 }, + { 0x19, 0x0a17 }, + { 0x20, 0x0020 }, + { 0x33, 0x0208 }, + { 0x49, 0x0004 }, + { 0x4f, 0x50e9 }, + { 0x50, 0x2c00 }, + { 0x63, 0x2902 }, + { 0x67, 0x1111 }, + { 0x68, 0x1016 }, + { 0x69, 0x273f }, +}; +#define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def) + +static const struct reg_default rt286_reg[] = { + { 0x00170500, 0x00000400 }, + { 0x00220000, 0x00000031 }, + { 0x00239000, 0x0000007f }, + { 0x0023a000, 0x0000007f }, + { 0x00270500, 0x00000400 }, + { 0x00370500, 0x00000400 }, + { 0x00870500, 0x00000400 }, + { 0x00920000, 0x00000031 }, + { 0x00935000, 0x000000c3 }, + { 0x00936000, 0x000000c3 }, + { 0x00970500, 0x00000400 }, + { 0x00b37000, 0x00000097 }, + { 0x00b37200, 0x00000097 }, + { 0x00b37300, 0x00000097 }, + { 0x00c37000, 0x00000000 }, + { 0x00c37100, 0x00000080 }, + { 0x01270500, 0x00000400 }, + { 0x01370500, 0x00000400 }, + { 0x01371f00, 0x411111f0 }, + { 0x01439000, 0x00000080 }, + { 0x0143a000, 0x00000080 }, + { 0x01470700, 0x00000000 }, + { 0x01470500, 0x00000400 }, + { 0x01470c00, 0x00000000 }, + { 0x01470100, 0x00000000 }, + { 0x01837000, 0x00000000 }, + { 0x01870500, 0x00000400 }, + { 0x02050000, 0x00000000 }, + { 0x02139000, 0x00000080 }, + { 0x0213a000, 0x00000080 }, + { 0x02170100, 0x00000000 }, + { 0x02170500, 0x00000400 }, + { 0x02170700, 0x00000000 }, + { 0x02270100, 0x00000000 }, + { 0x02370100, 0x00000000 }, + { 0x02040000, 0x00004002 }, + { 0x01870700, 0x00000020 }, + { 0x00830000, 0x000000c3 }, + { 0x00930000, 0x000000c3 }, + { 0x01270700, 0x00000000 }, +}; + +static bool rt286_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0 ... 0xff: + case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID): + case RT286_GET_HP_SENSE: + case RT286_GET_MIC1_SENSE: + case RT286_PROC_COEF: + return true; + default: + return false; + } + + +} + +static bool rt286_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0 ... 0xff: + case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID): + case RT286_GET_HP_SENSE: + case RT286_GET_MIC1_SENSE: + case RT286_SET_AUDIO_POWER: + case RT286_SET_HPO_POWER: + case RT286_SET_SPK_POWER: + case RT286_SET_DMIC1_POWER: + case RT286_SPK_MUX: + case RT286_HPO_MUX: + case RT286_ADC0_MUX: + case RT286_ADC1_MUX: + case RT286_SET_MIC1: + case RT286_SET_PIN_HPO: + case RT286_SET_PIN_SPK: + case RT286_SET_PIN_DMIC1: + case RT286_SPK_EAPD: + case RT286_SET_AMP_GAIN_HPO: + case RT286_SET_DMIC2_DEFAULT: + case RT286_DACL_GAIN: + case RT286_DACR_GAIN: + case RT286_ADCL_GAIN: + case RT286_ADCR_GAIN: + case RT286_MIC_GAIN: + case RT286_SPOL_GAIN: + case RT286_SPOR_GAIN: + case RT286_HPOL_GAIN: + case RT286_HPOR_GAIN: + case RT286_F_DAC_SWITCH: + case RT286_F_RECMIX_SWITCH: + case RT286_REC_MIC_SWITCH: + case RT286_REC_I2S_SWITCH: + case RT286_REC_LINE_SWITCH: + case RT286_REC_BEEP_SWITCH: + case RT286_DAC_FORMAT: + case RT286_ADC_FORMAT: + case RT286_COEF_INDEX: + case RT286_PROC_COEF: + case RT286_SET_AMP_GAIN_ADC_IN1: + case RT286_SET_AMP_GAIN_ADC_IN2: + case RT286_SET_POWER(RT286_DAC_OUT1): + case RT286_SET_POWER(RT286_DAC_OUT2): + case RT286_SET_POWER(RT286_ADC_IN1): + case RT286_SET_POWER(RT286_ADC_IN2): + case RT286_SET_POWER(RT286_DMIC2): + case RT286_SET_POWER(RT286_MIC1): + return true; + default: + return false; + } +} + +static int rt286_hw_write(void *context, unsigned int reg, unsigned int value) +{ + struct i2c_client *client = context; + struct rt286_priv *rt286 = i2c_get_clientdata(client); + u8 data[4]; + int ret, i; + + /*handle index registers*/ + if (reg <= 0xff) { + rt286_hw_write(client, RT286_COEF_INDEX, reg); + reg = RT286_PROC_COEF; + for (i = 0; i < INDEX_CACHE_SIZE; i++) { + if (reg == rt286->index_cache[i].reg) { + rt286->index_cache[i].def = value; + break; + } + + } + } + + data[0] = (reg >> 24) & 0xff; + data[1] = (reg >> 16) & 0xff; + /* + * 4 bit VID: reg should be 0 + * 12 bit VID: value should be 0 + * So we use an OR operator to handle it rather than use if condition. + */ + data[2] = ((reg >> 8) & 0xff) | ((value >> 8) & 0xff); + data[3] = value & 0xff; + + ret = i2c_master_send(client, data, 4); + + if (ret == 4) + return 0; + else + pr_err("ret=%d\n", ret); + if (ret < 0) + return ret; + else + return -EIO; +} + +static int rt286_hw_read(void *context, unsigned int reg, unsigned int *value) +{ + struct i2c_client *client = context; + struct i2c_msg xfer[2]; + int ret; + __be32 be_reg; + unsigned int index, vid, buf = 0x0; + + /*handle index registers*/ + if (reg <= 0xff) { + rt286_hw_write(client, RT286_COEF_INDEX, reg); + reg = RT286_PROC_COEF; + } + + reg = reg | 0x80000; + vid = (reg >> 8) & 0xfff; + + if (AC_VERB_GET_AMP_GAIN_MUTE == (vid & 0xf00)) { + index = (reg >> 8) & 0xf; + reg = (reg & ~0xf0f) | index; + } + be_reg = cpu_to_be32(reg); + + /* Write register */ + xfer[0].addr = client->addr; + xfer[0].flags = 0; + xfer[0].len = 4; + xfer[0].buf = (u8 *)&be_reg; + + /* Read data */ + xfer[1].addr = client->addr; + xfer[1].flags = I2C_M_RD; + xfer[1].len = 4; + xfer[1].buf = (u8 *)&buf; + + ret = i2c_transfer(client->adapter, xfer, 2); + if (ret < 0) + return ret; + else if (ret != 2) + return -EIO; + + *value = be32_to_cpu(buf); + + return 0; +} + +static void rt286_index_sync(struct snd_soc_codec *codec) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + int i; + + for (i = 0; i < INDEX_CACHE_SIZE; i++) { + snd_soc_write(codec, rt286->index_cache[i].reg, + rt286->index_cache[i].def); + } +} + +static int rt286_support_power_controls[] = { + RT286_DAC_OUT1, + RT286_DAC_OUT2, + RT286_ADC_IN1, + RT286_ADC_IN2, + RT286_MIC1, + RT286_DMIC1, + RT286_DMIC2, + RT286_SPK_OUT, + RT286_HP_OUT, +}; +#define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls) + +static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic) +{ + unsigned int val, buf; + int i; + + *hp = false; + *mic = false; + + if (rt286->pdata.cbj_en) { + regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf); + *hp = buf & 0x80000000; + if (*hp) { + /* power on HV,VERF */ + regmap_update_bits(rt286->regmap, + RT286_POWER_CTRL1, 0x1001, 0x0); + /* power LDO1 */ + regmap_update_bits(rt286->regmap, + RT286_POWER_CTRL2, 0x4, 0x4); + regmap_write(rt286->regmap, RT286_SET_MIC1, 0x24); + regmap_read(rt286->regmap, RT286_CBJ_CTRL2, &val); + + msleep(200); + i = 40; + while (((val & 0x0800) == 0) && (i > 0)) { + regmap_read(rt286->regmap, + RT286_CBJ_CTRL2, &val); + i--; + msleep(20); + } + + if (0x0400 == (val & 0x0700)) { + *mic = false; + + regmap_write(rt286->regmap, + RT286_SET_MIC1, 0x20); + /* power off HV,VERF */ + regmap_update_bits(rt286->regmap, + RT286_POWER_CTRL1, 0x1001, 0x1001); + regmap_update_bits(rt286->regmap, + RT286_A_BIAS_CTRL3, 0xc000, 0x0000); + regmap_update_bits(rt286->regmap, + RT286_CBJ_CTRL1, 0x0030, 0x0000); + regmap_update_bits(rt286->regmap, + RT286_A_BIAS_CTRL2, 0xc000, 0x0000); + } else if ((0x0200 == (val & 0x0700)) || + (0x0100 == (val & 0x0700))) { + *mic = true; + regmap_update_bits(rt286->regmap, + RT286_A_BIAS_CTRL3, 0xc000, 0x8000); + regmap_update_bits(rt286->regmap, + RT286_CBJ_CTRL1, 0x0030, 0x0020); + regmap_update_bits(rt286->regmap, + RT286_A_BIAS_CTRL2, 0xc000, 0x8000); + } else { + *mic = false; + } + + regmap_update_bits(rt286->regmap, + RT286_MISC_CTRL1, + 0x0060, 0x0000); + } else { + regmap_update_bits(rt286->regmap, + RT286_MISC_CTRL1, + 0x0060, 0x0020); + regmap_update_bits(rt286->regmap, + RT286_A_BIAS_CTRL3, + 0xc000, 0x8000); + regmap_update_bits(rt286->regmap, + RT286_CBJ_CTRL1, + 0x0030, 0x0020); + regmap_update_bits(rt286->regmap, + RT286_A_BIAS_CTRL2, + 0xc000, 0x8000); + + *mic = false; + } + } else { + regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf); + *hp = buf & 0x80000000; + regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf); + *mic = buf & 0x80000000; + } + + return 0; +} + +static void rt286_jack_detect_work(struct work_struct *work) +{ + struct rt286_priv *rt286 = + container_of(work, struct rt286_priv, jack_detect_work.work); + int status = 0; + bool hp = false; + bool mic = false; + + rt286_jack_detect(rt286, &hp, &mic); + + if (hp == true) + status |= SND_JACK_HEADPHONE; + + if (mic == true) + status |= SND_JACK_MICROPHONE; + + snd_soc_jack_report(rt286->jack, status, + SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); +} + +int rt286_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + rt286->jack = jack; + + /* Send an initial empty report */ + snd_soc_jack_report(rt286->jack, 0, + SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); + + return 0; +} +EXPORT_SYMBOL_GPL(rt286_mic_detect); + +static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0); +static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0); + +static const struct snd_kcontrol_new rt286_snd_controls[] = { + SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN, + RT286_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv), + SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN, + RT286_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv), + SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN, + 0, 0x3, 0, mic_vol_tlv), + SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN, + RT286_SPOR_GAIN, RT286_MUTE_SFT, 1, 1), +}; + +/* Digital Mixer */ +static const struct snd_kcontrol_new rt286_front_mix[] = { + SOC_DAPM_SINGLE("DAC Switch", RT286_F_DAC_SWITCH, + RT286_MUTE_SFT, 1, 1), + SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH, + RT286_MUTE_SFT, 1, 1), +}; + +/* Analog Input Mixer */ +static const struct snd_kcontrol_new rt286_rec_mix[] = { + SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH, + RT286_MUTE_SFT, 1, 1), + SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH, + RT286_MUTE_SFT, 1, 1), + SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH, + RT286_MUTE_SFT, 1, 1), + SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH, + RT286_MUTE_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new spo_enable_control = + SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK, + RT286_SET_PIN_SFT, 1, 0); + +static const struct snd_kcontrol_new hpol_enable_control = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN, + RT286_MUTE_SFT, 1, 1); + +static const struct snd_kcontrol_new hpor_enable_control = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN, + RT286_MUTE_SFT, 1, 1); + +/* ADC0 source */ +static const char * const rt286_adc_src[] = { + "Mic", "RECMIX", "Dmic" +}; + +static const int rt286_adc_values[] = { + 0, 4, 5, +}; + +static SOC_VALUE_ENUM_SINGLE_DECL( + rt286_adc0_enum, RT286_ADC0_MUX, RT286_ADC_SEL_SFT, + RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values); + +static const struct snd_kcontrol_new rt286_adc0_mux = + SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum); + +static SOC_VALUE_ENUM_SINGLE_DECL( + rt286_adc1_enum, RT286_ADC1_MUX, RT286_ADC_SEL_SFT, + RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values); + +static const struct snd_kcontrol_new rt286_adc1_mux = + SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum); + +static const char * const rt286_dac_src[] = { + "Front", "Surround" +}; +/* HP-OUT source */ +static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, RT286_HPO_MUX, + 0, rt286_dac_src); + +static const struct snd_kcontrol_new rt286_hpo_mux = +SOC_DAPM_ENUM("HPO source", rt286_hpo_enum); + +/* SPK-OUT source */ +static SOC_ENUM_SINGLE_DECL(rt286_spo_enum, RT286_SPK_MUX, + 0, rt286_dac_src); + +static const struct snd_kcontrol_new rt286_spo_mux = +SOC_DAPM_ENUM("SPO source", rt286_spo_enum); + +static int rt286_spk_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_write(codec, + RT286_SPK_EAPD, RT286_SET_EAPD_HIGH); + break; + case SND_SOC_DAPM_PRE_PMD: + snd_soc_write(codec, + RT286_SPK_EAPD, RT286_SET_EAPD_LOW); + break; + + default: + return 0; + } + + return 0; +} + +static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0x20); + break; + case SND_SOC_DAPM_PRE_PMD: + snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_adc_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + unsigned int nid; + + nid = (w->reg >> 20) & 0xff; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0), + 0x7080, 0x7000); + break; + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0), + 0x7080, 0x7080); + break; + default: + return 0; + } + + return 0; +} + +static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = { + /* Input Lines */ + SND_SOC_DAPM_INPUT("DMIC1 Pin"), + SND_SOC_DAPM_INPUT("DMIC2 Pin"), + SND_SOC_DAPM_INPUT("MIC1"), + SND_SOC_DAPM_INPUT("LINE1"), + SND_SOC_DAPM_INPUT("Beep"), + + /* DMIC */ + SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1), 0, 1, + NULL, 0, rt286_set_dmic1_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2), 0, 1, + NULL, 0), + SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM, + 0, 0, NULL, 0), + + /* REC Mixer */ + SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0, + rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)), + + /* ADCs */ + SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), + + /* ADC Mux */ + SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1), 0, 1, + &rt286_adc0_mux, rt286_adc_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2), 0, 1, + &rt286_adc1_mux, rt286_adc_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU), + + /* Audio Interface */ + SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), + + /* Output Side */ + /* DACs */ + SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0), + + /* Output Mux */ + SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt286_spo_mux), + SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt286_hpo_mux), + + SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO, + RT286_SET_PIN_SFT, 0, NULL, 0), + + /* Output Mixer */ + SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1), 0, 1, + rt286_front_mix, ARRAY_SIZE(rt286_front_mix)), + SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2), 0, 1, + NULL, 0), + + /* Output Pga */ + SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0, + &spo_enable_control, rt286_spk_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0, + &hpol_enable_control), + SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0, + &hpor_enable_control), + + /* Output Lines */ + SND_SOC_DAPM_OUTPUT("SPOL"), + SND_SOC_DAPM_OUTPUT("SPOR"), + SND_SOC_DAPM_OUTPUT("HPO Pin"), + SND_SOC_DAPM_OUTPUT("SPDIF"), +}; + +static const struct snd_soc_dapm_route rt286_dapm_routes[] = { + {"DMIC1", NULL, "DMIC1 Pin"}, + {"DMIC2", NULL, "DMIC2 Pin"}, + {"DMIC1", NULL, "DMIC Receiver"}, + {"DMIC2", NULL, "DMIC Receiver"}, + + {"RECMIX", "Beep Switch", "Beep"}, + {"RECMIX", "Line1 Switch", "LINE1"}, + {"RECMIX", "Mic1 Switch", "MIC1"}, + + {"ADC 0 Mux", "Dmic", "DMIC1"}, + {"ADC 0 Mux", "RECMIX", "RECMIX"}, + {"ADC 0 Mux", "Mic", "MIC1"}, + {"ADC 1 Mux", "Dmic", "DMIC2"}, + {"ADC 1 Mux", "RECMIX", "RECMIX"}, + {"ADC 1 Mux", "Mic", "MIC1"}, + + {"ADC 0", NULL, "ADC 0 Mux"}, + {"ADC 1", NULL, "ADC 1 Mux"}, + + {"AIF1TX", NULL, "ADC 0"}, + {"AIF2TX", NULL, "ADC 1"}, + + {"DAC 0", NULL, "AIF1RX"}, + {"DAC 1", NULL, "AIF2RX"}, + + {"Front", "DAC Switch", "DAC 0"}, + {"Front", "RECMIX Switch", "RECMIX"}, + + {"Surround", NULL, "DAC 1"}, + + {"SPK Mux", "Front", "Front"}, + {"SPK Mux", "Surround", "Surround"}, + + {"HPO Mux", "Front", "Front"}, + {"HPO Mux", "Surround", "Surround"}, + + {"SPO", "Switch", "SPK Mux"}, + {"HPO L", "Switch", "HPO Mux"}, + {"HPO R", "Switch", "HPO Mux"}, + {"HPO L", NULL, "HP Power"}, + {"HPO R", NULL, "HP Power"}, + + {"SPOL", NULL, "SPO"}, + {"SPOR", NULL, "SPO"}, + {"HPO Pin", NULL, "HPO L"}, + {"HPO Pin", NULL, "HPO R"}, +}; + +static int rt286_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + unsigned int val = 0; + int d_len_code; + + switch (params_rate(params)) { + /* bit 14 0:48K 1:44.1K */ + case 44100: + val |= 0x4000; + break; + case 48000: + break; + default: + dev_err(codec->dev, "Unsupported sample rate %d\n", + params_rate(params)); + return -EINVAL; + } + switch (rt286->sys_clk) { + case 12288000: + case 24576000: + if (params_rate(params) != 48000) { + dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n", + params_rate(params), rt286->sys_clk); + return -EINVAL; + } + break; + case 11289600: + case 22579200: + if (params_rate(params) != 44100) { + dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n", + params_rate(params), rt286->sys_clk); + return -EINVAL; + } + break; + } + + if (params_channels(params) <= 16) { + /* bit 3:0 Number of Channel */ + val |= (params_channels(params) - 1); + } else { + dev_err(codec->dev, "Unsupported channels %d\n", + params_channels(params)); + return -EINVAL; + } + + d_len_code = 0; + switch (params_width(params)) { + /* bit 6:4 Bits per Sample */ + case 16: + d_len_code = 0; + val |= (0x1 << 4); + break; + case 32: + d_len_code = 2; + val |= (0x4 << 4); + break; + case 20: + d_len_code = 1; + val |= (0x2 << 4); + break; + case 24: + d_len_code = 2; + val |= (0x3 << 4); + break; + case 8: + d_len_code = 3; + break; + default: + return -EINVAL; + } + + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x0018, d_len_code << 3); + dev_dbg(codec->dev, "format val = 0x%x\n", val); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x407f, val); + else + snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x407f, val); + + return 0; +} + +static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x800, 0x800); + break; + case SND_SOC_DAIFMT_CBS_CFS: + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x800, 0x0); + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x300, 0x0); + break; + case SND_SOC_DAIFMT_LEFT_J: + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x300, 0x1 << 8); + break; + case SND_SOC_DAIFMT_DSP_A: + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x300, 0x2 << 8); + break; + case SND_SOC_DAIFMT_DSP_B: + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x300, 0x3 << 8); + break; + default: + return -EINVAL; + } + /* bit 15 Stream Type 0:PCM 1:Non-PCM */ + snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x8000, 0); + snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x8000, 0); + + return 0; +} + +static int rt286_set_dai_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq); + + if (RT286_SCLK_S_MCLK == clk_id) { + snd_soc_update_bits(codec, + RT286_I2S_CTRL2, 0x0100, 0x0); + snd_soc_update_bits(codec, + RT286_PLL_CTRL1, 0x20, 0x20); + } else { + snd_soc_update_bits(codec, + RT286_I2S_CTRL2, 0x0100, 0x0100); + snd_soc_update_bits(codec, + RT286_PLL_CTRL, 0x4, 0x4); + snd_soc_update_bits(codec, + RT286_PLL_CTRL1, 0x20, 0x0); + } + + switch (freq) { + case 19200000: + if (RT286_SCLK_S_MCLK == clk_id) { + dev_err(codec->dev, "Should not use MCLK\n"); + return -EINVAL; + } + snd_soc_update_bits(codec, + RT286_I2S_CTRL2, 0x40, 0x40); + break; + case 24000000: + if (RT286_SCLK_S_MCLK == clk_id) { + dev_err(codec->dev, "Should not use MCLK\n"); + return -EINVAL; + } + snd_soc_update_bits(codec, + RT286_I2S_CTRL2, 0x40, 0x0); + break; + case 12288000: + case 11289600: + snd_soc_update_bits(codec, + RT286_I2S_CTRL2, 0x8, 0x0); + snd_soc_update_bits(codec, + RT286_CLK_DIV, 0xfc1e, 0x0004); + break; + case 24576000: + case 22579200: + snd_soc_update_bits(codec, + RT286_I2S_CTRL2, 0x8, 0x8); + snd_soc_update_bits(codec, + RT286_CLK_DIV, 0xfc1e, 0x5406); + break; + default: + dev_err(codec->dev, "Unsupported system clock\n"); + return -EINVAL; + } + + rt286->sys_clk = freq; + + return 0; +} + +static int rt286_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) +{ + struct snd_soc_codec *codec = dai->codec; + + dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio); + if (50 == ratio) + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x1000, 0x1000); + else + snd_soc_update_bits(codec, + RT286_I2S_CTRL1, 0x1000, 0x0); + + + return 0; +} + +static int rt286_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + switch (level) { + case SND_SOC_BIAS_PREPARE: + if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) { + snd_soc_write(codec, + RT286_SET_AUDIO_POWER, AC_PWRST_D0); + snd_soc_update_bits(codec, + RT286_DC_GAIN, 0x200, 0x200); + } + break; + + case SND_SOC_BIAS_ON: + mdelay(10); + break; + + case SND_SOC_BIAS_STANDBY: + snd_soc_write(codec, + RT286_SET_AUDIO_POWER, AC_PWRST_D3); + snd_soc_update_bits(codec, + RT286_DC_GAIN, 0x200, 0x0); + break; + + default: + break; + } + codec->dapm.bias_level = level; + + return 0; +} + +static irqreturn_t rt286_irq(int irq, void *data) +{ + struct rt286_priv *rt286 = data; + bool hp = false; + bool mic = false; + int status = 0; + + rt286_jack_detect(rt286, &hp, &mic); + + /* Clear IRQ */ + regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x1, 0x1); + + if (hp == true) + status |= SND_JACK_HEADPHONE; + + if (mic == true) + status |= SND_JACK_MICROPHONE; + + snd_soc_jack_report(rt286->jack, status, + SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); + + pm_wakeup_event(&rt286->i2c->dev, 300); + + return IRQ_HANDLED; +} + +static int rt286_probe(struct snd_soc_codec *codec) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + codec->dapm.bias_level = SND_SOC_BIAS_OFF; + + if (rt286->i2c->irq) { + regmap_update_bits(rt286->regmap, + RT286_IRQ_CTRL, 0x2, 0x2); + + INIT_DELAYED_WORK(&rt286->jack_detect_work, + rt286_jack_detect_work); + schedule_delayed_work(&rt286->jack_detect_work, + msecs_to_jiffies(1250)); + } + + return 0; +} + +static int rt286_remove(struct snd_soc_codec *codec) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + cancel_delayed_work_sync(&rt286->jack_detect_work); + + return 0; +} + +#ifdef CONFIG_PM +static int rt286_suspend(struct snd_soc_codec *codec) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt286->regmap, true); + regcache_mark_dirty(rt286->regmap); + + return 0; +} + +static int rt286_resume(struct snd_soc_codec *codec) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt286->regmap, false); + rt286_index_sync(codec); + regcache_sync(rt286->regmap); + + return 0; +} +#else +#define rt286_suspend NULL +#define rt286_resume NULL +#endif + +#define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) +#define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) + +static const struct snd_soc_dai_ops rt286_aif_dai_ops = { + .hw_params = rt286_hw_params, + .set_fmt = rt286_set_dai_fmt, + .set_sysclk = rt286_set_dai_sysclk, + .set_bclk_ratio = rt286_set_bclk_ratio, +}; + +static struct snd_soc_dai_driver rt286_dai[] = { + { + .name = "rt286-aif1", + .id = RT286_AIF1, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT286_STEREO_RATES, + .formats = RT286_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT286_STEREO_RATES, + .formats = RT286_FORMATS, + }, + .ops = &rt286_aif_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "rt286-aif2", + .id = RT286_AIF2, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT286_STEREO_RATES, + .formats = RT286_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT286_STEREO_RATES, + .formats = RT286_FORMATS, + }, + .ops = &rt286_aif_dai_ops, + .symmetric_rates = 1, + }, + +}; + +static struct snd_soc_codec_driver soc_codec_dev_rt286 = { + .probe = rt286_probe, + .remove = rt286_remove, + .suspend = rt286_suspend, + .resume = rt286_resume, + .set_bias_level = rt286_set_bias_level, + .idle_bias_off = true, + .controls = rt286_snd_controls, + .num_controls = ARRAY_SIZE(rt286_snd_controls), + .dapm_widgets = rt286_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets), + .dapm_routes = rt286_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes), +}; + +static const struct regmap_config rt286_regmap = { + .reg_bits = 32, + .val_bits = 32, + .max_register = 0x02370100, + .volatile_reg = rt286_volatile_register, + .readable_reg = rt286_readable_register, + .reg_write = rt286_hw_write, + .reg_read = rt286_hw_read, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt286_reg, + .num_reg_defaults = ARRAY_SIZE(rt286_reg), +}; + +static const struct i2c_device_id rt286_i2c_id[] = { + {"rt286", 0}, + {} +}; +MODULE_DEVICE_TABLE(i2c, rt286_i2c_id); + +static const struct acpi_device_id rt286_acpi_match[] = { + { "INT343A", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, rt286_acpi_match); + +static int rt286_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev); + struct rt286_priv *rt286; + int i, ret; + + rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286), + GFP_KERNEL); + if (NULL == rt286) + return -ENOMEM; + + rt286->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt286_regmap); + if (IS_ERR(rt286->regmap)) { + ret = PTR_ERR(rt286->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + regmap_read(rt286->regmap, + RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret); + if (ret != RT286_VENDOR_ID) { + dev_err(&i2c->dev, + "Device with ID register %x is not rt286\n", ret); + return -ENODEV; + } + + rt286->index_cache = rt286_index_def; + rt286->i2c = i2c; + i2c_set_clientdata(i2c, rt286); + + if (pdata) + rt286->pdata = *pdata; + + regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3); + + for (i = 0; i < RT286_POWER_REG_LEN; i++) + regmap_write(rt286->regmap, + RT286_SET_POWER(rt286_support_power_controls[i]), + AC_PWRST_D1); + + if (!rt286->pdata.cbj_en) { + regmap_write(rt286->regmap, RT286_CBJ_CTRL2, 0x0000); + regmap_write(rt286->regmap, RT286_MIC1_DET_CTRL, 0x0816); + regmap_write(rt286->regmap, RT286_MISC_CTRL1, 0x0000); + regmap_update_bits(rt286->regmap, + RT286_CBJ_CTRL1, 0xf000, 0xb000); + } else { + regmap_update_bits(rt286->regmap, + RT286_CBJ_CTRL1, 0xf000, 0x5000); + } + + mdelay(10); + + if (!rt286->pdata.gpio2_en) + regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000); + else + regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0); + + mdelay(10); + + /*Power down LDO2*/ + regmap_update_bits(rt286->regmap, RT286_POWER_CTRL2, 0x8, 0x0); + + /*Set depop parameter*/ + regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL2, 0x403a, 0x401a); + regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL3, 0xf777, 0x4737); + regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL4, 0x00ff, 0x003f); + + if (rt286->i2c->irq) { + ret = request_threaded_irq(rt286->i2c->irq, NULL, rt286_irq, + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt286", rt286); + if (ret != 0) { + dev_err(&i2c->dev, + "Failed to reguest IRQ: %d\n", ret); + return ret; + } + } + + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt286, + rt286_dai, ARRAY_SIZE(rt286_dai)); + + return ret; +} + +static int rt286_i2c_remove(struct i2c_client *i2c) +{ + struct rt286_priv *rt286 = i2c_get_clientdata(i2c); + + if (i2c->irq) + free_irq(i2c->irq, rt286); + snd_soc_unregister_codec(&i2c->dev); + + return 0; +} + + +static struct i2c_driver rt286_i2c_driver = { + .driver = { + .name = "rt286", + .owner = THIS_MODULE, + .acpi_match_table = ACPI_PTR(rt286_acpi_match), + }, + .probe = rt286_i2c_probe, + .remove = rt286_i2c_remove, + .id_table = rt286_i2c_id, +}; + +module_i2c_driver(rt286_i2c_driver); + +MODULE_DESCRIPTION("ASoC RT286 driver"); +MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/rt286.h b/sound/soc/codecs/rt286.h new file mode 100644 index 000000000000..b539b7320a79 --- /dev/null +++ b/sound/soc/codecs/rt286.h @@ -0,0 +1,198 @@ +/* + * rt286.h -- RT286 ALSA SoC audio driver + * + * Copyright 2011 Realtek Microelectronics + * Author: Johnny Hsu <johnnyhsu@realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __RT286_H__ +#define __RT286_H__ + +#define VERB_CMD(V, N, D) ((N << 20) | (V << 8) | D) + +#define RT286_AUDIO_FUNCTION_GROUP 0x01 +#define RT286_DAC_OUT1 0x02 +#define RT286_DAC_OUT2 0x03 +#define RT286_ADC_IN1 0x09 +#define RT286_ADC_IN2 0x08 +#define RT286_MIXER_IN 0x0b +#define RT286_MIXER_OUT1 0x0c +#define RT286_MIXER_OUT2 0x0d +#define RT286_DMIC1 0x12 +#define RT286_DMIC2 0x13 +#define RT286_SPK_OUT 0x14 +#define RT286_MIC1 0x18 +#define RT286_LINE1 0x1a +#define RT286_BEEP 0x1d +#define RT286_SPDIF 0x1e +#define RT286_VENDOR_REGISTERS 0x20 +#define RT286_HP_OUT 0x21 +#define RT286_MIXER_IN1 0x22 +#define RT286_MIXER_IN2 0x23 + +#define RT286_SET_PIN_SFT 6 +#define RT286_SET_PIN_ENABLE 0x40 +#define RT286_SET_PIN_DISABLE 0 +#define RT286_SET_EAPD_HIGH 0x2 +#define RT286_SET_EAPD_LOW 0 + +#define RT286_MUTE_SFT 7 + +/* Verb commands */ +#define RT286_GET_PARAM(NID, PARAM) VERB_CMD(AC_VERB_PARAMETERS, NID, PARAM) +#define RT286_SET_POWER(NID) VERB_CMD(AC_VERB_SET_POWER_STATE, NID, 0) +#define RT286_SET_AUDIO_POWER RT286_SET_POWER(RT286_AUDIO_FUNCTION_GROUP) +#define RT286_SET_HPO_POWER RT286_SET_POWER(RT286_HP_OUT) +#define RT286_SET_SPK_POWER RT286_SET_POWER(RT286_SPK_OUT) +#define RT286_SET_DMIC1_POWER RT286_SET_POWER(RT286_DMIC1) +#define RT286_SPK_MUX\ + VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT286_SPK_OUT, 0) +#define RT286_HPO_MUX\ + VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT286_HP_OUT, 0) +#define RT286_ADC0_MUX\ + VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT286_MIXER_IN1, 0) +#define RT286_ADC1_MUX\ + VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT286_MIXER_IN2, 0) +#define RT286_SET_MIC1\ + VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT286_MIC1, 0) +#define RT286_SET_PIN_HPO\ + VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT286_HP_OUT, 0) +#define RT286_SET_PIN_SPK\ + VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT286_SPK_OUT, 0) +#define RT286_SET_PIN_DMIC1\ + VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT286_DMIC1, 0) +#define RT286_SPK_EAPD\ + VERB_CMD(AC_VERB_SET_EAPD_BTLENABLE, RT286_SPK_OUT, 0) +#define RT286_SET_AMP_GAIN_HPO\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_HP_OUT, 0) +#define RT286_SET_AMP_GAIN_ADC_IN1\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_ADC_IN1, 0) +#define RT286_SET_AMP_GAIN_ADC_IN2\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_ADC_IN2, 0) +#define RT286_GET_HP_SENSE\ + VERB_CMD(AC_VERB_GET_PIN_SENSE, RT286_HP_OUT, 0) +#define RT286_GET_MIC1_SENSE\ + VERB_CMD(AC_VERB_GET_PIN_SENSE, RT286_MIC1, 0) +#define RT286_SET_DMIC2_DEFAULT\ + VERB_CMD(AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, RT286_DMIC2, 0) +#define RT286_DACL_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_DAC_OUT1, 0xa000) +#define RT286_DACR_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_DAC_OUT1, 0x9000) +#define RT286_ADCL_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_ADC_IN1, 0x6000) +#define RT286_ADCR_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_ADC_IN1, 0x5000) +#define RT286_MIC_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_MIC1, 0x7000) +#define RT286_SPOL_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_SPK_OUT, 0xa000) +#define RT286_SPOR_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_SPK_OUT, 0x9000) +#define RT286_HPOL_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_HP_OUT, 0xa000) +#define RT286_HPOR_GAIN\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_HP_OUT, 0x9000) +#define RT286_F_DAC_SWITCH\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_MIXER_OUT1, 0x7000) +#define RT286_F_RECMIX_SWITCH\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_MIXER_OUT1, 0x7100) +#define RT286_REC_MIC_SWITCH\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_MIXER_IN, 0x7000) +#define RT286_REC_I2S_SWITCH\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_MIXER_IN, 0x7100) +#define RT286_REC_LINE_SWITCH\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_MIXER_IN, 0x7200) +#define RT286_REC_BEEP_SWITCH\ + VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT286_MIXER_IN, 0x7300) +#define RT286_DAC_FORMAT\ + VERB_CMD(AC_VERB_SET_STREAM_FORMAT, RT286_DAC_OUT1, 0) +#define RT286_ADC_FORMAT\ + VERB_CMD(AC_VERB_SET_STREAM_FORMAT, RT286_ADC_IN1, 0) +#define RT286_COEF_INDEX\ + VERB_CMD(AC_VERB_SET_COEF_INDEX, RT286_VENDOR_REGISTERS, 0) +#define RT286_PROC_COEF\ + VERB_CMD(AC_VERB_SET_PROC_COEF, RT286_VENDOR_REGISTERS, 0) + +/* Index registers */ +#define RT286_A_BIAS_CTRL1 0x01 +#define RT286_A_BIAS_CTRL2 0x02 +#define RT286_POWER_CTRL1 0x03 +#define RT286_A_BIAS_CTRL3 0x04 +#define RT286_POWER_CTRL2 0x08 +#define RT286_I2S_CTRL1 0x09 +#define RT286_I2S_CTRL2 0x0a +#define RT286_CLK_DIV 0x0b +#define RT286_DC_GAIN 0x0d +#define RT286_POWER_CTRL3 0x0f +#define RT286_MIC1_DET_CTRL 0x19 +#define RT286_MISC_CTRL1 0x20 +#define RT286_IRQ_CTRL 0x33 +#define RT286_PLL_CTRL1 0x49 +#define RT286_CBJ_CTRL1 0x4f +#define RT286_CBJ_CTRL2 0x50 +#define RT286_PLL_CTRL 0x63 +#define RT286_DEPOP_CTRL1 0x66 +#define RT286_DEPOP_CTRL2 0x67 +#define RT286_DEPOP_CTRL3 0x68 +#define RT286_DEPOP_CTRL4 0x69 + +/* SPDIF (0x06) */ +#define RT286_SPDIF_SEL_SFT 0 +#define RT286_SPDIF_SEL_PCM0 0 +#define RT286_SPDIF_SEL_PCM1 1 +#define RT286_SPDIF_SEL_SPOUT 2 +#define RT286_SPDIF_SEL_PP 3 + +/* RECMIX (0x0b) */ +#define RT286_M_REC_BEEP_SFT 0 +#define RT286_M_REC_LINE1_SFT 1 +#define RT286_M_REC_MIC1_SFT 2 +#define RT286_M_REC_I2S_SFT 3 + +/* Front (0x0c) */ +#define RT286_M_FRONT_DAC_SFT 0 +#define RT286_M_FRONT_REC_SFT 1 + +/* SPK-OUT (0x14) */ +#define RT286_M_SPK_MUX_SFT 14 +#define RT286_SPK_SEL_MASK 0x1 +#define RT286_SPK_SEL_SFT 0 +#define RT286_SPK_SEL_F 0 +#define RT286_SPK_SEL_S 1 + +/* HP-OUT (0x21) */ +#define RT286_M_HP_MUX_SFT 14 +#define RT286_HP_SEL_MASK 0x1 +#define RT286_HP_SEL_SFT 0 +#define RT286_HP_SEL_F 0 +#define RT286_HP_SEL_S 1 + +/* ADC (0x22) (0x23) */ +#define RT286_ADC_SEL_MASK 0x7 +#define RT286_ADC_SEL_SFT 0 +#define RT286_ADC_SEL_SURR 0 +#define RT286_ADC_SEL_FRONT 1 +#define RT286_ADC_SEL_DMIC 2 +#define RT286_ADC_SEL_BEEP 4 +#define RT286_ADC_SEL_LINE1 5 +#define RT286_ADC_SEL_I2S 6 +#define RT286_ADC_SEL_MIC1 7 + +#define RT286_SCLK_S_MCLK 0 +#define RT286_SCLK_S_PLL 1 + +enum { + RT286_AIF1, + RT286_AIF2, + RT286_AIFS, +}; + +int rt286_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack); + +#endif /* __RT286_H__ */ + diff --git a/sound/soc/codecs/rt5631.c b/sound/soc/codecs/rt5631.c index 30e234708579..1ba27db660a6 100644 --- a/sound/soc/codecs/rt5631.c +++ b/sound/soc/codecs/rt5631.c @@ -1370,16 +1370,16 @@ static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream, return coeff; } - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= RT5631_SDP_I2S_DL_20; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= RT5631_SDP_I2S_DL_24; break; - case SNDRV_PCM_FORMAT_S8: + case 8: iface |= RT5631_SDP_I2S_DL_8; break; default: diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c index de80e89b5fd8..6bc6efdec550 100644 --- a/sound/soc/codecs/rt5640.c +++ b/sound/soc/codecs/rt5640.c @@ -2215,14 +2215,8 @@ static int rt5640_i2c_probe(struct i2c_client *i2c, rt5640->hp_mute = 1; - ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640, - rt5640_dai, ARRAY_SIZE(rt5640_dai)); - if (ret < 0) - goto err; - - return 0; -err: - return ret; + return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640, + rt5640_dai, ARRAY_SIZE(rt5640_dai)); } static int rt5640_i2c_remove(struct i2c_client *i2c) diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index 02147be2b302..a7762d0a623e 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c @@ -2345,14 +2345,8 @@ static int rt5645_i2c_probe(struct i2c_client *i2c, } - ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645, - rt5645_dai, ARRAY_SIZE(rt5645_dai)); - if (ret < 0) - goto err; - - return 0; -err: - return ret; + return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645, + rt5645_dai, ARRAY_SIZE(rt5645_dai)); } static int rt5645_i2c_remove(struct i2c_client *i2c) diff --git a/sound/soc/codecs/rt5651.c b/sound/soc/codecs/rt5651.c index ea4b1c652a26..bb0a3ab5416c 100644 --- a/sound/soc/codecs/rt5651.c +++ b/sound/soc/codecs/rt5651.c @@ -1366,16 +1366,16 @@ static int rt5651_hw_params(struct snd_pcm_substream *substream, dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", bclk_ms, pre_div, dai->id); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: val_len |= RT5651_I2S_DL_20; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: val_len |= RT5651_I2S_DL_24; break; - case SNDRV_PCM_FORMAT_S8: + case 8: val_len |= RT5651_I2S_DL_8; break; default: diff --git a/sound/soc/codecs/rt5670-dsp.h b/sound/soc/codecs/rt5670-dsp.h new file mode 100644 index 000000000000..a34d0cdb8198 --- /dev/null +++ b/sound/soc/codecs/rt5670-dsp.h @@ -0,0 +1,54 @@ +/* + * rt5670-dsp.h -- RT5670 ALSA SoC DSP driver + * + * Copyright 2014 Realtek Microelectronics + * Author: Bard Liao <bardliao@realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __RT5670_DSP_H__ +#define __RT5670_DSP_H__ + +#define RT5670_DSP_CTRL1 0xe0 +#define RT5670_DSP_CTRL2 0xe1 +#define RT5670_DSP_CTRL3 0xe2 +#define RT5670_DSP_CTRL4 0xe3 +#define RT5670_DSP_CTRL5 0xe4 + +/* DSP Control 1 (0xe0) */ +#define RT5670_DSP_CMD_MASK (0xff << 8) +#define RT5670_DSP_CMD_PE (0x0d << 8) /* Patch Entry */ +#define RT5670_DSP_CMD_MW (0x3b << 8) /* Memory Write */ +#define RT5670_DSP_CMD_MR (0x37 << 8) /* Memory Read */ +#define RT5670_DSP_CMD_RR (0x60 << 8) /* Register Read */ +#define RT5670_DSP_CMD_RW (0x68 << 8) /* Register Write */ +#define RT5670_DSP_REG_DATHI (0x26 << 8) /* High Data Addr */ +#define RT5670_DSP_REG_DATLO (0x25 << 8) /* Low Data Addr */ +#define RT5670_DSP_CLK_MASK (0x3 << 6) +#define RT5670_DSP_CLK_SFT 6 +#define RT5670_DSP_CLK_768K (0x0 << 6) +#define RT5670_DSP_CLK_384K (0x1 << 6) +#define RT5670_DSP_CLK_192K (0x2 << 6) +#define RT5670_DSP_CLK_96K (0x3 << 6) +#define RT5670_DSP_BUSY_MASK (0x1 << 5) +#define RT5670_DSP_RW_MASK (0x1 << 4) +#define RT5670_DSP_DL_MASK (0x3 << 2) +#define RT5670_DSP_DL_0 (0x0 << 2) +#define RT5670_DSP_DL_1 (0x1 << 2) +#define RT5670_DSP_DL_2 (0x2 << 2) +#define RT5670_DSP_DL_3 (0x3 << 2) +#define RT5670_DSP_I2C_AL_16 (0x1 << 1) +#define RT5670_DSP_CMD_EN (0x1) + +struct rt5670_dsp_param { + u16 cmd_fmt; + u16 addr; + u16 data; + u8 cmd; +}; + +#endif /* __RT5670_DSP_H__ */ + diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c new file mode 100644 index 000000000000..ba9d9b4d4857 --- /dev/null +++ b/sound/soc/codecs/rt5670.c @@ -0,0 +1,2657 @@ +/* + * rt5670.c -- RT5670 ALSA SoC audio codec driver + * + * Copyright 2014 Realtek Semiconductor Corp. + * Author: Bard Liao <bardliao@realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/jack.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/rt5670.h> + +#include "rl6231.h" +#include "rt5670.h" +#include "rt5670-dsp.h" + +#define RT5670_DEVICE_ID 0x6271 + +#define RT5670_PR_RANGE_BASE (0xff + 1) +#define RT5670_PR_SPACING 0x100 + +#define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) + +static const struct regmap_range_cfg rt5670_ranges[] = { + { .name = "PR", .range_min = RT5670_PR_BASE, + .range_max = RT5670_PR_BASE + 0xf8, + .selector_reg = RT5670_PRIV_INDEX, + .selector_mask = 0xff, + .selector_shift = 0x0, + .window_start = RT5670_PRIV_DATA, + .window_len = 0x1, }, +}; + +static struct reg_default init_list[] = { + { RT5670_PR_BASE + 0x14, 0x9a8a }, + { RT5670_PR_BASE + 0x38, 0x3ba1 }, + { RT5670_PR_BASE + 0x3d, 0x3640 }, +}; +#define RT5670_INIT_REG_LEN ARRAY_SIZE(init_list) + +static const struct reg_default rt5670_reg[] = { + { 0x00, 0x0000 }, + { 0x02, 0x8888 }, + { 0x03, 0x8888 }, + { 0x0a, 0x0001 }, + { 0x0b, 0x0827 }, + { 0x0c, 0x0000 }, + { 0x0d, 0x0008 }, + { 0x0e, 0x0000 }, + { 0x0f, 0x0808 }, + { 0x19, 0xafaf }, + { 0x1a, 0xafaf }, + { 0x1b, 0x0011 }, + { 0x1c, 0x2f2f }, + { 0x1d, 0x2f2f }, + { 0x1e, 0x0000 }, + { 0x1f, 0x2f2f }, + { 0x20, 0x0000 }, + { 0x26, 0x7860 }, + { 0x27, 0x7860 }, + { 0x28, 0x7871 }, + { 0x29, 0x8080 }, + { 0x2a, 0x5656 }, + { 0x2b, 0x5454 }, + { 0x2c, 0xaaa0 }, + { 0x2d, 0x0000 }, + { 0x2e, 0x2f2f }, + { 0x2f, 0x1002 }, + { 0x30, 0x0000 }, + { 0x31, 0x5f00 }, + { 0x32, 0x0000 }, + { 0x33, 0x0000 }, + { 0x34, 0x0000 }, + { 0x35, 0x0000 }, + { 0x36, 0x0000 }, + { 0x37, 0x0000 }, + { 0x38, 0x0000 }, + { 0x3b, 0x0000 }, + { 0x3c, 0x007f }, + { 0x3d, 0x0000 }, + { 0x3e, 0x007f }, + { 0x45, 0xe00f }, + { 0x4c, 0x5380 }, + { 0x4f, 0x0073 }, + { 0x52, 0x00d3 }, + { 0x53, 0xf0f0 }, + { 0x61, 0x0000 }, + { 0x62, 0x0001 }, + { 0x63, 0x00c3 }, + { 0x64, 0x0000 }, + { 0x65, 0x0000 }, + { 0x66, 0x0000 }, + { 0x6f, 0x8000 }, + { 0x70, 0x8000 }, + { 0x71, 0x8000 }, + { 0x72, 0x8000 }, + { 0x73, 0x1110 }, + { 0x74, 0x0e00 }, + { 0x75, 0x1505 }, + { 0x76, 0x0015 }, + { 0x77, 0x0c00 }, + { 0x78, 0x4000 }, + { 0x79, 0x0123 }, + { 0x7f, 0x1100 }, + { 0x80, 0x0000 }, + { 0x81, 0x0000 }, + { 0x82, 0x0000 }, + { 0x83, 0x0000 }, + { 0x84, 0x0000 }, + { 0x85, 0x0000 }, + { 0x86, 0x0008 }, + { 0x87, 0x0000 }, + { 0x88, 0x0000 }, + { 0x89, 0x0000 }, + { 0x8a, 0x0000 }, + { 0x8b, 0x0000 }, + { 0x8c, 0x0007 }, + { 0x8d, 0x0000 }, + { 0x8e, 0x0004 }, + { 0x8f, 0x1100 }, + { 0x90, 0x0646 }, + { 0x91, 0x0c06 }, + { 0x93, 0x0000 }, + { 0x94, 0x0000 }, + { 0x95, 0x0000 }, + { 0x97, 0x0000 }, + { 0x98, 0x0000 }, + { 0x99, 0x0000 }, + { 0x9a, 0x2184 }, + { 0x9b, 0x010a }, + { 0x9c, 0x0aea }, + { 0x9d, 0x000c }, + { 0x9e, 0x0400 }, + { 0xae, 0x7000 }, + { 0xaf, 0x0000 }, + { 0xb0, 0x6000 }, + { 0xb1, 0x0000 }, + { 0xb2, 0x0000 }, + { 0xb3, 0x001f }, + { 0xb4, 0x2206 }, + { 0xb5, 0x1f00 }, + { 0xb6, 0x0000 }, + { 0xb7, 0x0000 }, + { 0xbb, 0x0000 }, + { 0xbc, 0x0000 }, + { 0xbd, 0x0000 }, + { 0xbe, 0x0000 }, + { 0xbf, 0x0000 }, + { 0xc0, 0x0000 }, + { 0xc1, 0x0000 }, + { 0xc2, 0x0000 }, + { 0xcd, 0x0000 }, + { 0xce, 0x0000 }, + { 0xcf, 0x1813 }, + { 0xd0, 0x0690 }, + { 0xd1, 0x1c17 }, + { 0xd3, 0xb320 }, + { 0xd4, 0x0000 }, + { 0xd6, 0x0400 }, + { 0xd9, 0x0809 }, + { 0xda, 0x0000 }, + { 0xdb, 0x0001 }, + { 0xdc, 0x0049 }, + { 0xdd, 0x0009 }, + { 0xe6, 0x8000 }, + { 0xe7, 0x0000 }, + { 0xec, 0xb300 }, + { 0xed, 0x0000 }, + { 0xee, 0xb300 }, + { 0xef, 0x0000 }, + { 0xf8, 0x0000 }, + { 0xf9, 0x0000 }, + { 0xfa, 0x8010 }, + { 0xfb, 0x0033 }, + { 0xfc, 0x0080 }, +}; + +static bool rt5670_volatile_register(struct device *dev, unsigned int reg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { + if ((reg >= rt5670_ranges[i].window_start && + reg <= rt5670_ranges[i].window_start + + rt5670_ranges[i].window_len) || + (reg >= rt5670_ranges[i].range_min && + reg <= rt5670_ranges[i].range_max)) { + return true; + } + } + + switch (reg) { + case RT5670_RESET: + case RT5670_PDM_DATA_CTRL1: + case RT5670_PDM1_DATA_CTRL4: + case RT5670_PDM2_DATA_CTRL4: + case RT5670_PRIV_DATA: + case RT5670_ASRC_5: + case RT5670_CJ_CTRL1: + case RT5670_CJ_CTRL2: + case RT5670_CJ_CTRL3: + case RT5670_A_JD_CTRL1: + case RT5670_A_JD_CTRL2: + case RT5670_VAD_CTRL5: + case RT5670_ADC_EQ_CTRL1: + case RT5670_EQ_CTRL1: + case RT5670_ALC_CTRL_1: + case RT5670_IRQ_CTRL1: + case RT5670_IRQ_CTRL2: + case RT5670_INT_IRQ_ST: + case RT5670_IL_CMD: + case RT5670_DSP_CTRL1: + case RT5670_DSP_CTRL2: + case RT5670_DSP_CTRL3: + case RT5670_DSP_CTRL4: + case RT5670_DSP_CTRL5: + case RT5670_VENDOR_ID: + case RT5670_VENDOR_ID1: + case RT5670_VENDOR_ID2: + return true; + default: + return false; + } +} + +static bool rt5670_readable_register(struct device *dev, unsigned int reg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { + if ((reg >= rt5670_ranges[i].window_start && + reg <= rt5670_ranges[i].window_start + + rt5670_ranges[i].window_len) || + (reg >= rt5670_ranges[i].range_min && + reg <= rt5670_ranges[i].range_max)) { + return true; + } + } + + switch (reg) { + case RT5670_RESET: + case RT5670_HP_VOL: + case RT5670_LOUT1: + case RT5670_CJ_CTRL1: + case RT5670_CJ_CTRL2: + case RT5670_CJ_CTRL3: + case RT5670_IN2: + case RT5670_INL1_INR1_VOL: + case RT5670_DAC1_DIG_VOL: + case RT5670_DAC2_DIG_VOL: + case RT5670_DAC_CTRL: + case RT5670_STO1_ADC_DIG_VOL: + case RT5670_MONO_ADC_DIG_VOL: + case RT5670_STO2_ADC_DIG_VOL: + case RT5670_ADC_BST_VOL1: + case RT5670_ADC_BST_VOL2: + case RT5670_STO2_ADC_MIXER: + case RT5670_STO1_ADC_MIXER: + case RT5670_MONO_ADC_MIXER: + case RT5670_AD_DA_MIXER: + case RT5670_STO_DAC_MIXER: + case RT5670_DD_MIXER: + case RT5670_DIG_MIXER: + case RT5670_DSP_PATH1: + case RT5670_DSP_PATH2: + case RT5670_DIG_INF1_DATA: + case RT5670_DIG_INF2_DATA: + case RT5670_PDM_OUT_CTRL: + case RT5670_PDM_DATA_CTRL1: + case RT5670_PDM1_DATA_CTRL2: + case RT5670_PDM1_DATA_CTRL3: + case RT5670_PDM1_DATA_CTRL4: + case RT5670_PDM2_DATA_CTRL2: + case RT5670_PDM2_DATA_CTRL3: + case RT5670_PDM2_DATA_CTRL4: + case RT5670_REC_L1_MIXER: + case RT5670_REC_L2_MIXER: + case RT5670_REC_R1_MIXER: + case RT5670_REC_R2_MIXER: + case RT5670_HPO_MIXER: + case RT5670_MONO_MIXER: + case RT5670_OUT_L1_MIXER: + case RT5670_OUT_R1_MIXER: + case RT5670_LOUT_MIXER: + case RT5670_PWR_DIG1: + case RT5670_PWR_DIG2: + case RT5670_PWR_ANLG1: + case RT5670_PWR_ANLG2: + case RT5670_PWR_MIXER: + case RT5670_PWR_VOL: + case RT5670_PRIV_INDEX: + case RT5670_PRIV_DATA: + case RT5670_I2S4_SDP: + case RT5670_I2S1_SDP: + case RT5670_I2S2_SDP: + case RT5670_I2S3_SDP: + case RT5670_ADDA_CLK1: + case RT5670_ADDA_CLK2: + case RT5670_DMIC_CTRL1: + case RT5670_DMIC_CTRL2: + case RT5670_TDM_CTRL_1: + case RT5670_TDM_CTRL_2: + case RT5670_TDM_CTRL_3: + case RT5670_DSP_CLK: + case RT5670_GLB_CLK: + case RT5670_PLL_CTRL1: + case RT5670_PLL_CTRL2: + case RT5670_ASRC_1: + case RT5670_ASRC_2: + case RT5670_ASRC_3: + case RT5670_ASRC_4: + case RT5670_ASRC_5: + case RT5670_ASRC_7: + case RT5670_ASRC_8: + case RT5670_ASRC_9: + case RT5670_ASRC_10: + case RT5670_ASRC_11: + case RT5670_ASRC_12: + case RT5670_ASRC_13: + case RT5670_ASRC_14: + case RT5670_DEPOP_M1: + case RT5670_DEPOP_M2: + case RT5670_DEPOP_M3: + case RT5670_CHARGE_PUMP: + case RT5670_MICBIAS: + case RT5670_A_JD_CTRL1: + case RT5670_A_JD_CTRL2: + case RT5670_VAD_CTRL1: + case RT5670_VAD_CTRL2: + case RT5670_VAD_CTRL3: + case RT5670_VAD_CTRL4: + case RT5670_VAD_CTRL5: + case RT5670_ADC_EQ_CTRL1: + case RT5670_ADC_EQ_CTRL2: + case RT5670_EQ_CTRL1: + case RT5670_EQ_CTRL2: + case RT5670_ALC_DRC_CTRL1: + case RT5670_ALC_DRC_CTRL2: + case RT5670_ALC_CTRL_1: + case RT5670_ALC_CTRL_2: + case RT5670_ALC_CTRL_3: + case RT5670_JD_CTRL: + case RT5670_IRQ_CTRL1: + case RT5670_IRQ_CTRL2: + case RT5670_INT_IRQ_ST: + case RT5670_GPIO_CTRL1: + case RT5670_GPIO_CTRL2: + case RT5670_GPIO_CTRL3: + case RT5670_SCRABBLE_FUN: + case RT5670_SCRABBLE_CTRL: + case RT5670_BASE_BACK: + case RT5670_MP3_PLUS1: + case RT5670_MP3_PLUS2: + case RT5670_ADJ_HPF1: + case RT5670_ADJ_HPF2: + case RT5670_HP_CALIB_AMP_DET: + case RT5670_SV_ZCD1: + case RT5670_SV_ZCD2: + case RT5670_IL_CMD: + case RT5670_IL_CMD2: + case RT5670_IL_CMD3: + case RT5670_DRC_HL_CTRL1: + case RT5670_DRC_HL_CTRL2: + case RT5670_ADC_MONO_HP_CTRL1: + case RT5670_ADC_MONO_HP_CTRL2: + case RT5670_ADC_STO2_HP_CTRL1: + case RT5670_ADC_STO2_HP_CTRL2: + case RT5670_JD_CTRL3: + case RT5670_JD_CTRL4: + case RT5670_DIG_MISC: + case RT5670_DSP_CTRL1: + case RT5670_DSP_CTRL2: + case RT5670_DSP_CTRL3: + case RT5670_DSP_CTRL4: + case RT5670_DSP_CTRL5: + case RT5670_GEN_CTRL2: + case RT5670_GEN_CTRL3: + case RT5670_VENDOR_ID: + case RT5670_VENDOR_ID1: + case RT5670_VENDOR_ID2: + return true; + default: + return false; + } +} + +static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); +static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); +static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); +static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); +static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); + +/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ +static unsigned int bst_tlv[] = { + TLV_DB_RANGE_HEAD(7), + 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), + 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), + 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), + 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), + 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), + 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), + 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0), +}; + +/* Interface data select */ +static const char * const rt5670_data_select[] = { + "Normal", "Swap", "left copy to right", "right copy to left" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA, + RT5670_IF2_DAC_SEL_SFT, rt5670_data_select); + +static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA, + RT5670_IF2_ADC_SEL_SFT, rt5670_data_select); + +static const struct snd_kcontrol_new rt5670_snd_controls[] = { + /* Headphone Output Volume */ + SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL, + RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), + SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL, + RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, + 39, 0, out_vol_tlv), + /* OUTPUT Control */ + SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1, + RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1), + SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1, + RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv), + /* DAC Digital Volume */ + SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL, + RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1), + SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL, + RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, + 175, 0, dac_vol_tlv), + SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL, + RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, + 175, 0, dac_vol_tlv), + /* IN1/IN2 Control */ + SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1, + RT5670_BST_SFT1, 8, 0, bst_tlv), + SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2, + RT5670_BST_SFT1, 8, 0, bst_tlv), + /* INL/INR Volume Control */ + SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL, + RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT, + 31, 1, in_vol_tlv), + /* ADC Digital Volume Control */ + SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL, + RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), + SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL, + RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, + 127, 0, adc_vol_tlv), + + SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL, + RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, + 127, 0, adc_vol_tlv), + + /* ADC Boost Volume Control */ + SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, + RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT, + 3, 0, adc_bst_tlv), + + SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, + RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT, + 3, 0, adc_bst_tlv), + + SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum), + SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum), +}; + +/** + * set_dmic_clk - Set parameter of dmic. + * + * @w: DAPM widget. + * @kcontrol: The kcontrol of this widget. + * @event: Event id. + * + * Choose dmic clock between 1MHz and 3MHz. + * It is better for clock to approximate 3MHz. + */ +static int set_dmic_clk(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + int idx = -EINVAL; + + idx = rl6231_calc_dmic_clk(rt5670->sysclk); + + if (idx < 0) + dev_err(codec->dev, "Failed to set DMIC clock\n"); + else + snd_soc_update_bits(codec, RT5670_DMIC_CTRL1, + RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT); + return idx; +} + +static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink) +{ + unsigned int val; + + val = snd_soc_read(source->codec, RT5670_GLB_CLK); + val &= RT5670_SCLK_SRC_MASK; + if (val == RT5670_SCLK_SRC_PLL1) + return 1; + else + return 0; +} + +static int is_using_asrc(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink) +{ + unsigned int reg, shift, val; + + switch (source->shift) { + case 0: + reg = RT5670_ASRC_3; + shift = 0; + break; + case 1: + reg = RT5670_ASRC_3; + shift = 4; + break; + case 2: + reg = RT5670_ASRC_5; + shift = 12; + break; + case 3: + reg = RT5670_ASRC_2; + shift = 0; + break; + case 8: + reg = RT5670_ASRC_2; + shift = 4; + break; + case 9: + reg = RT5670_ASRC_2; + shift = 8; + break; + case 10: + reg = RT5670_ASRC_2; + shift = 12; + break; + default: + return 0; + } + + val = (snd_soc_read(source->codec, reg) >> shift) & 0xf; + switch (val) { + case 1: + case 2: + case 3: + case 4: + return 1; + default: + return 0; + } + +} + +/* Digital Mixer */ +static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, + RT5670_M_ADC_L1_SFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, + RT5670_M_ADC_L2_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, + RT5670_M_ADC_R1_SFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, + RT5670_M_ADC_R2_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, + RT5670_M_ADC_L1_SFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, + RT5670_M_ADC_L2_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, + RT5670_M_ADC_R1_SFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, + RT5670_M_ADC_R2_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, + RT5670_M_MONO_ADC_L1_SFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, + RT5670_M_MONO_ADC_L2_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, + RT5670_M_MONO_ADC_R1_SFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, + RT5670_M_MONO_ADC_R2_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_dac_l_mix[] = { + SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, + RT5670_M_ADCMIX_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, + RT5670_M_DAC1_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_dac_r_mix[] = { + SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, + RT5670_M_ADCMIX_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, + RT5670_M_DAC1_R_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = { + SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, + RT5670_M_DAC_L1_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER, + RT5670_M_DAC_L2_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, + RT5670_M_DAC_R1_STO_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = { + SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, + RT5670_M_DAC_R1_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER, + RT5670_M_DAC_R2_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, + RT5670_M_DAC_L1_STO_R_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = { + SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER, + RT5670_M_DAC_L1_MONO_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, + RT5670_M_DAC_L2_MONO_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, + RT5670_M_DAC_R2_MONO_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = { + SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER, + RT5670_M_DAC_R1_MONO_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, + RT5670_M_DAC_R2_MONO_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, + RT5670_M_DAC_L2_MONO_R_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_dig_l_mix[] = { + SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER, + RT5670_M_STO_L_DAC_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, + RT5670_M_DAC_L2_DAC_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, + RT5670_M_DAC_R2_DAC_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_dig_r_mix[] = { + SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER, + RT5670_M_STO_R_DAC_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, + RT5670_M_DAC_R2_DAC_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, + RT5670_M_DAC_L2_DAC_R_SFT, 1, 1), +}; + +/* Analog Input Mixer */ +static const struct snd_kcontrol_new rt5670_rec_l_mix[] = { + SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER, + RT5670_M_IN_L_RM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER, + RT5670_M_BST2_RM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER, + RT5670_M_BST1_RM_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_rec_r_mix[] = { + SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER, + RT5670_M_IN_R_RM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER, + RT5670_M_BST2_RM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER, + RT5670_M_BST1_RM_R_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_out_l_mix[] = { + SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER, + RT5670_M_BST1_OM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER, + RT5670_M_IN_L_OM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER, + RT5670_M_DAC_L2_OM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER, + RT5670_M_DAC_L1_OM_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_out_r_mix[] = { + SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER, + RT5670_M_BST2_OM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER, + RT5670_M_IN_R_OM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER, + RT5670_M_DAC_R2_OM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER, + RT5670_M_DAC_R1_OM_R_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_hpo_mix[] = { + SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, + RT5670_M_DAC1_HM_SFT, 1, 1), + SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER, + RT5670_M_HPVOL_HM_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = { + SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, + RT5670_M_DACL1_HML_SFT, 1, 1), + SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER, + RT5670_M_INL1_HML_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = { + SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, + RT5670_M_DACR1_HMR_SFT, 1, 1), + SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER, + RT5670_M_INR1_HMR_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_lout_mix[] = { + SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER, + RT5670_M_DAC_L1_LM_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER, + RT5670_M_DAC_R1_LM_SFT, 1, 1), + SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER, + RT5670_M_OV_L_LM_SFT, 1, 1), + SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER, + RT5670_M_OV_R_LM_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_hpl_mix[] = { + SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER, + RT5670_M_DACL1_HML_SFT, 1, 1), + SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER, + RT5670_M_INL1_HML_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5670_hpr_mix[] = { + SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER, + RT5670_M_DACR1_HMR_SFT, 1, 1), + SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER, + RT5670_M_INR1_HMR_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new lout_l_enable_control = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, + RT5670_L_MUTE_SFT, 1, 1); + +static const struct snd_kcontrol_new lout_r_enable_control = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, + RT5670_R_MUTE_SFT, 1, 1); + +/* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */ +static const char * const rt5670_dac1_src[] = { + "IF1 DAC", "IF2 DAC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER, + RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src); + +static const struct snd_kcontrol_new rt5670_dac1l_mux = + SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER, + RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src); + +static const struct snd_kcontrol_new rt5670_dac1r_mux = + SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum); + +/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ +/* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */ +static const char * const rt5670_dac12_src[] = { + "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", + "Bass", "VAD_ADC", "IF4 DAC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL, + RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src); + +static const struct snd_kcontrol_new rt5670_dac_l2_mux = + SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum); + +static const char * const rt5670_dacr2_src[] = { + "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL, + RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src); + +static const struct snd_kcontrol_new rt5670_dac_r2_mux = + SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum); + +/*RxDP source*/ /* MX-2D [15:13] */ +static const char * const rt5670_rxdp_src[] = { + "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer", + "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1, + RT5670_RXDP_SEL_SFT, rt5670_rxdp_src); + +static const struct snd_kcontrol_new rt5670_rxdp_mux = + SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum); + +/* MX-2D [1] [0] */ +static const char * const rt5670_dsp_bypass_src[] = { + "DSP", "Bypass" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1, + RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src); + +static const struct snd_kcontrol_new rt5670_dsp_ul_mux = + SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1, + RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src); + +static const struct snd_kcontrol_new rt5670_dsp_dl_mux = + SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum); + +/* Stereo2 ADC source */ +/* MX-26 [15] */ +static const char * const rt5670_stereo2_adc_lr_src[] = { + "L", "LR" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER, + RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src); + +static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux = + SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum); + +/* Stereo1 ADC source */ +/* MX-27 MX-26 [12] */ +static const char * const rt5670_stereo_adc1_src[] = { + "DAC MIX", "ADC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER, + RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); + +static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux = + SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum); + +static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux = + SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER, + RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); + +static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux = + SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum); + +static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux = + SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum); + +/* MX-27 MX-26 [11] */ +static const char * const rt5670_stereo_adc2_src[] = { + "DAC MIX", "DMIC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER, + RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); + +static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux = + SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum); + +static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux = + SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER, + RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); + +static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux = + SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum); + +static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux = + SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum); + +/* MX-27 MX26 [10] */ +static const char * const rt5670_stereo_adc_src[] = { + "ADC1L ADC2R", "ADC3" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER, + RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); + +static const struct snd_kcontrol_new rt5670_sto_adc_mux = + SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER, + RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); + +static const struct snd_kcontrol_new rt5670_sto2_adc_mux = + SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum); + +/* MX-27 MX-26 [9:8] */ +static const char * const rt5670_stereo_dmic_src[] = { + "DMIC1", "DMIC2", "DMIC3" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER, + RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); + +static const struct snd_kcontrol_new rt5670_sto1_dmic_mux = + SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER, + RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); + +static const struct snd_kcontrol_new rt5670_sto2_dmic_mux = + SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum); + +/* MX-27 [0] */ +static const char * const rt5670_stereo_dmic3_src[] = { + "DMIC3", "PDM ADC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER, + RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src); + +static const struct snd_kcontrol_new rt5670_sto_dmic3_mux = + SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum); + +/* Mono ADC source */ +/* MX-28 [12] */ +static const char * const rt5670_mono_adc_l1_src[] = { + "Mono DAC MIXL", "ADC1" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER, + RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src); + +static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux = + SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum); +/* MX-28 [11] */ +static const char * const rt5670_mono_adc_l2_src[] = { + "Mono DAC MIXL", "DMIC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER, + RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src); + +static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux = + SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum); + +/* MX-28 [9:8] */ +static const char * const rt5670_mono_dmic_src[] = { + "DMIC1", "DMIC2", "DMIC3" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER, + RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src); + +static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux = + SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum); +/* MX-28 [1:0] */ +static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER, + RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src); + +static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux = + SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum); +/* MX-28 [4] */ +static const char * const rt5670_mono_adc_r1_src[] = { + "Mono DAC MIXR", "ADC2" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER, + RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src); + +static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux = + SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum); +/* MX-28 [3] */ +static const char * const rt5670_mono_adc_r2_src[] = { + "Mono DAC MIXR", "DMIC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER, + RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src); + +static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux = + SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum); + +/* MX-2D [3:2] */ +static const char * const rt5670_txdp_slot_src[] = { + "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1, + RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src); + +static const struct snd_kcontrol_new rt5670_txdp_slot_mux = + SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum); + +/* MX-2F [15] */ +static const char * const rt5670_if1_adc2_in_src[] = { + "IF_ADC2", "VAD_ADC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA, + RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src); + +static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux = + SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum); + +/* MX-2F [14:12] */ +static const char * const rt5670_if2_adc_in_src[] = { + "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA, + RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src); + +static const struct snd_kcontrol_new rt5670_if2_adc_in_mux = + SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum); + +/* MX-30 [5:4] */ +static const char * const rt5670_if4_adc_in_src[] = { + "IF_ADC1", "IF_ADC2", "IF_ADC3" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA, + RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src); + +static const struct snd_kcontrol_new rt5670_if4_adc_in_mux = + SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum); + +/* MX-31 [15] [13] [11] [9] */ +static const char * const rt5670_pdm_src[] = { + "Mono DAC", "Stereo DAC" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL, + RT5670_PDM1_L_SFT, rt5670_pdm_src); + +static const struct snd_kcontrol_new rt5670_pdm1_l_mux = + SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL, + RT5670_PDM1_R_SFT, rt5670_pdm_src); + +static const struct snd_kcontrol_new rt5670_pdm1_r_mux = + SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL, + RT5670_PDM2_L_SFT, rt5670_pdm_src); + +static const struct snd_kcontrol_new rt5670_pdm2_l_mux = + SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum); + +static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL, + RT5670_PDM2_R_SFT, rt5670_pdm_src); + +static const struct snd_kcontrol_new rt5670_pdm2_r_mux = + SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum); + +/* MX-FA [12] */ +static const char * const rt5670_if1_adc1_in1_src[] = { + "IF_ADC1", "IF1_ADC3" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC, + RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src); + +static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux = + SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum); + +/* MX-FA [11] */ +static const char * const rt5670_if1_adc1_in2_src[] = { + "IF1_ADC1_IN1", "IF1_ADC4" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC, + RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src); + +static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux = + SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum); + +/* MX-FA [10] */ +static const char * const rt5670_if1_adc2_in1_src[] = { + "IF1_ADC2_IN", "IF1_ADC4" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC, + RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src); + +static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux = + SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum); + +/* MX-9D [9:8] */ +static const char * const rt5670_vad_adc_src[] = { + "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L" +}; + +static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4, + RT5670_VAD_SEL_SFT, rt5670_vad_adc_src); + +static const struct snd_kcontrol_new rt5670_vad_adc_mux = + SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum); + +static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP, + RT5670_PM_HP_MASK, RT5670_PM_HP_HV); + regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, + 0x0400, 0x0400); + /* headphone amp power on */ + regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, + RT5670_PWR_HA | RT5670_PWR_FV1 | + RT5670_PWR_FV2, RT5670_PWR_HA | + RT5670_PWR_FV1 | RT5670_PWR_FV2); + /* depop parameters */ + regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009); + regmap_write(rt5670->regmap, RT5670_PR_BASE + + RT5670_HP_DCC_INT1, 0x9f00); + mdelay(20); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); + break; + case SND_SOC_DAPM_PRE_PMD: + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004); + msleep(30); + break; + default: + return 0; + } + + return 0; +} + +static int rt5670_hp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + /* headphone unmute sequence */ + regmap_write(rt5670->regmap, RT5670_PR_BASE + + RT5670_MAMP_INT_REG2, 0xb400); + regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); + regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, + 0x0300, 0x0300); + regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, + RT5670_L_MUTE | RT5670_R_MUTE, 0); + msleep(80); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); + break; + + case SND_SOC_DAPM_PRE_PMD: + /* headphone mute sequence */ + regmap_write(rt5670->regmap, RT5670_PR_BASE + + RT5670_MAMP_INT_REG2, 0xb400); + regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d); + mdelay(10); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); + mdelay(10); + regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, + RT5670_L_MUTE | RT5670_R_MUTE, + RT5670_L_MUTE | RT5670_R_MUTE); + msleep(20); + regmap_update_bits(rt5670->regmap, + RT5670_GEN_CTRL2, 0x0300, 0x0); + regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); + regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707); + regmap_write(rt5670->regmap, RT5670_PR_BASE + + RT5670_MAMP_INT_REG2, 0xfc00); + break; + + default: + return 0; + } + + return 0; +} + +static int rt5670_bst1_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, RT5670_PWR_ANLG2, + RT5670_PWR_BST1_P, RT5670_PWR_BST1_P); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, RT5670_PWR_ANLG2, + RT5670_PWR_BST1_P, 0); + break; + + default: + return 0; + } + + return 0; +} + +static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, RT5670_PWR_ANLG2, + RT5670_PWR_BST2_P, RT5670_PWR_BST2_P); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, RT5670_PWR_ANLG2, + RT5670_PWR_BST2_P, 0); + break; + + default: + return 0; + } + + return 0; +} + +static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, + RT5670_PWR_PLL_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2, + RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL, + RT5670_PWR_MIC_DET_BIT, 0, NULL, 0), + + /* ASRC */ + SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1, + 11, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1, + 12, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1, + 10, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1, + 9, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1, + 8, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1, + 3, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1, + 2, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1, + 1, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1, + 0, 0, NULL, 0), + + /* Input Side */ + /* micbias */ + SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2, + RT5670_PWR_MB1_BIT, 0, NULL, 0), + + /* Input Lines */ + SND_SOC_DAPM_INPUT("DMIC L1"), + SND_SOC_DAPM_INPUT("DMIC R1"), + SND_SOC_DAPM_INPUT("DMIC L2"), + SND_SOC_DAPM_INPUT("DMIC R2"), + SND_SOC_DAPM_INPUT("DMIC L3"), + SND_SOC_DAPM_INPUT("DMIC R3"), + + SND_SOC_DAPM_INPUT("IN1P"), + SND_SOC_DAPM_INPUT("IN1N"), + SND_SOC_DAPM_INPUT("IN2P"), + SND_SOC_DAPM_INPUT("IN2N"), + + SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0), + + SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, + set_dmic_clk, SND_SOC_DAPM_PRE_PMU), + SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1, + RT5670_DMIC_1_EN_SFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1, + RT5670_DMIC_2_EN_SFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1, + RT5670_DMIC_3_EN_SFT, 0, NULL, 0), + /* Boost */ + SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT, + 0, NULL, 0, rt5670_bst1_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT, + 0, NULL, 0, rt5670_bst2_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + /* Input Volume */ + SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL, + RT5670_PWR_IN_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL, + RT5670_PWR_IN_R_BIT, 0, NULL, 0), + + /* REC Mixer */ + SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0, + rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)), + SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0, + rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)), + /* ADCs */ + SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0), + + SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0), + + SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1, + RT5670_PWR_ADC_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1, + RT5670_PWR_ADC_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE + + RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0), + /* ADC Mux */ + SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto1_dmic_mux), + SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto_adc_l2_mux), + SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto_adc_r2_mux), + SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto_adc_l1_mux), + SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto_adc_r1_mux), + SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto2_dmic_mux), + SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto2_adc_l2_mux), + SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto2_adc_r2_mux), + SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto2_adc_l1_mux), + SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto2_adc_r1_mux), + SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0, + &rt5670_sto2_adc_lr_mux), + SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, + &rt5670_mono_dmic_l_mux), + SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, + &rt5670_mono_dmic_r_mux), + SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_mono_adc_l2_mux), + SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_mono_adc_l1_mux), + SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_mono_adc_r1_mux), + SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_mono_adc_r2_mux), + /* ADC Mixer */ + SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2, + RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2, + RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0), + SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL, + RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix, + ARRAY_SIZE(rt5670_sto1_adc_l_mix)), + SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL, + RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix, + ARRAY_SIZE(rt5670_sto1_adc_r_mix)), + SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, + rt5670_sto2_adc_l_mix, + ARRAY_SIZE(rt5670_sto2_adc_l_mix)), + SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, + rt5670_sto2_adc_r_mix, + ARRAY_SIZE(rt5670_sto2_adc_r_mix)), + SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2, + RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL, + RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix, + ARRAY_SIZE(rt5670_mono_adc_l_mix)), + SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2, + RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL, + RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix, + ARRAY_SIZE(rt5670_mono_adc_r_mix)), + + /* ADC PGA */ + SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* DSP */ + SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0), + + SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0, + &rt5670_txdp_slot_mux), + + SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0, + &rt5670_dsp_ul_mux), + SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0, + &rt5670_dsp_dl_mux), + + SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0, + &rt5670_rxdp_mux), + + /* IF2 Mux */ + SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0, + &rt5670_if2_adc_in_mux), + + /* Digital Interface */ + SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1, + RT5670_PWR_I2S1_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1, + RT5670_PWR_I2S2_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* Digital Interface Select */ + SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_if1_adc1_in1_mux), + SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_if1_adc1_in2_mux), + SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0, + &rt5670_if1_adc2_in_mux), + SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_if1_adc2_in1_mux), + SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0, + &rt5670_vad_adc_mux), + + /* Audio Interface */ + SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, + RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1), + + /* Audio DSP */ + SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* Output Side */ + /* DAC mixer before sound effect */ + SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, + rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)), + SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, + rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)), + SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* DAC2 channel Mux */ + SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_dac_l2_mux), + SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, + &rt5670_dac_r2_mux), + SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1, + RT5670_PWR_DAC_L2_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1, + RT5670_PWR_DAC_R2_BIT, 0, NULL, 0), + + SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux), + SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux), + + /* DAC Mixer */ + SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2, + RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2, + RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2, + RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, + rt5670_sto_dac_l_mix, + ARRAY_SIZE(rt5670_sto_dac_l_mix)), + SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, + rt5670_sto_dac_r_mix, + ARRAY_SIZE(rt5670_sto_dac_r_mix)), + SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, + rt5670_mono_dac_l_mix, + ARRAY_SIZE(rt5670_mono_dac_l_mix)), + SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, + rt5670_mono_dac_r_mix, + ARRAY_SIZE(rt5670_mono_dac_r_mix)), + SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, + rt5670_dig_l_mix, + ARRAY_SIZE(rt5670_dig_l_mix)), + SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, + rt5670_dig_r_mix, + ARRAY_SIZE(rt5670_dig_r_mix)), + + /* DACs */ + SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1, + RT5670_PWR_DAC_L1_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1, + RT5670_PWR_DAC_R1_BIT, 0, NULL, 0), + SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1, + RT5670_PWR_DAC_L2_BIT, 0), + + SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1, + RT5670_PWR_DAC_R2_BIT, 0), + /* OUT Mixer */ + + SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT, + 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)), + SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT, + 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)), + /* Ouput Volume */ + SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL, + RT5670_PWR_HV_L_BIT, 0, + rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)), + SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL, + RT5670_PWR_HV_R_BIT, 0, + rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)), + SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* HPO/LOUT/Mono Mixer */ + SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, + rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)), + SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT, + 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)), + SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0, + rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1, + RT5670_PWR_HP_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1, + RT5670_PWR_HP_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, + rt5670_hp_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, + &lout_l_enable_control), + SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, + &lout_r_enable_control), + SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* PDM */ + SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2, + RT5670_PWR_PDM1_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2, + RT5670_PWR_PDM2_BIT, 0, NULL, 0), + + SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL, + RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux), + SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL, + RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux), + SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL, + RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux), + SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL, + RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux), + + /* Output Lines */ + SND_SOC_DAPM_OUTPUT("HPOL"), + SND_SOC_DAPM_OUTPUT("HPOR"), + SND_SOC_DAPM_OUTPUT("LOUTL"), + SND_SOC_DAPM_OUTPUT("LOUTR"), + SND_SOC_DAPM_OUTPUT("PDM1L"), + SND_SOC_DAPM_OUTPUT("PDM1R"), + SND_SOC_DAPM_OUTPUT("PDM2L"), + SND_SOC_DAPM_OUTPUT("PDM2R"), +}; + +static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { + { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, + { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, + { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc }, + { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc }, + { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc }, + { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc }, + { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc }, + + { "I2S1", NULL, "I2S1 ASRC" }, + { "I2S2", NULL, "I2S2 ASRC" }, + + { "DMIC1", NULL, "DMIC L1" }, + { "DMIC1", NULL, "DMIC R1" }, + { "DMIC2", NULL, "DMIC L2" }, + { "DMIC2", NULL, "DMIC R2" }, + { "DMIC3", NULL, "DMIC L3" }, + { "DMIC3", NULL, "DMIC R3" }, + + { "BST1", NULL, "IN1P" }, + { "BST1", NULL, "IN1N" }, + { "BST1", NULL, "Mic Det Power" }, + { "BST2", NULL, "IN2P" }, + { "BST2", NULL, "IN2N" }, + + { "INL VOL", NULL, "IN2P" }, + { "INR VOL", NULL, "IN2N" }, + + { "RECMIXL", "INL Switch", "INL VOL" }, + { "RECMIXL", "BST2 Switch", "BST2" }, + { "RECMIXL", "BST1 Switch", "BST1" }, + + { "RECMIXR", "INR Switch", "INR VOL" }, + { "RECMIXR", "BST2 Switch", "BST2" }, + { "RECMIXR", "BST1 Switch", "BST1" }, + + { "ADC 1", NULL, "RECMIXL" }, + { "ADC 1", NULL, "ADC 1 power" }, + { "ADC 1", NULL, "ADC clock" }, + { "ADC 2", NULL, "RECMIXR" }, + { "ADC 2", NULL, "ADC 2 power" }, + { "ADC 2", NULL, "ADC clock" }, + + { "DMIC L1", NULL, "DMIC CLK" }, + { "DMIC L1", NULL, "DMIC1 Power" }, + { "DMIC R1", NULL, "DMIC CLK" }, + { "DMIC R1", NULL, "DMIC1 Power" }, + { "DMIC L2", NULL, "DMIC CLK" }, + { "DMIC L2", NULL, "DMIC2 Power" }, + { "DMIC R2", NULL, "DMIC CLK" }, + { "DMIC R2", NULL, "DMIC2 Power" }, + { "DMIC L3", NULL, "DMIC CLK" }, + { "DMIC L3", NULL, "DMIC3 Power" }, + { "DMIC R3", NULL, "DMIC CLK" }, + { "DMIC R3", NULL, "DMIC3 Power" }, + + { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, + { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, + { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" }, + + { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, + { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, + { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" }, + + { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, + { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, + { "Mono DMIC L Mux", "DMIC3", "DMIC L3" }, + + { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, + { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, + { "Mono DMIC R Mux", "DMIC3", "DMIC R3" }, + + { "ADC 1_2", NULL, "ADC 1" }, + { "ADC 1_2", NULL, "ADC 2" }, + + { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, + { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, + { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" }, + { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, + + { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" }, + { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, + { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, + { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, + + { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, + { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, + { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, + { "Mono ADC L1 Mux", "ADC1", "ADC 1" }, + + { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, + { "Mono ADC R1 Mux", "ADC2", "ADC 2" }, + { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, + { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, + + { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, + { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, + { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, + { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, + + { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, + { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" }, + { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, + + { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, + { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" }, + { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, + + { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, + { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, + { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" }, + { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, + + { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, + { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, + { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" }, + { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, + + { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" }, + { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, + { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" }, + { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, + + { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" }, + { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, + { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" }, + { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, + + { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" }, + { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" }, + { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" }, + { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" }, + + { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" }, + { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" }, + + { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" }, + { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" }, + + { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" }, + { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" }, + { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, + + { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, + { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" }, + { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, + + { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, + { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, + { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, + { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" }, + + { "VAD_ADC", NULL, "VAD ADC Mux" }, + + { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, + { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, + { "IF_ADC2", NULL, "Mono ADC MIXL" }, + { "IF_ADC2", NULL, "Mono ADC MIXR" }, + { "IF_ADC3", NULL, "Stereo2 ADC MIXL" }, + { "IF_ADC3", NULL, "Stereo2 ADC MIXR" }, + + { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" }, + { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" }, + + { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" }, + { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" }, + + { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" }, + { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" }, + + { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" }, + { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" }, + + { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" }, + { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" }, + + { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, + { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, + { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" }, + { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" }, + { "Mono ADC MIX", NULL, "Mono ADC MIXL" }, + { "Mono ADC MIX", NULL, "Mono ADC MIXR" }, + + { "RxDP Mux", "IF2 DAC", "IF2 DAC" }, + { "RxDP Mux", "IF1 DAC", "IF1 DAC2" }, + { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" }, + { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" }, + { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" }, + { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" }, + { "RxDP Mux", "DAC1", "DAC MIX" }, + + { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" }, + { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" }, + { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" }, + { "TDM Data Mux", "Slot 6-7", "IF2 DAC" }, + + { "DSP UL Mux", "Bypass", "TDM Data Mux" }, + { "DSP UL Mux", NULL, "I2S DSP" }, + { "DSP DL Mux", "Bypass", "RxDP Mux" }, + { "DSP DL Mux", NULL, "I2S DSP" }, + + { "TxDP_ADC_L", NULL, "DSP UL Mux" }, + { "TxDP_ADC_R", NULL, "DSP UL Mux" }, + { "TxDC_DAC", NULL, "DSP DL Mux" }, + + { "TxDP_ADC", NULL, "TxDP_ADC_L" }, + { "TxDP_ADC", NULL, "TxDP_ADC_R" }, + + { "IF1 ADC", NULL, "I2S1" }, + { "IF1 ADC", NULL, "IF1_ADC1" }, + { "IF1 ADC", NULL, "IF1_ADC2" }, + { "IF1 ADC", NULL, "IF_ADC3" }, + { "IF1 ADC", NULL, "TxDP_ADC" }, + + { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, + { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, + { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" }, + { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" }, + { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" }, + { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, + + { "IF2 ADC L", NULL, "IF2 ADC Mux" }, + { "IF2 ADC R", NULL, "IF2 ADC Mux" }, + + { "IF2 ADC", NULL, "I2S2" }, + { "IF2 ADC", NULL, "IF2 ADC L" }, + { "IF2 ADC", NULL, "IF2 ADC R" }, + + { "AIF1TX", NULL, "IF1 ADC" }, + { "AIF2TX", NULL, "IF2 ADC" }, + + { "IF1 DAC1", NULL, "AIF1RX" }, + { "IF1 DAC2", NULL, "AIF1RX" }, + { "IF2 DAC", NULL, "AIF2RX" }, + + { "IF1 DAC1", NULL, "I2S1" }, + { "IF1 DAC2", NULL, "I2S1" }, + { "IF2 DAC", NULL, "I2S2" }, + + { "IF1 DAC2 L", NULL, "IF1 DAC2" }, + { "IF1 DAC2 R", NULL, "IF1 DAC2" }, + { "IF1 DAC1 L", NULL, "IF1 DAC1" }, + { "IF1 DAC1 R", NULL, "IF1 DAC1" }, + { "IF2 DAC L", NULL, "IF2 DAC" }, + { "IF2 DAC R", NULL, "IF2 DAC" }, + + { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, + { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, + + { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, + { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, + + { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, + { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, + { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" }, + { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, + { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, + { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" }, + + { "DAC MIX", NULL, "DAC1 MIXL" }, + { "DAC MIX", NULL, "DAC1 MIXR" }, + + { "Audio DSP", NULL, "DAC1 MIXL" }, + { "Audio DSP", NULL, "DAC1 MIXR" }, + + { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, + { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, + { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" }, + { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, + { "DAC L2 Volume", NULL, "DAC L2 Mux" }, + { "DAC L2 Volume", NULL, "DAC Mono Left Filter" }, + + { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, + { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, + { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" }, + { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" }, + { "DAC R2 Volume", NULL, "DAC R2 Mux" }, + { "DAC R2 Volume", NULL, "DAC Mono Right Filter" }, + + { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, + { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, + { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, + { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" }, + { "Stereo DAC MIXL", NULL, "DAC L1 Power" }, + { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, + { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, + { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, + { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" }, + { "Stereo DAC MIXR", NULL, "DAC R1 Power" }, + + { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, + { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, + { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, + { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" }, + { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, + { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, + { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, + { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" }, + + { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, + { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, + { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, + { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, + { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, + { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, + + { "DAC L1", NULL, "DAC L1 Power" }, + { "DAC L1", NULL, "Stereo DAC MIXL" }, + { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll }, + { "DAC R1", NULL, "DAC R1 Power" }, + { "DAC R1", NULL, "Stereo DAC MIXR" }, + { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll }, + { "DAC L2", NULL, "Mono DAC MIXL" }, + { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll }, + { "DAC R2", NULL, "Mono DAC MIXR" }, + { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll }, + + { "OUT MIXL", "BST1 Switch", "BST1" }, + { "OUT MIXL", "INL Switch", "INL VOL" }, + { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, + { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, + + { "OUT MIXR", "BST2 Switch", "BST2" }, + { "OUT MIXR", "INR Switch", "INR VOL" }, + { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, + { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, + + { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, + { "HPOVOL MIXL", "INL Switch", "INL VOL" }, + { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, + { "HPOVOL MIXR", "INR Switch", "INR VOL" }, + + { "DAC 2", NULL, "DAC L2" }, + { "DAC 2", NULL, "DAC R2" }, + { "DAC 1", NULL, "DAC L1" }, + { "DAC 1", NULL, "DAC R1" }, + { "HPOVOL", NULL, "HPOVOL MIXL" }, + { "HPOVOL", NULL, "HPOVOL MIXR" }, + { "HPO MIX", "DAC1 Switch", "DAC 1" }, + { "HPO MIX", "HPVOL Switch", "HPOVOL" }, + + { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, + { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, + { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, + { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, + + { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, + { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, + { "PDM1 L Mux", NULL, "PDM1 Power" }, + { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, + { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, + { "PDM1 R Mux", NULL, "PDM1 Power" }, + { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, + { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" }, + { "PDM2 L Mux", NULL, "PDM2 Power" }, + { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, + { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" }, + { "PDM2 R Mux", NULL, "PDM2 Power" }, + + { "HP Amp", NULL, "HPO MIX" }, + { "HP Amp", NULL, "Mic Det Power" }, + { "HPOL", NULL, "HP Amp" }, + { "HPOL", NULL, "HP L Amp" }, + { "HPOL", NULL, "Improve HP Amp Drv" }, + { "HPOR", NULL, "HP Amp" }, + { "HPOR", NULL, "HP R Amp" }, + { "HPOR", NULL, "Improve HP Amp Drv" }, + + { "LOUT Amp", NULL, "LOUT MIX" }, + { "LOUT L Playback", "Switch", "LOUT Amp" }, + { "LOUT R Playback", "Switch", "LOUT Amp" }, + { "LOUTL", NULL, "LOUT L Playback" }, + { "LOUTR", NULL, "LOUT R Playback" }, + { "LOUTL", NULL, "Improve HP Amp Drv" }, + { "LOUTR", NULL, "Improve HP Amp Drv" }, + + { "PDM1L", NULL, "PDM1 L Mux" }, + { "PDM1R", NULL, "PDM1 R Mux" }, + { "PDM2L", NULL, "PDM2 L Mux" }, + { "PDM2R", NULL, "PDM2 R Mux" }, +}; + +static int rt5670_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0, val_clk, mask_clk; + int pre_div, bclk_ms, frame_size; + + rt5670->lrck[dai->id] = params_rate(params); + pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]); + if (pre_div < 0) { + dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n", + rt5670->lrck[dai->id], dai->id); + return -EINVAL; + } + frame_size = snd_soc_params_to_frame_size(params); + if (frame_size < 0) { + dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); + return -EINVAL; + } + bclk_ms = frame_size > 32; + rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms); + + dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", + rt5670->bclk[dai->id], rt5670->lrck[dai->id]); + dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", + bclk_ms, pre_div, dai->id); + + switch (params_width(params)) { + case 16: + break; + case 20: + val_len |= RT5670_I2S_DL_20; + break; + case 24: + val_len |= RT5670_I2S_DL_24; + break; + case 8: + val_len |= RT5670_I2S_DL_8; + break; + default: + return -EINVAL; + } + + switch (dai->id) { + case RT5670_AIF1: + mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK; + val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT | + pre_div << RT5670_I2S_PD1_SFT; + snd_soc_update_bits(codec, RT5670_I2S1_SDP, + RT5670_I2S_DL_MASK, val_len); + snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); + break; + case RT5670_AIF2: + mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK; + val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT | + pre_div << RT5670_I2S_PD2_SFT; + snd_soc_update_bits(codec, RT5670_I2S2_SDP, + RT5670_I2S_DL_MASK, val_len); + snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); + break; + default: + dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); + return -EINVAL; + } + + return 0; +} + +static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + unsigned int reg_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + rt5670->master[dai->id] = 1; + break; + case SND_SOC_DAIFMT_CBS_CFS: + reg_val |= RT5670_I2S_MS_S; + rt5670->master[dai->id] = 0; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + reg_val |= RT5670_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + break; + case SND_SOC_DAIFMT_LEFT_J: + reg_val |= RT5670_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_DSP_A: + reg_val |= RT5670_I2S_DF_PCM_A; + break; + case SND_SOC_DAIFMT_DSP_B: + reg_val |= RT5670_I2S_DF_PCM_B; + break; + default: + return -EINVAL; + } + + switch (dai->id) { + case RT5670_AIF1: + snd_soc_update_bits(codec, RT5670_I2S1_SDP, + RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | + RT5670_I2S_DF_MASK, reg_val); + break; + case RT5670_AIF2: + snd_soc_update_bits(codec, RT5670_I2S2_SDP, + RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | + RT5670_I2S_DF_MASK, reg_val); + break; + default: + dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); + return -EINVAL; + } + return 0; +} + +static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + unsigned int reg_val = 0; + + if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src) + return 0; + + switch (clk_id) { + case RT5670_SCLK_S_MCLK: + reg_val |= RT5670_SCLK_SRC_MCLK; + break; + case RT5670_SCLK_S_PLL1: + reg_val |= RT5670_SCLK_SRC_PLL1; + break; + case RT5670_SCLK_S_RCCLK: + reg_val |= RT5670_SCLK_SRC_RCCLK; + break; + default: + dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + snd_soc_update_bits(codec, RT5670_GLB_CLK, + RT5670_SCLK_SRC_MASK, reg_val); + rt5670->sysclk = freq; + rt5670->sysclk_src = clk_id; + + dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); + + return 0; +} + +static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + struct rl6231_pll_code pll_code; + int ret; + + if (source == rt5670->pll_src && freq_in == rt5670->pll_in && + freq_out == rt5670->pll_out) + return 0; + + if (!freq_in || !freq_out) { + dev_dbg(codec->dev, "PLL disabled\n"); + + rt5670->pll_in = 0; + rt5670->pll_out = 0; + snd_soc_update_bits(codec, RT5670_GLB_CLK, + RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK); + return 0; + } + + switch (source) { + case RT5670_PLL1_S_MCLK: + snd_soc_update_bits(codec, RT5670_GLB_CLK, + RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK); + break; + case RT5670_PLL1_S_BCLK1: + case RT5670_PLL1_S_BCLK2: + case RT5670_PLL1_S_BCLK3: + case RT5670_PLL1_S_BCLK4: + switch (dai->id) { + case RT5670_AIF1: + snd_soc_update_bits(codec, RT5670_GLB_CLK, + RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1); + break; + case RT5670_AIF2: + snd_soc_update_bits(codec, RT5670_GLB_CLK, + RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2); + break; + default: + dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); + return -EINVAL; + } + break; + default: + dev_err(codec->dev, "Unknown PLL source %d\n", source); + return -EINVAL; + } + + ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); + if (ret < 0) { + dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); + return ret; + } + + dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", + pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), + pll_code.n_code, pll_code.k_code); + + snd_soc_write(codec, RT5670_PLL_CTRL1, + pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code); + snd_soc_write(codec, RT5670_PLL_CTRL2, + (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT | + pll_code.m_bp << RT5670_PLL_M_BP_SFT); + + rt5670->pll_in = freq_in; + rt5670->pll_out = freq_out; + rt5670->pll_src = source; + + return 0; +} + +static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, + unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_codec *codec = dai->codec; + unsigned int val = 0; + + if (rx_mask || tx_mask) + val |= (1 << 14); + + switch (slots) { + case 4: + val |= (1 << 12); + break; + case 6: + val |= (2 << 12); + break; + case 8: + val |= (3 << 12); + break; + case 2: + break; + default: + return -EINVAL; + } + + switch (slot_width) { + case 20: + val |= (1 << 10); + break; + case 24: + val |= (2 << 10); + break; + case 32: + val |= (3 << 10); + break; + case 16: + break; + default: + return -EINVAL; + } + + snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val); + + return 0; +} + +static int rt5670_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + switch (level) { + case SND_SOC_BIAS_PREPARE: + if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) { + snd_soc_update_bits(codec, RT5670_PWR_ANLG1, + RT5670_PWR_VREF1 | RT5670_PWR_MB | + RT5670_PWR_BG | RT5670_PWR_VREF2, + RT5670_PWR_VREF1 | RT5670_PWR_MB | + RT5670_PWR_BG | RT5670_PWR_VREF2); + mdelay(10); + snd_soc_update_bits(codec, RT5670_PWR_ANLG1, + RT5670_PWR_FV1 | RT5670_PWR_FV2, + RT5670_PWR_FV1 | RT5670_PWR_FV2); + snd_soc_update_bits(codec, RT5670_CHARGE_PUMP, + RT5670_OSW_L_MASK | RT5670_OSW_R_MASK, + RT5670_OSW_L_DIS | RT5670_OSW_R_DIS); + snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1); + snd_soc_update_bits(codec, RT5670_PWR_ANLG1, + RT5670_LDO_SEL_MASK, 0x3); + } + break; + case SND_SOC_BIAS_STANDBY: + snd_soc_write(codec, RT5670_PWR_DIG1, 0x0000); + snd_soc_write(codec, RT5670_PWR_DIG2, 0x0001); + snd_soc_write(codec, RT5670_PWR_VOL, 0x0000); + snd_soc_write(codec, RT5670_PWR_MIXER, 0x0001); + snd_soc_write(codec, RT5670_PWR_ANLG1, 0x2800); + snd_soc_write(codec, RT5670_PWR_ANLG2, 0x0004); + snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0); + snd_soc_update_bits(codec, RT5670_PWR_ANLG1, + RT5670_LDO_SEL_MASK, 0x1); + break; + + default: + break; + } + codec->dapm.bias_level = level; + + return 0; +} + +static int rt5670_probe(struct snd_soc_codec *codec) +{ + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + + rt5670->codec = codec; + + return 0; +} + +static int rt5670_remove(struct snd_soc_codec *codec) +{ + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + + regmap_write(rt5670->regmap, RT5670_RESET, 0); + return 0; +} + +#ifdef CONFIG_PM +static int rt5670_suspend(struct snd_soc_codec *codec) +{ + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt5670->regmap, true); + regcache_mark_dirty(rt5670->regmap); + return 0; +} + +static int rt5670_resume(struct snd_soc_codec *codec) +{ + struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt5670->regmap, false); + regcache_sync(rt5670->regmap); + + return 0; +} +#else +#define rt5670_suspend NULL +#define rt5670_resume NULL +#endif + +#define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000 +#define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) + +static struct snd_soc_dai_ops rt5670_aif_dai_ops = { + .hw_params = rt5670_hw_params, + .set_fmt = rt5670_set_dai_fmt, + .set_sysclk = rt5670_set_dai_sysclk, + .set_tdm_slot = rt5670_set_tdm_slot, + .set_pll = rt5670_set_dai_pll, +}; + +static struct snd_soc_dai_driver rt5670_dai[] = { + { + .name = "rt5670-aif1", + .id = RT5670_AIF1, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT5670_STEREO_RATES, + .formats = RT5670_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5670_STEREO_RATES, + .formats = RT5670_FORMATS, + }, + .ops = &rt5670_aif_dai_ops, + }, + { + .name = "rt5670-aif2", + .id = RT5670_AIF2, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT5670_STEREO_RATES, + .formats = RT5670_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5670_STEREO_RATES, + .formats = RT5670_FORMATS, + }, + .ops = &rt5670_aif_dai_ops, + }, +}; + +static struct snd_soc_codec_driver soc_codec_dev_rt5670 = { + .probe = rt5670_probe, + .remove = rt5670_remove, + .suspend = rt5670_suspend, + .resume = rt5670_resume, + .set_bias_level = rt5670_set_bias_level, + .idle_bias_off = true, + .controls = rt5670_snd_controls, + .num_controls = ARRAY_SIZE(rt5670_snd_controls), + .dapm_widgets = rt5670_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets), + .dapm_routes = rt5670_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes), +}; + +static const struct regmap_config rt5670_regmap = { + .reg_bits = 8, + .val_bits = 16, + .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) * + RT5670_PR_SPACING), + .volatile_reg = rt5670_volatile_register, + .readable_reg = rt5670_readable_register, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt5670_reg, + .num_reg_defaults = ARRAY_SIZE(rt5670_reg), + .ranges = rt5670_ranges, + .num_ranges = ARRAY_SIZE(rt5670_ranges), +}; + +static const struct i2c_device_id rt5670_i2c_id[] = { + { "rt5670", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); + +static int rt5670_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev); + struct rt5670_priv *rt5670; + int ret; + unsigned int val; + + rt5670 = devm_kzalloc(&i2c->dev, + sizeof(struct rt5670_priv), + GFP_KERNEL); + if (NULL == rt5670) + return -ENOMEM; + + i2c_set_clientdata(i2c, rt5670); + + if (pdata) + rt5670->pdata = *pdata; + + rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); + if (IS_ERR(rt5670->regmap)) { + ret = PTR_ERR(rt5670->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val); + if (val != RT5670_DEVICE_ID) { + dev_err(&i2c->dev, + "Device with ID register %x is not rt5670/72\n", val); + return -ENODEV; + } + + regmap_write(rt5670->regmap, RT5670_RESET, 0); + regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, + RT5670_PWR_HP_L | RT5670_PWR_HP_R | + RT5670_PWR_VREF2, RT5670_PWR_VREF2); + msleep(100); + + regmap_write(rt5670->regmap, RT5670_RESET, 0); + + ret = regmap_register_patch(rt5670->regmap, init_list, + ARRAY_SIZE(init_list)); + if (ret != 0) + dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); + + if (rt5670->pdata.in2_diff) + regmap_update_bits(rt5670->regmap, RT5670_IN2, + RT5670_IN_DF2, RT5670_IN_DF2); + + if (i2c->irq) { + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, + RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, + RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); + + } + + if (rt5670->pdata.jd_mode) { + regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, + RT5670_PWR_MB, RT5670_PWR_MB); + regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, + RT5670_PWR_JD1, RT5670_PWR_JD1); + regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1, + RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN); + regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3, + RT5670_JD_TRI_CBJ_SEL_MASK | + RT5670_JD_TRI_HPO_SEL_MASK, + RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1); + switch (rt5670->pdata.jd_mode) { + case 1: + regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, + RT5670_JD1_MODE_MASK, + RT5670_JD1_MODE_0); + break; + case 2: + regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, + RT5670_JD1_MODE_MASK, + RT5670_JD1_MODE_1); + break; + case 3: + regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, + RT5670_JD1_MODE_MASK, + RT5670_JD1_MODE_2); + break; + default: + break; + } + } + + if (rt5670->pdata.dmic_en) { + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, + RT5670_GP2_PIN_MASK, + RT5670_GP2_PIN_DMIC1_SCL); + + switch (rt5670->pdata.dmic1_data_pin) { + case RT5670_DMIC_DATA_IN2P: + regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, + RT5670_DMIC_1_DP_MASK, + RT5670_DMIC_1_DP_IN2P); + break; + + case RT5670_DMIC_DATA_GPIO6: + regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, + RT5670_DMIC_1_DP_MASK, + RT5670_DMIC_1_DP_GPIO6); + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, + RT5670_GP6_PIN_MASK, + RT5670_GP6_PIN_DMIC1_SDA); + break; + + case RT5670_DMIC_DATA_GPIO7: + regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, + RT5670_DMIC_1_DP_MASK, + RT5670_DMIC_1_DP_GPIO7); + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, + RT5670_GP7_PIN_MASK, + RT5670_GP7_PIN_DMIC1_SDA); + break; + + default: + break; + } + + switch (rt5670->pdata.dmic2_data_pin) { + case RT5670_DMIC_DATA_IN3N: + regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, + RT5670_DMIC_2_DP_MASK, + RT5670_DMIC_2_DP_IN3N); + break; + + case RT5670_DMIC_DATA_GPIO8: + regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, + RT5670_DMIC_2_DP_MASK, + RT5670_DMIC_2_DP_GPIO8); + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, + RT5670_GP8_PIN_MASK, + RT5670_GP8_PIN_DMIC2_SDA); + break; + + default: + break; + } + + switch (rt5670->pdata.dmic3_data_pin) { + case RT5670_DMIC_DATA_GPIO5: + regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2, + RT5670_DMIC_3_DP_MASK, + RT5670_DMIC_3_DP_GPIO5); + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, + RT5670_GP5_PIN_MASK, + RT5670_GP5_PIN_DMIC3_SDA); + break; + + case RT5670_DMIC_DATA_GPIO9: + case RT5670_DMIC_DATA_GPIO10: + dev_err(&i2c->dev, + "Always use GPIO5 as DMIC3 data pin\n"); + break; + + default: + break; + } + + } + + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670, + rt5670_dai, ARRAY_SIZE(rt5670_dai)); + if (ret < 0) + goto err; + + return 0; +err: + return ret; +} + +static int rt5670_i2c_remove(struct i2c_client *i2c) +{ + snd_soc_unregister_codec(&i2c->dev); + + return 0; +} + +static struct i2c_driver rt5670_i2c_driver = { + .driver = { + .name = "rt5670", + .owner = THIS_MODULE, + }, + .probe = rt5670_i2c_probe, + .remove = rt5670_i2c_remove, + .id_table = rt5670_i2c_id, +}; + +module_i2c_driver(rt5670_i2c_driver); + +MODULE_DESCRIPTION("ASoC RT5670 driver"); +MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/rt5670.h b/sound/soc/codecs/rt5670.h new file mode 100644 index 000000000000..a0b5c855b492 --- /dev/null +++ b/sound/soc/codecs/rt5670.h @@ -0,0 +1,2000 @@ +/* + * rt5670.h -- RT5670 ALSA SoC audio driver + * + * Copyright 2014 Realtek Microelectronics + * Author: Bard Liao <bardliao@realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __RT5670_H__ +#define __RT5670_H__ + +#include <sound/rt5670.h> + +/* Info */ +#define RT5670_RESET 0x00 +#define RT5670_VENDOR_ID 0xfd +#define RT5670_VENDOR_ID1 0xfe +#define RT5670_VENDOR_ID2 0xff +/* I/O - Output */ +#define RT5670_HP_VOL 0x02 +#define RT5670_LOUT1 0x03 +/* I/O - Input */ +#define RT5670_CJ_CTRL1 0x0a +#define RT5670_CJ_CTRL2 0x0b +#define RT5670_CJ_CTRL3 0x0c +#define RT5670_IN2 0x0e +#define RT5670_INL1_INR1_VOL 0x0f +/* I/O - ADC/DAC/DMIC */ +#define RT5670_DAC1_DIG_VOL 0x19 +#define RT5670_DAC2_DIG_VOL 0x1a +#define RT5670_DAC_CTRL 0x1b +#define RT5670_STO1_ADC_DIG_VOL 0x1c +#define RT5670_MONO_ADC_DIG_VOL 0x1d +#define RT5670_ADC_BST_VOL1 0x1e +#define RT5670_STO2_ADC_DIG_VOL 0x1f +/* Mixer - D-D */ +#define RT5670_ADC_BST_VOL2 0x20 +#define RT5670_STO2_ADC_MIXER 0x26 +#define RT5670_STO1_ADC_MIXER 0x27 +#define RT5670_MONO_ADC_MIXER 0x28 +#define RT5670_AD_DA_MIXER 0x29 +#define RT5670_STO_DAC_MIXER 0x2a +#define RT5670_DD_MIXER 0x2b +#define RT5670_DIG_MIXER 0x2c +#define RT5670_DSP_PATH1 0x2d +#define RT5670_DSP_PATH2 0x2e +#define RT5670_DIG_INF1_DATA 0x2f +#define RT5670_DIG_INF2_DATA 0x30 +/* Mixer - PDM */ +#define RT5670_PDM_OUT_CTRL 0x31 +#define RT5670_PDM_DATA_CTRL1 0x32 +#define RT5670_PDM1_DATA_CTRL2 0x33 +#define RT5670_PDM1_DATA_CTRL3 0x34 +#define RT5670_PDM1_DATA_CTRL4 0x35 +#define RT5670_PDM2_DATA_CTRL2 0x36 +#define RT5670_PDM2_DATA_CTRL3 0x37 +#define RT5670_PDM2_DATA_CTRL4 0x38 +/* Mixer - ADC */ +#define RT5670_REC_L1_MIXER 0x3b +#define RT5670_REC_L2_MIXER 0x3c +#define RT5670_REC_R1_MIXER 0x3d +#define RT5670_REC_R2_MIXER 0x3e +/* Mixer - DAC */ +#define RT5670_HPO_MIXER 0x45 +#define RT5670_MONO_MIXER 0x4c +#define RT5670_OUT_L1_MIXER 0x4f +#define RT5670_OUT_R1_MIXER 0x52 +#define RT5670_LOUT_MIXER 0x53 +/* Power */ +#define RT5670_PWR_DIG1 0x61 +#define RT5670_PWR_DIG2 0x62 +#define RT5670_PWR_ANLG1 0x63 +#define RT5670_PWR_ANLG2 0x64 +#define RT5670_PWR_MIXER 0x65 +#define RT5670_PWR_VOL 0x66 +/* Private Register Control */ +#define RT5670_PRIV_INDEX 0x6a +#define RT5670_PRIV_DATA 0x6c +/* Format - ADC/DAC */ +#define RT5670_I2S4_SDP 0x6f +#define RT5670_I2S1_SDP 0x70 +#define RT5670_I2S2_SDP 0x71 +#define RT5670_I2S3_SDP 0x72 +#define RT5670_ADDA_CLK1 0x73 +#define RT5670_ADDA_CLK2 0x74 +#define RT5670_DMIC_CTRL1 0x75 +#define RT5670_DMIC_CTRL2 0x76 +/* Format - TDM Control */ +#define RT5670_TDM_CTRL_1 0x77 +#define RT5670_TDM_CTRL_2 0x78 +#define RT5670_TDM_CTRL_3 0x79 + +/* Function - Analog */ +#define RT5670_DSP_CLK 0x7f +#define RT5670_GLB_CLK 0x80 +#define RT5670_PLL_CTRL1 0x81 +#define RT5670_PLL_CTRL2 0x82 +#define RT5670_ASRC_1 0x83 +#define RT5670_ASRC_2 0x84 +#define RT5670_ASRC_3 0x85 +#define RT5670_ASRC_4 0x86 +#define RT5670_ASRC_5 0x87 +#define RT5670_ASRC_7 0x89 +#define RT5670_ASRC_8 0x8a +#define RT5670_ASRC_9 0x8b +#define RT5670_ASRC_10 0x8c +#define RT5670_ASRC_11 0x8d +#define RT5670_DEPOP_M1 0x8e +#define RT5670_DEPOP_M2 0x8f +#define RT5670_DEPOP_M3 0x90 +#define RT5670_CHARGE_PUMP 0x91 +#define RT5670_MICBIAS 0x93 +#define RT5670_A_JD_CTRL1 0x94 +#define RT5670_A_JD_CTRL2 0x95 +#define RT5670_ASRC_12 0x97 +#define RT5670_ASRC_13 0x98 +#define RT5670_ASRC_14 0x99 +#define RT5670_VAD_CTRL1 0x9a +#define RT5670_VAD_CTRL2 0x9b +#define RT5670_VAD_CTRL3 0x9c +#define RT5670_VAD_CTRL4 0x9d +#define RT5670_VAD_CTRL5 0x9e +/* Function - Digital */ +#define RT5670_ADC_EQ_CTRL1 0xae +#define RT5670_ADC_EQ_CTRL2 0xaf +#define RT5670_EQ_CTRL1 0xb0 +#define RT5670_EQ_CTRL2 0xb1 +#define RT5670_ALC_DRC_CTRL1 0xb2 +#define RT5670_ALC_DRC_CTRL2 0xb3 +#define RT5670_ALC_CTRL_1 0xb4 +#define RT5670_ALC_CTRL_2 0xb5 +#define RT5670_ALC_CTRL_3 0xb6 +#define RT5670_ALC_CTRL_4 0xb7 +#define RT5670_JD_CTRL 0xbb +#define RT5670_IRQ_CTRL1 0xbd +#define RT5670_IRQ_CTRL2 0xbe +#define RT5670_INT_IRQ_ST 0xbf +#define RT5670_GPIO_CTRL1 0xc0 +#define RT5670_GPIO_CTRL2 0xc1 +#define RT5670_GPIO_CTRL3 0xc2 +#define RT5670_SCRABBLE_FUN 0xcd +#define RT5670_SCRABBLE_CTRL 0xce +#define RT5670_BASE_BACK 0xcf +#define RT5670_MP3_PLUS1 0xd0 +#define RT5670_MP3_PLUS2 0xd1 +#define RT5670_ADJ_HPF1 0xd3 +#define RT5670_ADJ_HPF2 0xd4 +#define RT5670_HP_CALIB_AMP_DET 0xd6 +#define RT5670_SV_ZCD1 0xd9 +#define RT5670_SV_ZCD2 0xda +#define RT5670_IL_CMD 0xdb +#define RT5670_IL_CMD2 0xdc +#define RT5670_IL_CMD3 0xdd +#define RT5670_DRC_HL_CTRL1 0xe6 +#define RT5670_DRC_HL_CTRL2 0xe7 +#define RT5670_ADC_MONO_HP_CTRL1 0xec +#define RT5670_ADC_MONO_HP_CTRL2 0xed +#define RT5670_ADC_STO2_HP_CTRL1 0xee +#define RT5670_ADC_STO2_HP_CTRL2 0xef +#define RT5670_JD_CTRL3 0xf8 +#define RT5670_JD_CTRL4 0xf9 +/* General Control */ +#define RT5670_DIG_MISC 0xfa +#define RT5670_GEN_CTRL2 0xfb +#define RT5670_GEN_CTRL3 0xfc + + +/* Index of Codec Private Register definition */ +#define RT5670_DIG_VOL 0x00 +#define RT5670_PR_ALC_CTRL_1 0x01 +#define RT5670_PR_ALC_CTRL_2 0x02 +#define RT5670_PR_ALC_CTRL_3 0x03 +#define RT5670_PR_ALC_CTRL_4 0x04 +#define RT5670_PR_ALC_CTRL_5 0x05 +#define RT5670_PR_ALC_CTRL_6 0x06 +#define RT5670_BIAS_CUR1 0x12 +#define RT5670_BIAS_CUR3 0x14 +#define RT5670_CLSD_INT_REG1 0x1c +#define RT5670_MAMP_INT_REG2 0x37 +#define RT5670_CHOP_DAC_ADC 0x3d +#define RT5670_MIXER_INT_REG 0x3f +#define RT5670_3D_SPK 0x63 +#define RT5670_WND_1 0x6c +#define RT5670_WND_2 0x6d +#define RT5670_WND_3 0x6e +#define RT5670_WND_4 0x6f +#define RT5670_WND_5 0x70 +#define RT5670_WND_8 0x73 +#define RT5670_DIP_SPK_INF 0x75 +#define RT5670_HP_DCC_INT1 0x77 +#define RT5670_EQ_BW_LOP 0xa0 +#define RT5670_EQ_GN_LOP 0xa1 +#define RT5670_EQ_FC_BP1 0xa2 +#define RT5670_EQ_BW_BP1 0xa3 +#define RT5670_EQ_GN_BP1 0xa4 +#define RT5670_EQ_FC_BP2 0xa5 +#define RT5670_EQ_BW_BP2 0xa6 +#define RT5670_EQ_GN_BP2 0xa7 +#define RT5670_EQ_FC_BP3 0xa8 +#define RT5670_EQ_BW_BP3 0xa9 +#define RT5670_EQ_GN_BP3 0xaa +#define RT5670_EQ_FC_BP4 0xab +#define RT5670_EQ_BW_BP4 0xac +#define RT5670_EQ_GN_BP4 0xad +#define RT5670_EQ_FC_HIP1 0xae +#define RT5670_EQ_GN_HIP1 0xaf +#define RT5670_EQ_FC_HIP2 0xb0 +#define RT5670_EQ_BW_HIP2 0xb1 +#define RT5670_EQ_GN_HIP2 0xb2 +#define RT5670_EQ_PRE_VOL 0xb3 +#define RT5670_EQ_PST_VOL 0xb4 + + +/* global definition */ +#define RT5670_L_MUTE (0x1 << 15) +#define RT5670_L_MUTE_SFT 15 +#define RT5670_VOL_L_MUTE (0x1 << 14) +#define RT5670_VOL_L_SFT 14 +#define RT5670_R_MUTE (0x1 << 7) +#define RT5670_R_MUTE_SFT 7 +#define RT5670_VOL_R_MUTE (0x1 << 6) +#define RT5670_VOL_R_SFT 6 +#define RT5670_L_VOL_MASK (0x3f << 8) +#define RT5670_L_VOL_SFT 8 +#define RT5670_R_VOL_MASK (0x3f) +#define RT5670_R_VOL_SFT 0 + +/* Combo Jack Control 1 (0x0a) */ +#define RT5670_CBJ_BST1_MASK (0xf << 12) +#define RT5670_CBJ_BST1_SFT (12) +#define RT5670_CBJ_JD_HP_EN (0x1 << 9) +#define RT5670_CBJ_JD_MIC_EN (0x1 << 8) +#define RT5670_CBJ_BST1_EN (0x1 << 2) + +/* Combo Jack Control 1 (0x0b) */ +#define RT5670_CBJ_MN_JD (0x1 << 12) +#define RT5670_CAPLESS_EN (0x1 << 11) +#define RT5670_CBJ_DET_MODE (0x1 << 7) + +/* IN2 Control (0x0e) */ +#define RT5670_BST_MASK1 (0xf<<12) +#define RT5670_BST_SFT1 12 +#define RT5670_BST_MASK2 (0xf<<8) +#define RT5670_BST_SFT2 8 +#define RT5670_IN_DF1 (0x1 << 7) +#define RT5670_IN_SFT1 7 +#define RT5670_IN_DF2 (0x1 << 6) +#define RT5670_IN_SFT2 6 + +/* INL and INR Volume Control (0x0f) */ +#define RT5670_INL_SEL_MASK (0x1 << 15) +#define RT5670_INL_SEL_SFT 15 +#define RT5670_INL_SEL_IN4P (0x0 << 15) +#define RT5670_INL_SEL_MONOP (0x1 << 15) +#define RT5670_INL_VOL_MASK (0x1f << 8) +#define RT5670_INL_VOL_SFT 8 +#define RT5670_INR_SEL_MASK (0x1 << 7) +#define RT5670_INR_SEL_SFT 7 +#define RT5670_INR_SEL_IN4N (0x0 << 7) +#define RT5670_INR_SEL_MONON (0x1 << 7) +#define RT5670_INR_VOL_MASK (0x1f) +#define RT5670_INR_VOL_SFT 0 + +/* Sidetone Control (0x18) */ +#define RT5670_ST_SEL_MASK (0x7 << 9) +#define RT5670_ST_SEL_SFT 9 +#define RT5670_M_ST_DACR2 (0x1 << 8) +#define RT5670_M_ST_DACR2_SFT 8 +#define RT5670_M_ST_DACL2 (0x1 << 7) +#define RT5670_M_ST_DACL2_SFT 7 +#define RT5670_ST_EN (0x1 << 6) +#define RT5670_ST_EN_SFT 6 + +/* DAC1 Digital Volume (0x19) */ +#define RT5670_DAC_L1_VOL_MASK (0xff << 8) +#define RT5670_DAC_L1_VOL_SFT 8 +#define RT5670_DAC_R1_VOL_MASK (0xff) +#define RT5670_DAC_R1_VOL_SFT 0 + +/* DAC2 Digital Volume (0x1a) */ +#define RT5670_DAC_L2_VOL_MASK (0xff << 8) +#define RT5670_DAC_L2_VOL_SFT 8 +#define RT5670_DAC_R2_VOL_MASK (0xff) +#define RT5670_DAC_R2_VOL_SFT 0 + +/* DAC2 Control (0x1b) */ +#define RT5670_M_DAC_L2_VOL (0x1 << 13) +#define RT5670_M_DAC_L2_VOL_SFT 13 +#define RT5670_M_DAC_R2_VOL (0x1 << 12) +#define RT5670_M_DAC_R2_VOL_SFT 12 +#define RT5670_DAC2_L_SEL_MASK (0x7 << 4) +#define RT5670_DAC2_L_SEL_SFT 4 +#define RT5670_DAC2_R_SEL_MASK (0x7 << 0) +#define RT5670_DAC2_R_SEL_SFT 0 + +/* ADC Digital Volume Control (0x1c) */ +#define RT5670_ADC_L_VOL_MASK (0x7f << 8) +#define RT5670_ADC_L_VOL_SFT 8 +#define RT5670_ADC_R_VOL_MASK (0x7f) +#define RT5670_ADC_R_VOL_SFT 0 + +/* Mono ADC Digital Volume Control (0x1d) */ +#define RT5670_MONO_ADC_L_VOL_MASK (0x7f << 8) +#define RT5670_MONO_ADC_L_VOL_SFT 8 +#define RT5670_MONO_ADC_R_VOL_MASK (0x7f) +#define RT5670_MONO_ADC_R_VOL_SFT 0 + +/* ADC Boost Volume Control (0x1e) */ +#define RT5670_STO1_ADC_L_BST_MASK (0x3 << 14) +#define RT5670_STO1_ADC_L_BST_SFT 14 +#define RT5670_STO1_ADC_R_BST_MASK (0x3 << 12) +#define RT5670_STO1_ADC_R_BST_SFT 12 +#define RT5670_STO1_ADC_COMP_MASK (0x3 << 10) +#define RT5670_STO1_ADC_COMP_SFT 10 +#define RT5670_STO2_ADC_L_BST_MASK (0x3 << 8) +#define RT5670_STO2_ADC_L_BST_SFT 8 +#define RT5670_STO2_ADC_R_BST_MASK (0x3 << 6) +#define RT5670_STO2_ADC_R_BST_SFT 6 +#define RT5670_STO2_ADC_COMP_MASK (0x3 << 4) +#define RT5670_STO2_ADC_COMP_SFT 4 + +/* Stereo2 ADC Mixer Control (0x26) */ +#define RT5670_STO2_ADC_SRC_MASK (0x1 << 15) +#define RT5670_STO2_ADC_SRC_SFT 15 + +/* Stereo ADC Mixer Control (0x26 0x27) */ +#define RT5670_M_ADC_L1 (0x1 << 14) +#define RT5670_M_ADC_L1_SFT 14 +#define RT5670_M_ADC_L2 (0x1 << 13) +#define RT5670_M_ADC_L2_SFT 13 +#define RT5670_ADC_1_SRC_MASK (0x1 << 12) +#define RT5670_ADC_1_SRC_SFT 12 +#define RT5670_ADC_1_SRC_ADC (0x1 << 12) +#define RT5670_ADC_1_SRC_DACMIX (0x0 << 12) +#define RT5670_ADC_2_SRC_MASK (0x1 << 11) +#define RT5670_ADC_2_SRC_SFT 11 +#define RT5670_ADC_SRC_MASK (0x1 << 10) +#define RT5670_ADC_SRC_SFT 10 +#define RT5670_DMIC_SRC_MASK (0x3 << 8) +#define RT5670_DMIC_SRC_SFT 8 +#define RT5670_M_ADC_R1 (0x1 << 6) +#define RT5670_M_ADC_R1_SFT 6 +#define RT5670_M_ADC_R2 (0x1 << 5) +#define RT5670_M_ADC_R2_SFT 5 +#define RT5670_DMIC3_SRC_MASK (0x1 << 1) +#define RT5670_DMIC3_SRC_SFT 0 + +/* Mono ADC Mixer Control (0x28) */ +#define RT5670_M_MONO_ADC_L1 (0x1 << 14) +#define RT5670_M_MONO_ADC_L1_SFT 14 +#define RT5670_M_MONO_ADC_L2 (0x1 << 13) +#define RT5670_M_MONO_ADC_L2_SFT 13 +#define RT5670_MONO_ADC_L1_SRC_MASK (0x1 << 12) +#define RT5670_MONO_ADC_L1_SRC_SFT 12 +#define RT5670_MONO_ADC_L1_SRC_DACMIXL (0x0 << 12) +#define RT5670_MONO_ADC_L1_SRC_ADCL (0x1 << 12) +#define RT5670_MONO_ADC_L2_SRC_MASK (0x1 << 11) +#define RT5670_MONO_ADC_L2_SRC_SFT 11 +#define RT5670_MONO_ADC_L_SRC_MASK (0x1 << 10) +#define RT5670_MONO_ADC_L_SRC_SFT 10 +#define RT5670_MONO_DMIC_L_SRC_MASK (0x3 << 8) +#define RT5670_MONO_DMIC_L_SRC_SFT 8 +#define RT5670_M_MONO_ADC_R1 (0x1 << 6) +#define RT5670_M_MONO_ADC_R1_SFT 6 +#define RT5670_M_MONO_ADC_R2 (0x1 << 5) +#define RT5670_M_MONO_ADC_R2_SFT 5 +#define RT5670_MONO_ADC_R1_SRC_MASK (0x1 << 4) +#define RT5670_MONO_ADC_R1_SRC_SFT 4 +#define RT5670_MONO_ADC_R1_SRC_ADCR (0x1 << 4) +#define RT5670_MONO_ADC_R1_SRC_DACMIXR (0x0 << 4) +#define RT5670_MONO_ADC_R2_SRC_MASK (0x1 << 3) +#define RT5670_MONO_ADC_R2_SRC_SFT 3 +#define RT5670_MONO_DMIC_R_SRC_MASK (0x3) +#define RT5670_MONO_DMIC_R_SRC_SFT 0 + +/* ADC Mixer to DAC Mixer Control (0x29) */ +#define RT5670_M_ADCMIX_L (0x1 << 15) +#define RT5670_M_ADCMIX_L_SFT 15 +#define RT5670_M_DAC1_L (0x1 << 14) +#define RT5670_M_DAC1_L_SFT 14 +#define RT5670_DAC1_R_SEL_MASK (0x3 << 10) +#define RT5670_DAC1_R_SEL_SFT 10 +#define RT5670_DAC1_R_SEL_IF1 (0x0 << 10) +#define RT5670_DAC1_R_SEL_IF2 (0x1 << 10) +#define RT5670_DAC1_R_SEL_IF3 (0x2 << 10) +#define RT5670_DAC1_R_SEL_IF4 (0x3 << 10) +#define RT5670_DAC1_L_SEL_MASK (0x3 << 8) +#define RT5670_DAC1_L_SEL_SFT 8 +#define RT5670_DAC1_L_SEL_IF1 (0x0 << 8) +#define RT5670_DAC1_L_SEL_IF2 (0x1 << 8) +#define RT5670_DAC1_L_SEL_IF3 (0x2 << 8) +#define RT5670_DAC1_L_SEL_IF4 (0x3 << 8) +#define RT5670_M_ADCMIX_R (0x1 << 7) +#define RT5670_M_ADCMIX_R_SFT 7 +#define RT5670_M_DAC1_R (0x1 << 6) +#define RT5670_M_DAC1_R_SFT 6 + +/* Stereo DAC Mixer Control (0x2a) */ +#define RT5670_M_DAC_L1 (0x1 << 14) +#define RT5670_M_DAC_L1_SFT 14 +#define RT5670_DAC_L1_STO_L_VOL_MASK (0x1 << 13) +#define RT5670_DAC_L1_STO_L_VOL_SFT 13 +#define RT5670_M_DAC_L2 (0x1 << 12) +#define RT5670_M_DAC_L2_SFT 12 +#define RT5670_DAC_L2_STO_L_VOL_MASK (0x1 << 11) +#define RT5670_DAC_L2_STO_L_VOL_SFT 11 +#define RT5670_M_DAC_R1_STO_L (0x1 << 9) +#define RT5670_M_DAC_R1_STO_L_SFT 9 +#define RT5670_DAC_R1_STO_L_VOL_MASK (0x1 << 8) +#define RT5670_DAC_R1_STO_L_VOL_SFT 8 +#define RT5670_M_DAC_R1 (0x1 << 6) +#define RT5670_M_DAC_R1_SFT 6 +#define RT5670_DAC_R1_STO_R_VOL_MASK (0x1 << 5) +#define RT5670_DAC_R1_STO_R_VOL_SFT 5 +#define RT5670_M_DAC_R2 (0x1 << 4) +#define RT5670_M_DAC_R2_SFT 4 +#define RT5670_DAC_R2_STO_R_VOL_MASK (0x1 << 3) +#define RT5670_DAC_R2_STO_R_VOL_SFT 3 +#define RT5670_M_DAC_L1_STO_R (0x1 << 1) +#define RT5670_M_DAC_L1_STO_R_SFT 1 +#define RT5670_DAC_L1_STO_R_VOL_MASK (0x1) +#define RT5670_DAC_L1_STO_R_VOL_SFT 0 + +/* Mono DAC Mixer Control (0x2b) */ +#define RT5670_M_DAC_L1_MONO_L (0x1 << 14) +#define RT5670_M_DAC_L1_MONO_L_SFT 14 +#define RT5670_DAC_L1_MONO_L_VOL_MASK (0x1 << 13) +#define RT5670_DAC_L1_MONO_L_VOL_SFT 13 +#define RT5670_M_DAC_L2_MONO_L (0x1 << 12) +#define RT5670_M_DAC_L2_MONO_L_SFT 12 +#define RT5670_DAC_L2_MONO_L_VOL_MASK (0x1 << 11) +#define RT5670_DAC_L2_MONO_L_VOL_SFT 11 +#define RT5670_M_DAC_R2_MONO_L (0x1 << 10) +#define RT5670_M_DAC_R2_MONO_L_SFT 10 +#define RT5670_DAC_R2_MONO_L_VOL_MASK (0x1 << 9) +#define RT5670_DAC_R2_MONO_L_VOL_SFT 9 +#define RT5670_M_DAC_R1_MONO_R (0x1 << 6) +#define RT5670_M_DAC_R1_MONO_R_SFT 6 +#define RT5670_DAC_R1_MONO_R_VOL_MASK (0x1 << 5) +#define RT5670_DAC_R1_MONO_R_VOL_SFT 5 +#define RT5670_M_DAC_R2_MONO_R (0x1 << 4) +#define RT5670_M_DAC_R2_MONO_R_SFT 4 +#define RT5670_DAC_R2_MONO_R_VOL_MASK (0x1 << 3) +#define RT5670_DAC_R2_MONO_R_VOL_SFT 3 +#define RT5670_M_DAC_L2_MONO_R (0x1 << 2) +#define RT5670_M_DAC_L2_MONO_R_SFT 2 +#define RT5670_DAC_L2_MONO_R_VOL_MASK (0x1 << 1) +#define RT5670_DAC_L2_MONO_R_VOL_SFT 1 + +/* Digital Mixer Control (0x2c) */ +#define RT5670_M_STO_L_DAC_L (0x1 << 15) +#define RT5670_M_STO_L_DAC_L_SFT 15 +#define RT5670_STO_L_DAC_L_VOL_MASK (0x1 << 14) +#define RT5670_STO_L_DAC_L_VOL_SFT 14 +#define RT5670_M_DAC_L2_DAC_L (0x1 << 13) +#define RT5670_M_DAC_L2_DAC_L_SFT 13 +#define RT5670_DAC_L2_DAC_L_VOL_MASK (0x1 << 12) +#define RT5670_DAC_L2_DAC_L_VOL_SFT 12 +#define RT5670_M_STO_R_DAC_R (0x1 << 11) +#define RT5670_M_STO_R_DAC_R_SFT 11 +#define RT5670_STO_R_DAC_R_VOL_MASK (0x1 << 10) +#define RT5670_STO_R_DAC_R_VOL_SFT 10 +#define RT5670_M_DAC_R2_DAC_R (0x1 << 9) +#define RT5670_M_DAC_R2_DAC_R_SFT 9 +#define RT5670_DAC_R2_DAC_R_VOL_MASK (0x1 << 8) +#define RT5670_DAC_R2_DAC_R_VOL_SFT 8 +#define RT5670_M_DAC_R2_DAC_L (0x1 << 7) +#define RT5670_M_DAC_R2_DAC_L_SFT 7 +#define RT5670_DAC_R2_DAC_L_VOL_MASK (0x1 << 6) +#define RT5670_DAC_R2_DAC_L_VOL_SFT 6 +#define RT5670_M_DAC_L2_DAC_R (0x1 << 5) +#define RT5670_M_DAC_L2_DAC_R_SFT 5 +#define RT5670_DAC_L2_DAC_R_VOL_MASK (0x1 << 4) +#define RT5670_DAC_L2_DAC_R_VOL_SFT 4 + +/* DSP Path Control 1 (0x2d) */ +#define RT5670_RXDP_SEL_MASK (0x7 << 13) +#define RT5670_RXDP_SEL_SFT 13 +#define RT5670_RXDP_SRC_MASK (0x3 << 11) +#define RT5670_RXDP_SRC_SFT 11 +#define RT5670_RXDP_SRC_NOR (0x0 << 11) +#define RT5670_RXDP_SRC_DIV2 (0x1 << 11) +#define RT5670_RXDP_SRC_DIV3 (0x2 << 11) +#define RT5670_TXDP_SRC_MASK (0x3 << 4) +#define RT5670_TXDP_SRC_SFT 4 +#define RT5670_TXDP_SRC_NOR (0x0 << 4) +#define RT5670_TXDP_SRC_DIV2 (0x1 << 4) +#define RT5670_TXDP_SRC_DIV3 (0x2 << 4) +#define RT5670_TXDP_SLOT_SEL_MASK (0x3 << 2) +#define RT5670_TXDP_SLOT_SEL_SFT 2 +#define RT5670_DSP_UL_SEL (0x1 << 1) +#define RT5670_DSP_UL_SFT 1 +#define RT5670_DSP_DL_SEL 0x1 +#define RT5670_DSP_DL_SFT 0 + +/* DSP Path Control 2 (0x2e) */ +#define RT5670_TXDP_L_VOL_MASK (0x7f << 8) +#define RT5670_TXDP_L_VOL_SFT 8 +#define RT5670_TXDP_R_VOL_MASK (0x7f) +#define RT5670_TXDP_R_VOL_SFT 0 + +/* Digital Interface Data Control (0x2f) */ +#define RT5670_IF1_ADC2_IN_SEL (0x1 << 15) +#define RT5670_IF1_ADC2_IN_SFT 15 +#define RT5670_IF2_ADC_IN_MASK (0x7 << 12) +#define RT5670_IF2_ADC_IN_SFT 12 +#define RT5670_IF2_DAC_SEL_MASK (0x3 << 10) +#define RT5670_IF2_DAC_SEL_SFT 10 +#define RT5670_IF2_ADC_SEL_MASK (0x3 << 8) +#define RT5670_IF2_ADC_SEL_SFT 8 + +/* Digital Interface Data Control (0x30) */ +#define RT5670_IF4_ADC_IN_MASK (0x3 << 4) +#define RT5670_IF4_ADC_IN_SFT 4 + +/* PDM Output Control (0x31) */ +#define RT5670_PDM1_L_MASK (0x1 << 15) +#define RT5670_PDM1_L_SFT 15 +#define RT5670_M_PDM1_L (0x1 << 14) +#define RT5670_M_PDM1_L_SFT 14 +#define RT5670_PDM1_R_MASK (0x1 << 13) +#define RT5670_PDM1_R_SFT 13 +#define RT5670_M_PDM1_R (0x1 << 12) +#define RT5670_M_PDM1_R_SFT 12 +#define RT5670_PDM2_L_MASK (0x1 << 11) +#define RT5670_PDM2_L_SFT 11 +#define RT5670_M_PDM2_L (0x1 << 10) +#define RT5670_M_PDM2_L_SFT 10 +#define RT5670_PDM2_R_MASK (0x1 << 9) +#define RT5670_PDM2_R_SFT 9 +#define RT5670_M_PDM2_R (0x1 << 8) +#define RT5670_M_PDM2_R_SFT 8 +#define RT5670_PDM2_BUSY (0x1 << 7) +#define RT5670_PDM1_BUSY (0x1 << 6) +#define RT5670_PDM_PATTERN (0x1 << 5) +#define RT5670_PDM_GAIN (0x1 << 4) +#define RT5670_PDM_DIV_MASK (0x3) + +/* REC Left Mixer Control 1 (0x3b) */ +#define RT5670_G_HP_L_RM_L_MASK (0x7 << 13) +#define RT5670_G_HP_L_RM_L_SFT 13 +#define RT5670_G_IN_L_RM_L_MASK (0x7 << 10) +#define RT5670_G_IN_L_RM_L_SFT 10 +#define RT5670_G_BST4_RM_L_MASK (0x7 << 7) +#define RT5670_G_BST4_RM_L_SFT 7 +#define RT5670_G_BST3_RM_L_MASK (0x7 << 4) +#define RT5670_G_BST3_RM_L_SFT 4 +#define RT5670_G_BST2_RM_L_MASK (0x7 << 1) +#define RT5670_G_BST2_RM_L_SFT 1 + +/* REC Left Mixer Control 2 (0x3c) */ +#define RT5670_G_BST1_RM_L_MASK (0x7 << 13) +#define RT5670_G_BST1_RM_L_SFT 13 +#define RT5670_M_IN_L_RM_L (0x1 << 5) +#define RT5670_M_IN_L_RM_L_SFT 5 +#define RT5670_M_BST2_RM_L (0x1 << 3) +#define RT5670_M_BST2_RM_L_SFT 3 +#define RT5670_M_BST1_RM_L (0x1 << 1) +#define RT5670_M_BST1_RM_L_SFT 1 + +/* REC Right Mixer Control 1 (0x3d) */ +#define RT5670_G_HP_R_RM_R_MASK (0x7 << 13) +#define RT5670_G_HP_R_RM_R_SFT 13 +#define RT5670_G_IN_R_RM_R_MASK (0x7 << 10) +#define RT5670_G_IN_R_RM_R_SFT 10 +#define RT5670_G_BST4_RM_R_MASK (0x7 << 7) +#define RT5670_G_BST4_RM_R_SFT 7 +#define RT5670_G_BST3_RM_R_MASK (0x7 << 4) +#define RT5670_G_BST3_RM_R_SFT 4 +#define RT5670_G_BST2_RM_R_MASK (0x7 << 1) +#define RT5670_G_BST2_RM_R_SFT 1 + +/* REC Right Mixer Control 2 (0x3e) */ +#define RT5670_G_BST1_RM_R_MASK (0x7 << 13) +#define RT5670_G_BST1_RM_R_SFT 13 +#define RT5670_M_IN_R_RM_R (0x1 << 5) +#define RT5670_M_IN_R_RM_R_SFT 5 +#define RT5670_M_BST2_RM_R (0x1 << 3) +#define RT5670_M_BST2_RM_R_SFT 3 +#define RT5670_M_BST1_RM_R (0x1 << 1) +#define RT5670_M_BST1_RM_R_SFT 1 + +/* HPMIX Control (0x45) */ +#define RT5670_M_DAC2_HM (0x1 << 15) +#define RT5670_M_DAC2_HM_SFT 15 +#define RT5670_M_HPVOL_HM (0x1 << 14) +#define RT5670_M_HPVOL_HM_SFT 14 +#define RT5670_M_DAC1_HM (0x1 << 13) +#define RT5670_M_DAC1_HM_SFT 13 +#define RT5670_G_HPOMIX_MASK (0x1 << 12) +#define RT5670_G_HPOMIX_SFT 12 +#define RT5670_M_INR1_HMR (0x1 << 3) +#define RT5670_M_INR1_HMR_SFT 3 +#define RT5670_M_DACR1_HMR (0x1 << 2) +#define RT5670_M_DACR1_HMR_SFT 2 +#define RT5670_M_INL1_HML (0x1 << 1) +#define RT5670_M_INL1_HML_SFT 1 +#define RT5670_M_DACL1_HML (0x1) +#define RT5670_M_DACL1_HML_SFT 0 + +/* Mono Output Mixer Control (0x4c) */ +#define RT5670_M_DAC_R2_MA (0x1 << 15) +#define RT5670_M_DAC_R2_MA_SFT 15 +#define RT5670_M_DAC_L2_MA (0x1 << 14) +#define RT5670_M_DAC_L2_MA_SFT 14 +#define RT5670_M_OV_R_MM (0x1 << 13) +#define RT5670_M_OV_R_MM_SFT 13 +#define RT5670_M_OV_L_MM (0x1 << 12) +#define RT5670_M_OV_L_MM_SFT 12 +#define RT5670_G_MONOMIX_MASK (0x1 << 10) +#define RT5670_G_MONOMIX_SFT 10 +#define RT5670_M_DAC_R2_MM (0x1 << 9) +#define RT5670_M_DAC_R2_MM_SFT 9 +#define RT5670_M_DAC_L2_MM (0x1 << 8) +#define RT5670_M_DAC_L2_MM_SFT 8 +#define RT5670_M_BST4_MM (0x1 << 7) +#define RT5670_M_BST4_MM_SFT 7 + +/* Output Left Mixer Control 1 (0x4d) */ +#define RT5670_G_BST3_OM_L_MASK (0x7 << 13) +#define RT5670_G_BST3_OM_L_SFT 13 +#define RT5670_G_BST2_OM_L_MASK (0x7 << 10) +#define RT5670_G_BST2_OM_L_SFT 10 +#define RT5670_G_BST1_OM_L_MASK (0x7 << 7) +#define RT5670_G_BST1_OM_L_SFT 7 +#define RT5670_G_IN_L_OM_L_MASK (0x7 << 4) +#define RT5670_G_IN_L_OM_L_SFT 4 +#define RT5670_G_RM_L_OM_L_MASK (0x7 << 1) +#define RT5670_G_RM_L_OM_L_SFT 1 + +/* Output Left Mixer Control 2 (0x4e) */ +#define RT5670_G_DAC_R2_OM_L_MASK (0x7 << 13) +#define RT5670_G_DAC_R2_OM_L_SFT 13 +#define RT5670_G_DAC_L2_OM_L_MASK (0x7 << 10) +#define RT5670_G_DAC_L2_OM_L_SFT 10 +#define RT5670_G_DAC_L1_OM_L_MASK (0x7 << 7) +#define RT5670_G_DAC_L1_OM_L_SFT 7 + +/* Output Left Mixer Control 3 (0x4f) */ +#define RT5670_M_BST1_OM_L (0x1 << 5) +#define RT5670_M_BST1_OM_L_SFT 5 +#define RT5670_M_IN_L_OM_L (0x1 << 4) +#define RT5670_M_IN_L_OM_L_SFT 4 +#define RT5670_M_DAC_L2_OM_L (0x1 << 1) +#define RT5670_M_DAC_L2_OM_L_SFT 1 +#define RT5670_M_DAC_L1_OM_L (0x1) +#define RT5670_M_DAC_L1_OM_L_SFT 0 + +/* Output Right Mixer Control 1 (0x50) */ +#define RT5670_G_BST4_OM_R_MASK (0x7 << 13) +#define RT5670_G_BST4_OM_R_SFT 13 +#define RT5670_G_BST2_OM_R_MASK (0x7 << 10) +#define RT5670_G_BST2_OM_R_SFT 10 +#define RT5670_G_BST1_OM_R_MASK (0x7 << 7) +#define RT5670_G_BST1_OM_R_SFT 7 +#define RT5670_G_IN_R_OM_R_MASK (0x7 << 4) +#define RT5670_G_IN_R_OM_R_SFT 4 +#define RT5670_G_RM_R_OM_R_MASK (0x7 << 1) +#define RT5670_G_RM_R_OM_R_SFT 1 + +/* Output Right Mixer Control 2 (0x51) */ +#define RT5670_G_DAC_L2_OM_R_MASK (0x7 << 13) +#define RT5670_G_DAC_L2_OM_R_SFT 13 +#define RT5670_G_DAC_R2_OM_R_MASK (0x7 << 10) +#define RT5670_G_DAC_R2_OM_R_SFT 10 +#define RT5670_G_DAC_R1_OM_R_MASK (0x7 << 7) +#define RT5670_G_DAC_R1_OM_R_SFT 7 + +/* Output Right Mixer Control 3 (0x52) */ +#define RT5670_M_BST2_OM_R (0x1 << 6) +#define RT5670_M_BST2_OM_R_SFT 6 +#define RT5670_M_IN_R_OM_R (0x1 << 4) +#define RT5670_M_IN_R_OM_R_SFT 4 +#define RT5670_M_DAC_R2_OM_R (0x1 << 1) +#define RT5670_M_DAC_R2_OM_R_SFT 1 +#define RT5670_M_DAC_R1_OM_R (0x1) +#define RT5670_M_DAC_R1_OM_R_SFT 0 + +/* LOUT Mixer Control (0x53) */ +#define RT5670_M_DAC_L1_LM (0x1 << 15) +#define RT5670_M_DAC_L1_LM_SFT 15 +#define RT5670_M_DAC_R1_LM (0x1 << 14) +#define RT5670_M_DAC_R1_LM_SFT 14 +#define RT5670_M_OV_L_LM (0x1 << 13) +#define RT5670_M_OV_L_LM_SFT 13 +#define RT5670_M_OV_R_LM (0x1 << 12) +#define RT5670_M_OV_R_LM_SFT 12 +#define RT5670_G_LOUTMIX_MASK (0x1 << 11) +#define RT5670_G_LOUTMIX_SFT 11 + +/* Power Management for Digital 1 (0x61) */ +#define RT5670_PWR_I2S1 (0x1 << 15) +#define RT5670_PWR_I2S1_BIT 15 +#define RT5670_PWR_I2S2 (0x1 << 14) +#define RT5670_PWR_I2S2_BIT 14 +#define RT5670_PWR_DAC_L1 (0x1 << 12) +#define RT5670_PWR_DAC_L1_BIT 12 +#define RT5670_PWR_DAC_R1 (0x1 << 11) +#define RT5670_PWR_DAC_R1_BIT 11 +#define RT5670_PWR_DAC_L2 (0x1 << 7) +#define RT5670_PWR_DAC_L2_BIT 7 +#define RT5670_PWR_DAC_R2 (0x1 << 6) +#define RT5670_PWR_DAC_R2_BIT 6 +#define RT5670_PWR_ADC_L (0x1 << 2) +#define RT5670_PWR_ADC_L_BIT 2 +#define RT5670_PWR_ADC_R (0x1 << 1) +#define RT5670_PWR_ADC_R_BIT 1 +#define RT5670_PWR_CLS_D (0x1) +#define RT5670_PWR_CLS_D_BIT 0 + +/* Power Management for Digital 2 (0x62) */ +#define RT5670_PWR_ADC_S1F (0x1 << 15) +#define RT5670_PWR_ADC_S1F_BIT 15 +#define RT5670_PWR_ADC_MF_L (0x1 << 14) +#define RT5670_PWR_ADC_MF_L_BIT 14 +#define RT5670_PWR_ADC_MF_R (0x1 << 13) +#define RT5670_PWR_ADC_MF_R_BIT 13 +#define RT5670_PWR_I2S_DSP (0x1 << 12) +#define RT5670_PWR_I2S_DSP_BIT 12 +#define RT5670_PWR_DAC_S1F (0x1 << 11) +#define RT5670_PWR_DAC_S1F_BIT 11 +#define RT5670_PWR_DAC_MF_L (0x1 << 10) +#define RT5670_PWR_DAC_MF_L_BIT 10 +#define RT5670_PWR_DAC_MF_R (0x1 << 9) +#define RT5670_PWR_DAC_MF_R_BIT 9 +#define RT5670_PWR_ADC_S2F (0x1 << 8) +#define RT5670_PWR_ADC_S2F_BIT 8 +#define RT5670_PWR_PDM1 (0x1 << 7) +#define RT5670_PWR_PDM1_BIT 7 +#define RT5670_PWR_PDM2 (0x1 << 6) +#define RT5670_PWR_PDM2_BIT 6 + +/* Power Management for Analog 1 (0x63) */ +#define RT5670_PWR_VREF1 (0x1 << 15) +#define RT5670_PWR_VREF1_BIT 15 +#define RT5670_PWR_FV1 (0x1 << 14) +#define RT5670_PWR_FV1_BIT 14 +#define RT5670_PWR_MB (0x1 << 13) +#define RT5670_PWR_MB_BIT 13 +#define RT5670_PWR_LM (0x1 << 12) +#define RT5670_PWR_LM_BIT 12 +#define RT5670_PWR_BG (0x1 << 11) +#define RT5670_PWR_BG_BIT 11 +#define RT5670_PWR_HP_L (0x1 << 7) +#define RT5670_PWR_HP_L_BIT 7 +#define RT5670_PWR_HP_R (0x1 << 6) +#define RT5670_PWR_HP_R_BIT 6 +#define RT5670_PWR_HA (0x1 << 5) +#define RT5670_PWR_HA_BIT 5 +#define RT5670_PWR_VREF2 (0x1 << 4) +#define RT5670_PWR_VREF2_BIT 4 +#define RT5670_PWR_FV2 (0x1 << 3) +#define RT5670_PWR_FV2_BIT 3 +#define RT5670_LDO_SEL_MASK (0x3) +#define RT5670_LDO_SEL_SFT 0 + +/* Power Management for Analog 2 (0x64) */ +#define RT5670_PWR_BST1 (0x1 << 15) +#define RT5670_PWR_BST1_BIT 15 +#define RT5670_PWR_BST2 (0x1 << 13) +#define RT5670_PWR_BST2_BIT 13 +#define RT5670_PWR_MB1 (0x1 << 11) +#define RT5670_PWR_MB1_BIT 11 +#define RT5670_PWR_MB2 (0x1 << 10) +#define RT5670_PWR_MB2_BIT 10 +#define RT5670_PWR_PLL (0x1 << 9) +#define RT5670_PWR_PLL_BIT 9 +#define RT5670_PWR_BST1_P (0x1 << 6) +#define RT5670_PWR_BST1_P_BIT 6 +#define RT5670_PWR_BST2_P (0x1 << 4) +#define RT5670_PWR_BST2_P_BIT 4 +#define RT5670_PWR_JD1 (0x1 << 2) +#define RT5670_PWR_JD1_BIT 2 +#define RT5670_PWR_JD (0x1 << 1) +#define RT5670_PWR_JD_BIT 1 + +/* Power Management for Mixer (0x65) */ +#define RT5670_PWR_OM_L (0x1 << 15) +#define RT5670_PWR_OM_L_BIT 15 +#define RT5670_PWR_OM_R (0x1 << 14) +#define RT5670_PWR_OM_R_BIT 14 +#define RT5670_PWR_RM_L (0x1 << 11) +#define RT5670_PWR_RM_L_BIT 11 +#define RT5670_PWR_RM_R (0x1 << 10) +#define RT5670_PWR_RM_R_BIT 10 + +/* Power Management for Volume (0x66) */ +#define RT5670_PWR_HV_L (0x1 << 11) +#define RT5670_PWR_HV_L_BIT 11 +#define RT5670_PWR_HV_R (0x1 << 10) +#define RT5670_PWR_HV_R_BIT 10 +#define RT5670_PWR_IN_L (0x1 << 9) +#define RT5670_PWR_IN_L_BIT 9 +#define RT5670_PWR_IN_R (0x1 << 8) +#define RT5670_PWR_IN_R_BIT 8 +#define RT5670_PWR_MIC_DET (0x1 << 5) +#define RT5670_PWR_MIC_DET_BIT 5 + +/* I2S1/2/3 Audio Serial Data Port Control (0x70 0x71 0x72) */ +#define RT5670_I2S_MS_MASK (0x1 << 15) +#define RT5670_I2S_MS_SFT 15 +#define RT5670_I2S_MS_M (0x0 << 15) +#define RT5670_I2S_MS_S (0x1 << 15) +#define RT5670_I2S_IF_MASK (0x7 << 12) +#define RT5670_I2S_IF_SFT 12 +#define RT5670_I2S_O_CP_MASK (0x3 << 10) +#define RT5670_I2S_O_CP_SFT 10 +#define RT5670_I2S_O_CP_OFF (0x0 << 10) +#define RT5670_I2S_O_CP_U_LAW (0x1 << 10) +#define RT5670_I2S_O_CP_A_LAW (0x2 << 10) +#define RT5670_I2S_I_CP_MASK (0x3 << 8) +#define RT5670_I2S_I_CP_SFT 8 +#define RT5670_I2S_I_CP_OFF (0x0 << 8) +#define RT5670_I2S_I_CP_U_LAW (0x1 << 8) +#define RT5670_I2S_I_CP_A_LAW (0x2 << 8) +#define RT5670_I2S_BP_MASK (0x1 << 7) +#define RT5670_I2S_BP_SFT 7 +#define RT5670_I2S_BP_NOR (0x0 << 7) +#define RT5670_I2S_BP_INV (0x1 << 7) +#define RT5670_I2S_DL_MASK (0x3 << 2) +#define RT5670_I2S_DL_SFT 2 +#define RT5670_I2S_DL_16 (0x0 << 2) +#define RT5670_I2S_DL_20 (0x1 << 2) +#define RT5670_I2S_DL_24 (0x2 << 2) +#define RT5670_I2S_DL_8 (0x3 << 2) +#define RT5670_I2S_DF_MASK (0x3) +#define RT5670_I2S_DF_SFT 0 +#define RT5670_I2S_DF_I2S (0x0) +#define RT5670_I2S_DF_LEFT (0x1) +#define RT5670_I2S_DF_PCM_A (0x2) +#define RT5670_I2S_DF_PCM_B (0x3) + +/* I2S2 Audio Serial Data Port Control (0x71) */ +#define RT5670_I2S2_SDI_MASK (0x1 << 6) +#define RT5670_I2S2_SDI_SFT 6 +#define RT5670_I2S2_SDI_I2S1 (0x0 << 6) +#define RT5670_I2S2_SDI_I2S2 (0x1 << 6) + +/* ADC/DAC Clock Control 1 (0x73) */ +#define RT5670_I2S_BCLK_MS1_MASK (0x1 << 15) +#define RT5670_I2S_BCLK_MS1_SFT 15 +#define RT5670_I2S_BCLK_MS1_32 (0x0 << 15) +#define RT5670_I2S_BCLK_MS1_64 (0x1 << 15) +#define RT5670_I2S_PD1_MASK (0x7 << 12) +#define RT5670_I2S_PD1_SFT 12 +#define RT5670_I2S_PD1_1 (0x0 << 12) +#define RT5670_I2S_PD1_2 (0x1 << 12) +#define RT5670_I2S_PD1_3 (0x2 << 12) +#define RT5670_I2S_PD1_4 (0x3 << 12) +#define RT5670_I2S_PD1_6 (0x4 << 12) +#define RT5670_I2S_PD1_8 (0x5 << 12) +#define RT5670_I2S_PD1_12 (0x6 << 12) +#define RT5670_I2S_PD1_16 (0x7 << 12) +#define RT5670_I2S_BCLK_MS2_MASK (0x1 << 11) +#define RT5670_I2S_BCLK_MS2_SFT 11 +#define RT5670_I2S_BCLK_MS2_32 (0x0 << 11) +#define RT5670_I2S_BCLK_MS2_64 (0x1 << 11) +#define RT5670_I2S_PD2_MASK (0x7 << 8) +#define RT5670_I2S_PD2_SFT 8 +#define RT5670_I2S_PD2_1 (0x0 << 8) +#define RT5670_I2S_PD2_2 (0x1 << 8) +#define RT5670_I2S_PD2_3 (0x2 << 8) +#define RT5670_I2S_PD2_4 (0x3 << 8) +#define RT5670_I2S_PD2_6 (0x4 << 8) +#define RT5670_I2S_PD2_8 (0x5 << 8) +#define RT5670_I2S_PD2_12 (0x6 << 8) +#define RT5670_I2S_PD2_16 (0x7 << 8) +#define RT5670_I2S_BCLK_MS3_MASK (0x1 << 7) +#define RT5670_I2S_BCLK_MS3_SFT 7 +#define RT5670_I2S_BCLK_MS3_32 (0x0 << 7) +#define RT5670_I2S_BCLK_MS3_64 (0x1 << 7) +#define RT5670_I2S_PD3_MASK (0x7 << 4) +#define RT5670_I2S_PD3_SFT 4 +#define RT5670_I2S_PD3_1 (0x0 << 4) +#define RT5670_I2S_PD3_2 (0x1 << 4) +#define RT5670_I2S_PD3_3 (0x2 << 4) +#define RT5670_I2S_PD3_4 (0x3 << 4) +#define RT5670_I2S_PD3_6 (0x4 << 4) +#define RT5670_I2S_PD3_8 (0x5 << 4) +#define RT5670_I2S_PD3_12 (0x6 << 4) +#define RT5670_I2S_PD3_16 (0x7 << 4) +#define RT5670_DAC_OSR_MASK (0x3 << 2) +#define RT5670_DAC_OSR_SFT 2 +#define RT5670_DAC_OSR_128 (0x0 << 2) +#define RT5670_DAC_OSR_64 (0x1 << 2) +#define RT5670_DAC_OSR_32 (0x2 << 2) +#define RT5670_DAC_OSR_16 (0x3 << 2) +#define RT5670_ADC_OSR_MASK (0x3) +#define RT5670_ADC_OSR_SFT 0 +#define RT5670_ADC_OSR_128 (0x0) +#define RT5670_ADC_OSR_64 (0x1) +#define RT5670_ADC_OSR_32 (0x2) +#define RT5670_ADC_OSR_16 (0x3) + +/* ADC/DAC Clock Control 2 (0x74) */ +#define RT5670_DAC_L_OSR_MASK (0x3 << 14) +#define RT5670_DAC_L_OSR_SFT 14 +#define RT5670_DAC_L_OSR_128 (0x0 << 14) +#define RT5670_DAC_L_OSR_64 (0x1 << 14) +#define RT5670_DAC_L_OSR_32 (0x2 << 14) +#define RT5670_DAC_L_OSR_16 (0x3 << 14) +#define RT5670_ADC_R_OSR_MASK (0x3 << 12) +#define RT5670_ADC_R_OSR_SFT 12 +#define RT5670_ADC_R_OSR_128 (0x0 << 12) +#define RT5670_ADC_R_OSR_64 (0x1 << 12) +#define RT5670_ADC_R_OSR_32 (0x2 << 12) +#define RT5670_ADC_R_OSR_16 (0x3 << 12) +#define RT5670_DAHPF_EN (0x1 << 11) +#define RT5670_DAHPF_EN_SFT 11 +#define RT5670_ADHPF_EN (0x1 << 10) +#define RT5670_ADHPF_EN_SFT 10 + +/* Digital Microphone Control (0x75) */ +#define RT5670_DMIC_1_EN_MASK (0x1 << 15) +#define RT5670_DMIC_1_EN_SFT 15 +#define RT5670_DMIC_1_DIS (0x0 << 15) +#define RT5670_DMIC_1_EN (0x1 << 15) +#define RT5670_DMIC_2_EN_MASK (0x1 << 14) +#define RT5670_DMIC_2_EN_SFT 14 +#define RT5670_DMIC_2_DIS (0x0 << 14) +#define RT5670_DMIC_2_EN (0x1 << 14) +#define RT5670_DMIC_1L_LH_MASK (0x1 << 13) +#define RT5670_DMIC_1L_LH_SFT 13 +#define RT5670_DMIC_1L_LH_FALLING (0x0 << 13) +#define RT5670_DMIC_1L_LH_RISING (0x1 << 13) +#define RT5670_DMIC_1R_LH_MASK (0x1 << 12) +#define RT5670_DMIC_1R_LH_SFT 12 +#define RT5670_DMIC_1R_LH_FALLING (0x0 << 12) +#define RT5670_DMIC_1R_LH_RISING (0x1 << 12) +#define RT5670_DMIC_2_DP_MASK (0x1 << 10) +#define RT5670_DMIC_2_DP_SFT 10 +#define RT5670_DMIC_2_DP_GPIO8 (0x0 << 10) +#define RT5670_DMIC_2_DP_IN3N (0x1 << 10) +#define RT5670_DMIC_2L_LH_MASK (0x1 << 9) +#define RT5670_DMIC_2L_LH_SFT 9 +#define RT5670_DMIC_2L_LH_FALLING (0x0 << 9) +#define RT5670_DMIC_2L_LH_RISING (0x1 << 9) +#define RT5670_DMIC_2R_LH_MASK (0x1 << 8) +#define RT5670_DMIC_2R_LH_SFT 8 +#define RT5670_DMIC_2R_LH_FALLING (0x0 << 8) +#define RT5670_DMIC_2R_LH_RISING (0x1 << 8) +#define RT5670_DMIC_CLK_MASK (0x7 << 5) +#define RT5670_DMIC_CLK_SFT 5 +#define RT5670_DMIC_3_EN_MASK (0x1 << 4) +#define RT5670_DMIC_3_EN_SFT 4 +#define RT5670_DMIC_3_DIS (0x0 << 4) +#define RT5670_DMIC_3_EN (0x1 << 4) +#define RT5670_DMIC_1_DP_MASK (0x3 << 0) +#define RT5670_DMIC_1_DP_SFT 0 +#define RT5670_DMIC_1_DP_GPIO6 (0x0 << 0) +#define RT5670_DMIC_1_DP_IN2P (0x1 << 0) +#define RT5670_DMIC_1_DP_GPIO7 (0x2 << 0) + +/* Digital Microphone Control2 (0x76) */ +#define RT5670_DMIC_3_DP_MASK (0x3 << 6) +#define RT5670_DMIC_3_DP_SFT 6 +#define RT5670_DMIC_3_DP_GPIO9 (0x0 << 6) +#define RT5670_DMIC_3_DP_GPIO10 (0x1 << 6) +#define RT5670_DMIC_3_DP_GPIO5 (0x2 << 6) + +/* Global Clock Control (0x80) */ +#define RT5670_SCLK_SRC_MASK (0x3 << 14) +#define RT5670_SCLK_SRC_SFT 14 +#define RT5670_SCLK_SRC_MCLK (0x0 << 14) +#define RT5670_SCLK_SRC_PLL1 (0x1 << 14) +#define RT5670_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */ +#define RT5670_PLL1_SRC_MASK (0x3 << 12) +#define RT5670_PLL1_SRC_SFT 12 +#define RT5670_PLL1_SRC_MCLK (0x0 << 12) +#define RT5670_PLL1_SRC_BCLK1 (0x1 << 12) +#define RT5670_PLL1_SRC_BCLK2 (0x2 << 12) +#define RT5670_PLL1_SRC_BCLK3 (0x3 << 12) +#define RT5670_PLL1_PD_MASK (0x1 << 3) +#define RT5670_PLL1_PD_SFT 3 +#define RT5670_PLL1_PD_1 (0x0 << 3) +#define RT5670_PLL1_PD_2 (0x1 << 3) + +#define RT5670_PLL_INP_MAX 40000000 +#define RT5670_PLL_INP_MIN 256000 +/* PLL M/N/K Code Control 1 (0x81) */ +#define RT5670_PLL_N_MAX 0x1ff +#define RT5670_PLL_N_MASK (RT5670_PLL_N_MAX << 7) +#define RT5670_PLL_N_SFT 7 +#define RT5670_PLL_K_MAX 0x1f +#define RT5670_PLL_K_MASK (RT5670_PLL_K_MAX) +#define RT5670_PLL_K_SFT 0 + +/* PLL M/N/K Code Control 2 (0x82) */ +#define RT5670_PLL_M_MAX 0xf +#define RT5670_PLL_M_MASK (RT5670_PLL_M_MAX << 12) +#define RT5670_PLL_M_SFT 12 +#define RT5670_PLL_M_BP (0x1 << 11) +#define RT5670_PLL_M_BP_SFT 11 + +/* ASRC Control 1 (0x83) */ +#define RT5670_STO_T_MASK (0x1 << 15) +#define RT5670_STO_T_SFT 15 +#define RT5670_STO_T_SCLK (0x0 << 15) +#define RT5670_STO_T_LRCK1 (0x1 << 15) +#define RT5670_M1_T_MASK (0x1 << 14) +#define RT5670_M1_T_SFT 14 +#define RT5670_M1_T_I2S2 (0x0 << 14) +#define RT5670_M1_T_I2S2_D3 (0x1 << 14) +#define RT5670_I2S2_F_MASK (0x1 << 12) +#define RT5670_I2S2_F_SFT 12 +#define RT5670_I2S2_F_I2S2_D2 (0x0 << 12) +#define RT5670_I2S2_F_I2S1_TCLK (0x1 << 12) +#define RT5670_DMIC_1_M_MASK (0x1 << 9) +#define RT5670_DMIC_1_M_SFT 9 +#define RT5670_DMIC_1_M_NOR (0x0 << 9) +#define RT5670_DMIC_1_M_ASYN (0x1 << 9) +#define RT5670_DMIC_2_M_MASK (0x1 << 8) +#define RT5670_DMIC_2_M_SFT 8 +#define RT5670_DMIC_2_M_NOR (0x0 << 8) +#define RT5670_DMIC_2_M_ASYN (0x1 << 8) + +/* ASRC Control 2 (0x84) */ +#define RT5670_MDA_L_M_MASK (0x1 << 15) +#define RT5670_MDA_L_M_SFT 15 +#define RT5670_MDA_L_M_NOR (0x0 << 15) +#define RT5670_MDA_L_M_ASYN (0x1 << 15) +#define RT5670_MDA_R_M_MASK (0x1 << 14) +#define RT5670_MDA_R_M_SFT 14 +#define RT5670_MDA_R_M_NOR (0x0 << 14) +#define RT5670_MDA_R_M_ASYN (0x1 << 14) +#define RT5670_MAD_L_M_MASK (0x1 << 13) +#define RT5670_MAD_L_M_SFT 13 +#define RT5670_MAD_L_M_NOR (0x0 << 13) +#define RT5670_MAD_L_M_ASYN (0x1 << 13) +#define RT5670_MAD_R_M_MASK (0x1 << 12) +#define RT5670_MAD_R_M_SFT 12 +#define RT5670_MAD_R_M_NOR (0x0 << 12) +#define RT5670_MAD_R_M_ASYN (0x1 << 12) +#define RT5670_ADC_M_MASK (0x1 << 11) +#define RT5670_ADC_M_SFT 11 +#define RT5670_ADC_M_NOR (0x0 << 11) +#define RT5670_ADC_M_ASYN (0x1 << 11) +#define RT5670_STO_DAC_M_MASK (0x1 << 5) +#define RT5670_STO_DAC_M_SFT 5 +#define RT5670_STO_DAC_M_NOR (0x0 << 5) +#define RT5670_STO_DAC_M_ASYN (0x1 << 5) +#define RT5670_I2S1_R_D_MASK (0x1 << 4) +#define RT5670_I2S1_R_D_SFT 4 +#define RT5670_I2S1_R_D_DIS (0x0 << 4) +#define RT5670_I2S1_R_D_EN (0x1 << 4) +#define RT5670_I2S2_R_D_MASK (0x1 << 3) +#define RT5670_I2S2_R_D_SFT 3 +#define RT5670_I2S2_R_D_DIS (0x0 << 3) +#define RT5670_I2S2_R_D_EN (0x1 << 3) +#define RT5670_PRE_SCLK_MASK (0x3) +#define RT5670_PRE_SCLK_SFT 0 +#define RT5670_PRE_SCLK_512 (0x0) +#define RT5670_PRE_SCLK_1024 (0x1) +#define RT5670_PRE_SCLK_2048 (0x2) + +/* ASRC Control 3 (0x85) */ +#define RT5670_I2S1_RATE_MASK (0xf << 12) +#define RT5670_I2S1_RATE_SFT 12 +#define RT5670_I2S2_RATE_MASK (0xf << 8) +#define RT5670_I2S2_RATE_SFT 8 + +/* ASRC Control 4 (0x89) */ +#define RT5670_I2S1_PD_MASK (0x7 << 12) +#define RT5670_I2S1_PD_SFT 12 +#define RT5670_I2S2_PD_MASK (0x7 << 8) +#define RT5670_I2S2_PD_SFT 8 + +/* HPOUT Over Current Detection (0x8b) */ +#define RT5670_HP_OVCD_MASK (0x1 << 10) +#define RT5670_HP_OVCD_SFT 10 +#define RT5670_HP_OVCD_DIS (0x0 << 10) +#define RT5670_HP_OVCD_EN (0x1 << 10) +#define RT5670_HP_OC_TH_MASK (0x3 << 8) +#define RT5670_HP_OC_TH_SFT 8 +#define RT5670_HP_OC_TH_90 (0x0 << 8) +#define RT5670_HP_OC_TH_105 (0x1 << 8) +#define RT5670_HP_OC_TH_120 (0x2 << 8) +#define RT5670_HP_OC_TH_135 (0x3 << 8) + +/* Class D Over Current Control (0x8c) */ +#define RT5670_CLSD_OC_MASK (0x1 << 9) +#define RT5670_CLSD_OC_SFT 9 +#define RT5670_CLSD_OC_PU (0x0 << 9) +#define RT5670_CLSD_OC_PD (0x1 << 9) +#define RT5670_AUTO_PD_MASK (0x1 << 8) +#define RT5670_AUTO_PD_SFT 8 +#define RT5670_AUTO_PD_DIS (0x0 << 8) +#define RT5670_AUTO_PD_EN (0x1 << 8) +#define RT5670_CLSD_OC_TH_MASK (0x3f) +#define RT5670_CLSD_OC_TH_SFT 0 + +/* Class D Output Control (0x8d) */ +#define RT5670_CLSD_RATIO_MASK (0xf << 12) +#define RT5670_CLSD_RATIO_SFT 12 +#define RT5670_CLSD_OM_MASK (0x1 << 11) +#define RT5670_CLSD_OM_SFT 11 +#define RT5670_CLSD_OM_MONO (0x0 << 11) +#define RT5670_CLSD_OM_STO (0x1 << 11) +#define RT5670_CLSD_SCH_MASK (0x1 << 10) +#define RT5670_CLSD_SCH_SFT 10 +#define RT5670_CLSD_SCH_L (0x0 << 10) +#define RT5670_CLSD_SCH_S (0x1 << 10) + +/* Depop Mode Control 1 (0x8e) */ +#define RT5670_SMT_TRIG_MASK (0x1 << 15) +#define RT5670_SMT_TRIG_SFT 15 +#define RT5670_SMT_TRIG_DIS (0x0 << 15) +#define RT5670_SMT_TRIG_EN (0x1 << 15) +#define RT5670_HP_L_SMT_MASK (0x1 << 9) +#define RT5670_HP_L_SMT_SFT 9 +#define RT5670_HP_L_SMT_DIS (0x0 << 9) +#define RT5670_HP_L_SMT_EN (0x1 << 9) +#define RT5670_HP_R_SMT_MASK (0x1 << 8) +#define RT5670_HP_R_SMT_SFT 8 +#define RT5670_HP_R_SMT_DIS (0x0 << 8) +#define RT5670_HP_R_SMT_EN (0x1 << 8) +#define RT5670_HP_CD_PD_MASK (0x1 << 7) +#define RT5670_HP_CD_PD_SFT 7 +#define RT5670_HP_CD_PD_DIS (0x0 << 7) +#define RT5670_HP_CD_PD_EN (0x1 << 7) +#define RT5670_RSTN_MASK (0x1 << 6) +#define RT5670_RSTN_SFT 6 +#define RT5670_RSTN_DIS (0x0 << 6) +#define RT5670_RSTN_EN (0x1 << 6) +#define RT5670_RSTP_MASK (0x1 << 5) +#define RT5670_RSTP_SFT 5 +#define RT5670_RSTP_DIS (0x0 << 5) +#define RT5670_RSTP_EN (0x1 << 5) +#define RT5670_HP_CO_MASK (0x1 << 4) +#define RT5670_HP_CO_SFT 4 +#define RT5670_HP_CO_DIS (0x0 << 4) +#define RT5670_HP_CO_EN (0x1 << 4) +#define RT5670_HP_CP_MASK (0x1 << 3) +#define RT5670_HP_CP_SFT 3 +#define RT5670_HP_CP_PD (0x0 << 3) +#define RT5670_HP_CP_PU (0x1 << 3) +#define RT5670_HP_SG_MASK (0x1 << 2) +#define RT5670_HP_SG_SFT 2 +#define RT5670_HP_SG_DIS (0x0 << 2) +#define RT5670_HP_SG_EN (0x1 << 2) +#define RT5670_HP_DP_MASK (0x1 << 1) +#define RT5670_HP_DP_SFT 1 +#define RT5670_HP_DP_PD (0x0 << 1) +#define RT5670_HP_DP_PU (0x1 << 1) +#define RT5670_HP_CB_MASK (0x1) +#define RT5670_HP_CB_SFT 0 +#define RT5670_HP_CB_PD (0x0) +#define RT5670_HP_CB_PU (0x1) + +/* Depop Mode Control 2 (0x8f) */ +#define RT5670_DEPOP_MASK (0x1 << 13) +#define RT5670_DEPOP_SFT 13 +#define RT5670_DEPOP_AUTO (0x0 << 13) +#define RT5670_DEPOP_MAN (0x1 << 13) +#define RT5670_RAMP_MASK (0x1 << 12) +#define RT5670_RAMP_SFT 12 +#define RT5670_RAMP_DIS (0x0 << 12) +#define RT5670_RAMP_EN (0x1 << 12) +#define RT5670_BPS_MASK (0x1 << 11) +#define RT5670_BPS_SFT 11 +#define RT5670_BPS_DIS (0x0 << 11) +#define RT5670_BPS_EN (0x1 << 11) +#define RT5670_FAST_UPDN_MASK (0x1 << 10) +#define RT5670_FAST_UPDN_SFT 10 +#define RT5670_FAST_UPDN_DIS (0x0 << 10) +#define RT5670_FAST_UPDN_EN (0x1 << 10) +#define RT5670_MRES_MASK (0x3 << 8) +#define RT5670_MRES_SFT 8 +#define RT5670_MRES_15MO (0x0 << 8) +#define RT5670_MRES_25MO (0x1 << 8) +#define RT5670_MRES_35MO (0x2 << 8) +#define RT5670_MRES_45MO (0x3 << 8) +#define RT5670_VLO_MASK (0x1 << 7) +#define RT5670_VLO_SFT 7 +#define RT5670_VLO_3V (0x0 << 7) +#define RT5670_VLO_32V (0x1 << 7) +#define RT5670_DIG_DP_MASK (0x1 << 6) +#define RT5670_DIG_DP_SFT 6 +#define RT5670_DIG_DP_DIS (0x0 << 6) +#define RT5670_DIG_DP_EN (0x1 << 6) +#define RT5670_DP_TH_MASK (0x3 << 4) +#define RT5670_DP_TH_SFT 4 + +/* Depop Mode Control 3 (0x90) */ +#define RT5670_CP_SYS_MASK (0x7 << 12) +#define RT5670_CP_SYS_SFT 12 +#define RT5670_CP_FQ1_MASK (0x7 << 8) +#define RT5670_CP_FQ1_SFT 8 +#define RT5670_CP_FQ2_MASK (0x7 << 4) +#define RT5670_CP_FQ2_SFT 4 +#define RT5670_CP_FQ3_MASK (0x7) +#define RT5670_CP_FQ3_SFT 0 +#define RT5670_CP_FQ_1_5_KHZ 0 +#define RT5670_CP_FQ_3_KHZ 1 +#define RT5670_CP_FQ_6_KHZ 2 +#define RT5670_CP_FQ_12_KHZ 3 +#define RT5670_CP_FQ_24_KHZ 4 +#define RT5670_CP_FQ_48_KHZ 5 +#define RT5670_CP_FQ_96_KHZ 6 +#define RT5670_CP_FQ_192_KHZ 7 + +/* HPOUT charge pump (0x91) */ +#define RT5670_OSW_L_MASK (0x1 << 11) +#define RT5670_OSW_L_SFT 11 +#define RT5670_OSW_L_DIS (0x0 << 11) +#define RT5670_OSW_L_EN (0x1 << 11) +#define RT5670_OSW_R_MASK (0x1 << 10) +#define RT5670_OSW_R_SFT 10 +#define RT5670_OSW_R_DIS (0x0 << 10) +#define RT5670_OSW_R_EN (0x1 << 10) +#define RT5670_PM_HP_MASK (0x3 << 8) +#define RT5670_PM_HP_SFT 8 +#define RT5670_PM_HP_LV (0x0 << 8) +#define RT5670_PM_HP_MV (0x1 << 8) +#define RT5670_PM_HP_HV (0x2 << 8) +#define RT5670_IB_HP_MASK (0x3 << 6) +#define RT5670_IB_HP_SFT 6 +#define RT5670_IB_HP_125IL (0x0 << 6) +#define RT5670_IB_HP_25IL (0x1 << 6) +#define RT5670_IB_HP_5IL (0x2 << 6) +#define RT5670_IB_HP_1IL (0x3 << 6) + +/* PV detection and SPK gain control (0x92) */ +#define RT5670_PVDD_DET_MASK (0x1 << 15) +#define RT5670_PVDD_DET_SFT 15 +#define RT5670_PVDD_DET_DIS (0x0 << 15) +#define RT5670_PVDD_DET_EN (0x1 << 15) +#define RT5670_SPK_AG_MASK (0x1 << 14) +#define RT5670_SPK_AG_SFT 14 +#define RT5670_SPK_AG_DIS (0x0 << 14) +#define RT5670_SPK_AG_EN (0x1 << 14) + +/* Micbias Control (0x93) */ +#define RT5670_MIC1_BS_MASK (0x1 << 15) +#define RT5670_MIC1_BS_SFT 15 +#define RT5670_MIC1_BS_9AV (0x0 << 15) +#define RT5670_MIC1_BS_75AV (0x1 << 15) +#define RT5670_MIC2_BS_MASK (0x1 << 14) +#define RT5670_MIC2_BS_SFT 14 +#define RT5670_MIC2_BS_9AV (0x0 << 14) +#define RT5670_MIC2_BS_75AV (0x1 << 14) +#define RT5670_MIC1_CLK_MASK (0x1 << 13) +#define RT5670_MIC1_CLK_SFT 13 +#define RT5670_MIC1_CLK_DIS (0x0 << 13) +#define RT5670_MIC1_CLK_EN (0x1 << 13) +#define RT5670_MIC2_CLK_MASK (0x1 << 12) +#define RT5670_MIC2_CLK_SFT 12 +#define RT5670_MIC2_CLK_DIS (0x0 << 12) +#define RT5670_MIC2_CLK_EN (0x1 << 12) +#define RT5670_MIC1_OVCD_MASK (0x1 << 11) +#define RT5670_MIC1_OVCD_SFT 11 +#define RT5670_MIC1_OVCD_DIS (0x0 << 11) +#define RT5670_MIC1_OVCD_EN (0x1 << 11) +#define RT5670_MIC1_OVTH_MASK (0x3 << 9) +#define RT5670_MIC1_OVTH_SFT 9 +#define RT5670_MIC1_OVTH_600UA (0x0 << 9) +#define RT5670_MIC1_OVTH_1500UA (0x1 << 9) +#define RT5670_MIC1_OVTH_2000UA (0x2 << 9) +#define RT5670_MIC2_OVCD_MASK (0x1 << 8) +#define RT5670_MIC2_OVCD_SFT 8 +#define RT5670_MIC2_OVCD_DIS (0x0 << 8) +#define RT5670_MIC2_OVCD_EN (0x1 << 8) +#define RT5670_MIC2_OVTH_MASK (0x3 << 6) +#define RT5670_MIC2_OVTH_SFT 6 +#define RT5670_MIC2_OVTH_600UA (0x0 << 6) +#define RT5670_MIC2_OVTH_1500UA (0x1 << 6) +#define RT5670_MIC2_OVTH_2000UA (0x2 << 6) +#define RT5670_PWR_MB_MASK (0x1 << 5) +#define RT5670_PWR_MB_SFT 5 +#define RT5670_PWR_MB_PD (0x0 << 5) +#define RT5670_PWR_MB_PU (0x1 << 5) +#define RT5670_PWR_CLK25M_MASK (0x1 << 4) +#define RT5670_PWR_CLK25M_SFT 4 +#define RT5670_PWR_CLK25M_PD (0x0 << 4) +#define RT5670_PWR_CLK25M_PU (0x1 << 4) + +/* Analog JD Control 1 (0x94) */ +#define RT5670_JD1_MODE_MASK (0x3 << 0) +#define RT5670_JD1_MODE_0 (0x0 << 0) +#define RT5670_JD1_MODE_1 (0x1 << 0) +#define RT5670_JD1_MODE_2 (0x2 << 0) + +/* VAD Control 4 (0x9d) */ +#define RT5670_VAD_SEL_MASK (0x3 << 8) +#define RT5670_VAD_SEL_SFT 8 + +/* EQ Control 1 (0xb0) */ +#define RT5670_EQ_SRC_MASK (0x1 << 15) +#define RT5670_EQ_SRC_SFT 15 +#define RT5670_EQ_SRC_DAC (0x0 << 15) +#define RT5670_EQ_SRC_ADC (0x1 << 15) +#define RT5670_EQ_UPD (0x1 << 14) +#define RT5670_EQ_UPD_BIT 14 +#define RT5670_EQ_CD_MASK (0x1 << 13) +#define RT5670_EQ_CD_SFT 13 +#define RT5670_EQ_CD_DIS (0x0 << 13) +#define RT5670_EQ_CD_EN (0x1 << 13) +#define RT5670_EQ_DITH_MASK (0x3 << 8) +#define RT5670_EQ_DITH_SFT 8 +#define RT5670_EQ_DITH_NOR (0x0 << 8) +#define RT5670_EQ_DITH_LSB (0x1 << 8) +#define RT5670_EQ_DITH_LSB_1 (0x2 << 8) +#define RT5670_EQ_DITH_LSB_2 (0x3 << 8) + +/* EQ Control 2 (0xb1) */ +#define RT5670_EQ_HPF1_M_MASK (0x1 << 8) +#define RT5670_EQ_HPF1_M_SFT 8 +#define RT5670_EQ_HPF1_M_HI (0x0 << 8) +#define RT5670_EQ_HPF1_M_1ST (0x1 << 8) +#define RT5670_EQ_LPF1_M_MASK (0x1 << 7) +#define RT5670_EQ_LPF1_M_SFT 7 +#define RT5670_EQ_LPF1_M_LO (0x0 << 7) +#define RT5670_EQ_LPF1_M_1ST (0x1 << 7) +#define RT5670_EQ_HPF2_MASK (0x1 << 6) +#define RT5670_EQ_HPF2_SFT 6 +#define RT5670_EQ_HPF2_DIS (0x0 << 6) +#define RT5670_EQ_HPF2_EN (0x1 << 6) +#define RT5670_EQ_HPF1_MASK (0x1 << 5) +#define RT5670_EQ_HPF1_SFT 5 +#define RT5670_EQ_HPF1_DIS (0x0 << 5) +#define RT5670_EQ_HPF1_EN (0x1 << 5) +#define RT5670_EQ_BPF4_MASK (0x1 << 4) +#define RT5670_EQ_BPF4_SFT 4 +#define RT5670_EQ_BPF4_DIS (0x0 << 4) +#define RT5670_EQ_BPF4_EN (0x1 << 4) +#define RT5670_EQ_BPF3_MASK (0x1 << 3) +#define RT5670_EQ_BPF3_SFT 3 +#define RT5670_EQ_BPF3_DIS (0x0 << 3) +#define RT5670_EQ_BPF3_EN (0x1 << 3) +#define RT5670_EQ_BPF2_MASK (0x1 << 2) +#define RT5670_EQ_BPF2_SFT 2 +#define RT5670_EQ_BPF2_DIS (0x0 << 2) +#define RT5670_EQ_BPF2_EN (0x1 << 2) +#define RT5670_EQ_BPF1_MASK (0x1 << 1) +#define RT5670_EQ_BPF1_SFT 1 +#define RT5670_EQ_BPF1_DIS (0x0 << 1) +#define RT5670_EQ_BPF1_EN (0x1 << 1) +#define RT5670_EQ_LPF_MASK (0x1) +#define RT5670_EQ_LPF_SFT 0 +#define RT5670_EQ_LPF_DIS (0x0) +#define RT5670_EQ_LPF_EN (0x1) +#define RT5670_EQ_CTRL_MASK (0x7f) + +/* Memory Test (0xb2) */ +#define RT5670_MT_MASK (0x1 << 15) +#define RT5670_MT_SFT 15 +#define RT5670_MT_DIS (0x0 << 15) +#define RT5670_MT_EN (0x1 << 15) + +/* DRC/AGC Control 1 (0xb4) */ +#define RT5670_DRC_AGC_P_MASK (0x1 << 15) +#define RT5670_DRC_AGC_P_SFT 15 +#define RT5670_DRC_AGC_P_DAC (0x0 << 15) +#define RT5670_DRC_AGC_P_ADC (0x1 << 15) +#define RT5670_DRC_AGC_MASK (0x1 << 14) +#define RT5670_DRC_AGC_SFT 14 +#define RT5670_DRC_AGC_DIS (0x0 << 14) +#define RT5670_DRC_AGC_EN (0x1 << 14) +#define RT5670_DRC_AGC_UPD (0x1 << 13) +#define RT5670_DRC_AGC_UPD_BIT 13 +#define RT5670_DRC_AGC_AR_MASK (0x1f << 8) +#define RT5670_DRC_AGC_AR_SFT 8 +#define RT5670_DRC_AGC_R_MASK (0x7 << 5) +#define RT5670_DRC_AGC_R_SFT 5 +#define RT5670_DRC_AGC_R_48K (0x1 << 5) +#define RT5670_DRC_AGC_R_96K (0x2 << 5) +#define RT5670_DRC_AGC_R_192K (0x3 << 5) +#define RT5670_DRC_AGC_R_441K (0x5 << 5) +#define RT5670_DRC_AGC_R_882K (0x6 << 5) +#define RT5670_DRC_AGC_R_1764K (0x7 << 5) +#define RT5670_DRC_AGC_RC_MASK (0x1f) +#define RT5670_DRC_AGC_RC_SFT 0 + +/* DRC/AGC Control 2 (0xb5) */ +#define RT5670_DRC_AGC_POB_MASK (0x3f << 8) +#define RT5670_DRC_AGC_POB_SFT 8 +#define RT5670_DRC_AGC_CP_MASK (0x1 << 7) +#define RT5670_DRC_AGC_CP_SFT 7 +#define RT5670_DRC_AGC_CP_DIS (0x0 << 7) +#define RT5670_DRC_AGC_CP_EN (0x1 << 7) +#define RT5670_DRC_AGC_CPR_MASK (0x3 << 5) +#define RT5670_DRC_AGC_CPR_SFT 5 +#define RT5670_DRC_AGC_CPR_1_1 (0x0 << 5) +#define RT5670_DRC_AGC_CPR_1_2 (0x1 << 5) +#define RT5670_DRC_AGC_CPR_1_3 (0x2 << 5) +#define RT5670_DRC_AGC_CPR_1_4 (0x3 << 5) +#define RT5670_DRC_AGC_PRB_MASK (0x1f) +#define RT5670_DRC_AGC_PRB_SFT 0 + +/* DRC/AGC Control 3 (0xb6) */ +#define RT5670_DRC_AGC_NGB_MASK (0xf << 12) +#define RT5670_DRC_AGC_NGB_SFT 12 +#define RT5670_DRC_AGC_TAR_MASK (0x1f << 7) +#define RT5670_DRC_AGC_TAR_SFT 7 +#define RT5670_DRC_AGC_NG_MASK (0x1 << 6) +#define RT5670_DRC_AGC_NG_SFT 6 +#define RT5670_DRC_AGC_NG_DIS (0x0 << 6) +#define RT5670_DRC_AGC_NG_EN (0x1 << 6) +#define RT5670_DRC_AGC_NGH_MASK (0x1 << 5) +#define RT5670_DRC_AGC_NGH_SFT 5 +#define RT5670_DRC_AGC_NGH_DIS (0x0 << 5) +#define RT5670_DRC_AGC_NGH_EN (0x1 << 5) +#define RT5670_DRC_AGC_NGT_MASK (0x1f) +#define RT5670_DRC_AGC_NGT_SFT 0 + +/* Jack Detect Control (0xbb) */ +#define RT5670_JD_MASK (0x7 << 13) +#define RT5670_JD_SFT 13 +#define RT5670_JD_DIS (0x0 << 13) +#define RT5670_JD_GPIO1 (0x1 << 13) +#define RT5670_JD_JD1_IN4P (0x2 << 13) +#define RT5670_JD_JD2_IN4N (0x3 << 13) +#define RT5670_JD_GPIO2 (0x4 << 13) +#define RT5670_JD_GPIO3 (0x5 << 13) +#define RT5670_JD_GPIO4 (0x6 << 13) +#define RT5670_JD_HP_MASK (0x1 << 11) +#define RT5670_JD_HP_SFT 11 +#define RT5670_JD_HP_DIS (0x0 << 11) +#define RT5670_JD_HP_EN (0x1 << 11) +#define RT5670_JD_HP_TRG_MASK (0x1 << 10) +#define RT5670_JD_HP_TRG_SFT 10 +#define RT5670_JD_HP_TRG_LO (0x0 << 10) +#define RT5670_JD_HP_TRG_HI (0x1 << 10) +#define RT5670_JD_SPL_MASK (0x1 << 9) +#define RT5670_JD_SPL_SFT 9 +#define RT5670_JD_SPL_DIS (0x0 << 9) +#define RT5670_JD_SPL_EN (0x1 << 9) +#define RT5670_JD_SPL_TRG_MASK (0x1 << 8) +#define RT5670_JD_SPL_TRG_SFT 8 +#define RT5670_JD_SPL_TRG_LO (0x0 << 8) +#define RT5670_JD_SPL_TRG_HI (0x1 << 8) +#define RT5670_JD_SPR_MASK (0x1 << 7) +#define RT5670_JD_SPR_SFT 7 +#define RT5670_JD_SPR_DIS (0x0 << 7) +#define RT5670_JD_SPR_EN (0x1 << 7) +#define RT5670_JD_SPR_TRG_MASK (0x1 << 6) +#define RT5670_JD_SPR_TRG_SFT 6 +#define RT5670_JD_SPR_TRG_LO (0x0 << 6) +#define RT5670_JD_SPR_TRG_HI (0x1 << 6) +#define RT5670_JD_MO_MASK (0x1 << 5) +#define RT5670_JD_MO_SFT 5 +#define RT5670_JD_MO_DIS (0x0 << 5) +#define RT5670_JD_MO_EN (0x1 << 5) +#define RT5670_JD_MO_TRG_MASK (0x1 << 4) +#define RT5670_JD_MO_TRG_SFT 4 +#define RT5670_JD_MO_TRG_LO (0x0 << 4) +#define RT5670_JD_MO_TRG_HI (0x1 << 4) +#define RT5670_JD_LO_MASK (0x1 << 3) +#define RT5670_JD_LO_SFT 3 +#define RT5670_JD_LO_DIS (0x0 << 3) +#define RT5670_JD_LO_EN (0x1 << 3) +#define RT5670_JD_LO_TRG_MASK (0x1 << 2) +#define RT5670_JD_LO_TRG_SFT 2 +#define RT5670_JD_LO_TRG_LO (0x0 << 2) +#define RT5670_JD_LO_TRG_HI (0x1 << 2) +#define RT5670_JD1_IN4P_MASK (0x1 << 1) +#define RT5670_JD1_IN4P_SFT 1 +#define RT5670_JD1_IN4P_DIS (0x0 << 1) +#define RT5670_JD1_IN4P_EN (0x1 << 1) +#define RT5670_JD2_IN4N_MASK (0x1) +#define RT5670_JD2_IN4N_SFT 0 +#define RT5670_JD2_IN4N_DIS (0x0) +#define RT5670_JD2_IN4N_EN (0x1) + +/* IRQ Control 1 (0xbd) */ +#define RT5670_IRQ_JD_MASK (0x1 << 15) +#define RT5670_IRQ_JD_SFT 15 +#define RT5670_IRQ_JD_BP (0x0 << 15) +#define RT5670_IRQ_JD_NOR (0x1 << 15) +#define RT5670_IRQ_OT_MASK (0x1 << 14) +#define RT5670_IRQ_OT_SFT 14 +#define RT5670_IRQ_OT_BP (0x0 << 14) +#define RT5670_IRQ_OT_NOR (0x1 << 14) +#define RT5670_JD_STKY_MASK (0x1 << 13) +#define RT5670_JD_STKY_SFT 13 +#define RT5670_JD_STKY_DIS (0x0 << 13) +#define RT5670_JD_STKY_EN (0x1 << 13) +#define RT5670_OT_STKY_MASK (0x1 << 12) +#define RT5670_OT_STKY_SFT 12 +#define RT5670_OT_STKY_DIS (0x0 << 12) +#define RT5670_OT_STKY_EN (0x1 << 12) +#define RT5670_JD_P_MASK (0x1 << 11) +#define RT5670_JD_P_SFT 11 +#define RT5670_JD_P_NOR (0x0 << 11) +#define RT5670_JD_P_INV (0x1 << 11) +#define RT5670_OT_P_MASK (0x1 << 10) +#define RT5670_OT_P_SFT 10 +#define RT5670_OT_P_NOR (0x0 << 10) +#define RT5670_OT_P_INV (0x1 << 10) +#define RT5670_JD1_1_EN_MASK (0x1 << 9) +#define RT5670_JD1_1_EN_SFT 9 +#define RT5670_JD1_1_DIS (0x0 << 9) +#define RT5670_JD1_1_EN (0x1 << 9) + +/* IRQ Control 2 (0xbe) */ +#define RT5670_IRQ_MB1_OC_MASK (0x1 << 15) +#define RT5670_IRQ_MB1_OC_SFT 15 +#define RT5670_IRQ_MB1_OC_BP (0x0 << 15) +#define RT5670_IRQ_MB1_OC_NOR (0x1 << 15) +#define RT5670_IRQ_MB2_OC_MASK (0x1 << 14) +#define RT5670_IRQ_MB2_OC_SFT 14 +#define RT5670_IRQ_MB2_OC_BP (0x0 << 14) +#define RT5670_IRQ_MB2_OC_NOR (0x1 << 14) +#define RT5670_MB1_OC_STKY_MASK (0x1 << 11) +#define RT5670_MB1_OC_STKY_SFT 11 +#define RT5670_MB1_OC_STKY_DIS (0x0 << 11) +#define RT5670_MB1_OC_STKY_EN (0x1 << 11) +#define RT5670_MB2_OC_STKY_MASK (0x1 << 10) +#define RT5670_MB2_OC_STKY_SFT 10 +#define RT5670_MB2_OC_STKY_DIS (0x0 << 10) +#define RT5670_MB2_OC_STKY_EN (0x1 << 10) +#define RT5670_MB1_OC_P_MASK (0x1 << 7) +#define RT5670_MB1_OC_P_SFT 7 +#define RT5670_MB1_OC_P_NOR (0x0 << 7) +#define RT5670_MB1_OC_P_INV (0x1 << 7) +#define RT5670_MB2_OC_P_MASK (0x1 << 6) +#define RT5670_MB2_OC_P_SFT 6 +#define RT5670_MB2_OC_P_NOR (0x0 << 6) +#define RT5670_MB2_OC_P_INV (0x1 << 6) +#define RT5670_MB1_OC_CLR (0x1 << 3) +#define RT5670_MB1_OC_CLR_SFT 3 +#define RT5670_MB2_OC_CLR (0x1 << 2) +#define RT5670_MB2_OC_CLR_SFT 2 + +/* GPIO Control 1 (0xc0) */ +#define RT5670_GP1_PIN_MASK (0x1 << 15) +#define RT5670_GP1_PIN_SFT 15 +#define RT5670_GP1_PIN_GPIO1 (0x0 << 15) +#define RT5670_GP1_PIN_IRQ (0x1 << 15) +#define RT5670_GP2_PIN_MASK (0x1 << 14) +#define RT5670_GP2_PIN_SFT 14 +#define RT5670_GP2_PIN_GPIO2 (0x0 << 14) +#define RT5670_GP2_PIN_DMIC1_SCL (0x1 << 14) +#define RT5670_GP3_PIN_MASK (0x3 << 12) +#define RT5670_GP3_PIN_SFT 12 +#define RT5670_GP3_PIN_GPIO3 (0x0 << 12) +#define RT5670_GP3_PIN_DMIC1_SDA (0x1 << 12) +#define RT5670_GP3_PIN_IRQ (0x2 << 12) +#define RT5670_GP4_PIN_MASK (0x1 << 11) +#define RT5670_GP4_PIN_SFT 11 +#define RT5670_GP4_PIN_GPIO4 (0x0 << 11) +#define RT5670_GP4_PIN_DMIC2_SDA (0x1 << 11) +#define RT5670_DP_SIG_MASK (0x1 << 10) +#define RT5670_DP_SIG_SFT 10 +#define RT5670_DP_SIG_TEST (0x0 << 10) +#define RT5670_DP_SIG_AP (0x1 << 10) +#define RT5670_GPIO_M_MASK (0x1 << 9) +#define RT5670_GPIO_M_SFT 9 +#define RT5670_GPIO_M_FLT (0x0 << 9) +#define RT5670_GPIO_M_PH (0x1 << 9) +#define RT5670_I2S2_PIN_MASK (0x1 << 8) +#define RT5670_I2S2_PIN_SFT 8 +#define RT5670_I2S2_PIN_I2S (0x0 << 8) +#define RT5670_I2S2_PIN_GPIO (0x1 << 8) +#define RT5670_GP5_PIN_MASK (0x1 << 7) +#define RT5670_GP5_PIN_SFT 7 +#define RT5670_GP5_PIN_GPIO5 (0x0 << 7) +#define RT5670_GP5_PIN_DMIC3_SDA (0x1 << 7) +#define RT5670_GP6_PIN_MASK (0x1 << 6) +#define RT5670_GP6_PIN_SFT 6 +#define RT5670_GP6_PIN_GPIO6 (0x0 << 6) +#define RT5670_GP6_PIN_DMIC1_SDA (0x1 << 6) +#define RT5670_GP7_PIN_MASK (0x3 << 4) +#define RT5670_GP7_PIN_SFT 4 +#define RT5670_GP7_PIN_GPIO7 (0x0 << 4) +#define RT5670_GP7_PIN_DMIC1_SDA (0x1 << 4) +#define RT5670_GP7_PIN_PDM_SCL2 (0x2 << 4) +#define RT5670_GP8_PIN_MASK (0x1 << 3) +#define RT5670_GP8_PIN_SFT 3 +#define RT5670_GP8_PIN_GPIO8 (0x0 << 3) +#define RT5670_GP8_PIN_DMIC2_SDA (0x1 << 3) +#define RT5670_GP9_PIN_MASK (0x1 << 2) +#define RT5670_GP9_PIN_SFT 2 +#define RT5670_GP9_PIN_GPIO9 (0x0 << 2) +#define RT5670_GP9_PIN_DMIC3_SDA (0x1 << 2) +#define RT5670_GP10_PIN_MASK (0x3) +#define RT5670_GP10_PIN_SFT 0 +#define RT5670_GP10_PIN_GPIO9 (0x0) +#define RT5670_GP10_PIN_DMIC3_SDA (0x1) +#define RT5670_GP10_PIN_PDM_ADT2 (0x2) + +/* GPIO Control 2 (0xc1) */ +#define RT5670_GP4_PF_MASK (0x1 << 11) +#define RT5670_GP4_PF_SFT 11 +#define RT5670_GP4_PF_IN (0x0 << 11) +#define RT5670_GP4_PF_OUT (0x1 << 11) +#define RT5670_GP4_OUT_MASK (0x1 << 10) +#define RT5670_GP4_OUT_SFT 10 +#define RT5670_GP4_OUT_LO (0x0 << 10) +#define RT5670_GP4_OUT_HI (0x1 << 10) +#define RT5670_GP4_P_MASK (0x1 << 9) +#define RT5670_GP4_P_SFT 9 +#define RT5670_GP4_P_NOR (0x0 << 9) +#define RT5670_GP4_P_INV (0x1 << 9) +#define RT5670_GP3_PF_MASK (0x1 << 8) +#define RT5670_GP3_PF_SFT 8 +#define RT5670_GP3_PF_IN (0x0 << 8) +#define RT5670_GP3_PF_OUT (0x1 << 8) +#define RT5670_GP3_OUT_MASK (0x1 << 7) +#define RT5670_GP3_OUT_SFT 7 +#define RT5670_GP3_OUT_LO (0x0 << 7) +#define RT5670_GP3_OUT_HI (0x1 << 7) +#define RT5670_GP3_P_MASK (0x1 << 6) +#define RT5670_GP3_P_SFT 6 +#define RT5670_GP3_P_NOR (0x0 << 6) +#define RT5670_GP3_P_INV (0x1 << 6) +#define RT5670_GP2_PF_MASK (0x1 << 5) +#define RT5670_GP2_PF_SFT 5 +#define RT5670_GP2_PF_IN (0x0 << 5) +#define RT5670_GP2_PF_OUT (0x1 << 5) +#define RT5670_GP2_OUT_MASK (0x1 << 4) +#define RT5670_GP2_OUT_SFT 4 +#define RT5670_GP2_OUT_LO (0x0 << 4) +#define RT5670_GP2_OUT_HI (0x1 << 4) +#define RT5670_GP2_P_MASK (0x1 << 3) +#define RT5670_GP2_P_SFT 3 +#define RT5670_GP2_P_NOR (0x0 << 3) +#define RT5670_GP2_P_INV (0x1 << 3) +#define RT5670_GP1_PF_MASK (0x1 << 2) +#define RT5670_GP1_PF_SFT 2 +#define RT5670_GP1_PF_IN (0x0 << 2) +#define RT5670_GP1_PF_OUT (0x1 << 2) +#define RT5670_GP1_OUT_MASK (0x1 << 1) +#define RT5670_GP1_OUT_SFT 1 +#define RT5670_GP1_OUT_LO (0x0 << 1) +#define RT5670_GP1_OUT_HI (0x1 << 1) +#define RT5670_GP1_P_MASK (0x1) +#define RT5670_GP1_P_SFT 0 +#define RT5670_GP1_P_NOR (0x0) +#define RT5670_GP1_P_INV (0x1) + +/* Scramble Function (0xcd) */ +#define RT5670_SCB_KEY_MASK (0xff) +#define RT5670_SCB_KEY_SFT 0 + +/* Scramble Control (0xce) */ +#define RT5670_SCB_SWAP_MASK (0x1 << 15) +#define RT5670_SCB_SWAP_SFT 15 +#define RT5670_SCB_SWAP_DIS (0x0 << 15) +#define RT5670_SCB_SWAP_EN (0x1 << 15) +#define RT5670_SCB_MASK (0x1 << 14) +#define RT5670_SCB_SFT 14 +#define RT5670_SCB_DIS (0x0 << 14) +#define RT5670_SCB_EN (0x1 << 14) + +/* Baseback Control (0xcf) */ +#define RT5670_BB_MASK (0x1 << 15) +#define RT5670_BB_SFT 15 +#define RT5670_BB_DIS (0x0 << 15) +#define RT5670_BB_EN (0x1 << 15) +#define RT5670_BB_CT_MASK (0x7 << 12) +#define RT5670_BB_CT_SFT 12 +#define RT5670_BB_CT_A (0x0 << 12) +#define RT5670_BB_CT_B (0x1 << 12) +#define RT5670_BB_CT_C (0x2 << 12) +#define RT5670_BB_CT_D (0x3 << 12) +#define RT5670_M_BB_L_MASK (0x1 << 9) +#define RT5670_M_BB_L_SFT 9 +#define RT5670_M_BB_R_MASK (0x1 << 8) +#define RT5670_M_BB_R_SFT 8 +#define RT5670_M_BB_HPF_L_MASK (0x1 << 7) +#define RT5670_M_BB_HPF_L_SFT 7 +#define RT5670_M_BB_HPF_R_MASK (0x1 << 6) +#define RT5670_M_BB_HPF_R_SFT 6 +#define RT5670_G_BB_BST_MASK (0x3f) +#define RT5670_G_BB_BST_SFT 0 + +/* MP3 Plus Control 1 (0xd0) */ +#define RT5670_M_MP3_L_MASK (0x1 << 15) +#define RT5670_M_MP3_L_SFT 15 +#define RT5670_M_MP3_R_MASK (0x1 << 14) +#define RT5670_M_MP3_R_SFT 14 +#define RT5670_M_MP3_MASK (0x1 << 13) +#define RT5670_M_MP3_SFT 13 +#define RT5670_M_MP3_DIS (0x0 << 13) +#define RT5670_M_MP3_EN (0x1 << 13) +#define RT5670_EG_MP3_MASK (0x1f << 8) +#define RT5670_EG_MP3_SFT 8 +#define RT5670_MP3_HLP_MASK (0x1 << 7) +#define RT5670_MP3_HLP_SFT 7 +#define RT5670_MP3_HLP_DIS (0x0 << 7) +#define RT5670_MP3_HLP_EN (0x1 << 7) +#define RT5670_M_MP3_ORG_L_MASK (0x1 << 6) +#define RT5670_M_MP3_ORG_L_SFT 6 +#define RT5670_M_MP3_ORG_R_MASK (0x1 << 5) +#define RT5670_M_MP3_ORG_R_SFT 5 + +/* MP3 Plus Control 2 (0xd1) */ +#define RT5670_MP3_WT_MASK (0x1 << 13) +#define RT5670_MP3_WT_SFT 13 +#define RT5670_MP3_WT_1_4 (0x0 << 13) +#define RT5670_MP3_WT_1_2 (0x1 << 13) +#define RT5670_OG_MP3_MASK (0x1f << 8) +#define RT5670_OG_MP3_SFT 8 +#define RT5670_HG_MP3_MASK (0x3f) +#define RT5670_HG_MP3_SFT 0 + +/* 3D HP Control 1 (0xd2) */ +#define RT5670_3D_CF_MASK (0x1 << 15) +#define RT5670_3D_CF_SFT 15 +#define RT5670_3D_CF_DIS (0x0 << 15) +#define RT5670_3D_CF_EN (0x1 << 15) +#define RT5670_3D_HP_MASK (0x1 << 14) +#define RT5670_3D_HP_SFT 14 +#define RT5670_3D_HP_DIS (0x0 << 14) +#define RT5670_3D_HP_EN (0x1 << 14) +#define RT5670_3D_BT_MASK (0x1 << 13) +#define RT5670_3D_BT_SFT 13 +#define RT5670_3D_BT_DIS (0x0 << 13) +#define RT5670_3D_BT_EN (0x1 << 13) +#define RT5670_3D_1F_MIX_MASK (0x3 << 11) +#define RT5670_3D_1F_MIX_SFT 11 +#define RT5670_3D_HP_M_MASK (0x1 << 10) +#define RT5670_3D_HP_M_SFT 10 +#define RT5670_3D_HP_M_SUR (0x0 << 10) +#define RT5670_3D_HP_M_FRO (0x1 << 10) +#define RT5670_M_3D_HRTF_MASK (0x1 << 9) +#define RT5670_M_3D_HRTF_SFT 9 +#define RT5670_M_3D_D2H_MASK (0x1 << 8) +#define RT5670_M_3D_D2H_SFT 8 +#define RT5670_M_3D_D2R_MASK (0x1 << 7) +#define RT5670_M_3D_D2R_SFT 7 +#define RT5670_M_3D_REVB_MASK (0x1 << 6) +#define RT5670_M_3D_REVB_SFT 6 + +/* Adjustable high pass filter control 1 (0xd3) */ +#define RT5670_2ND_HPF_MASK (0x1 << 15) +#define RT5670_2ND_HPF_SFT 15 +#define RT5670_2ND_HPF_DIS (0x0 << 15) +#define RT5670_2ND_HPF_EN (0x1 << 15) +#define RT5670_HPF_CF_L_MASK (0x7 << 12) +#define RT5670_HPF_CF_L_SFT 12 +#define RT5670_1ST_HPF_MASK (0x1 << 11) +#define RT5670_1ST_HPF_SFT 11 +#define RT5670_1ST_HPF_DIS (0x0 << 11) +#define RT5670_1ST_HPF_EN (0x1 << 11) +#define RT5670_HPF_CF_R_MASK (0x7 << 8) +#define RT5670_HPF_CF_R_SFT 8 +#define RT5670_ZD_T_MASK (0x3 << 6) +#define RT5670_ZD_T_SFT 6 +#define RT5670_ZD_F_MASK (0x3 << 4) +#define RT5670_ZD_F_SFT 4 +#define RT5670_ZD_F_IM (0x0 << 4) +#define RT5670_ZD_F_ZC_IM (0x1 << 4) +#define RT5670_ZD_F_ZC_IOD (0x2 << 4) +#define RT5670_ZD_F_UN (0x3 << 4) + +/* HP calibration control and Amp detection (0xd6) */ +#define RT5670_SI_DAC_MASK (0x1 << 11) +#define RT5670_SI_DAC_SFT 11 +#define RT5670_SI_DAC_AUTO (0x0 << 11) +#define RT5670_SI_DAC_TEST (0x1 << 11) +#define RT5670_DC_CAL_M_MASK (0x1 << 10) +#define RT5670_DC_CAL_M_SFT 10 +#define RT5670_DC_CAL_M_CAL (0x0 << 10) +#define RT5670_DC_CAL_M_NOR (0x1 << 10) +#define RT5670_DC_CAL_MASK (0x1 << 9) +#define RT5670_DC_CAL_SFT 9 +#define RT5670_DC_CAL_DIS (0x0 << 9) +#define RT5670_DC_CAL_EN (0x1 << 9) +#define RT5670_HPD_RCV_MASK (0x7 << 6) +#define RT5670_HPD_RCV_SFT 6 +#define RT5670_HPD_PS_MASK (0x1 << 5) +#define RT5670_HPD_PS_SFT 5 +#define RT5670_HPD_PS_DIS (0x0 << 5) +#define RT5670_HPD_PS_EN (0x1 << 5) +#define RT5670_CAL_M_MASK (0x1 << 4) +#define RT5670_CAL_M_SFT 4 +#define RT5670_CAL_M_DEP (0x0 << 4) +#define RT5670_CAL_M_CAL (0x1 << 4) +#define RT5670_CAL_MASK (0x1 << 3) +#define RT5670_CAL_SFT 3 +#define RT5670_CAL_DIS (0x0 << 3) +#define RT5670_CAL_EN (0x1 << 3) +#define RT5670_CAL_TEST_MASK (0x1 << 2) +#define RT5670_CAL_TEST_SFT 2 +#define RT5670_CAL_TEST_DIS (0x0 << 2) +#define RT5670_CAL_TEST_EN (0x1 << 2) +#define RT5670_CAL_P_MASK (0x3) +#define RT5670_CAL_P_SFT 0 +#define RT5670_CAL_P_NONE (0x0) +#define RT5670_CAL_P_CAL (0x1) +#define RT5670_CAL_P_DAC_CAL (0x2) + +/* Soft volume and zero cross control 1 (0xd9) */ +#define RT5670_SV_MASK (0x1 << 15) +#define RT5670_SV_SFT 15 +#define RT5670_SV_DIS (0x0 << 15) +#define RT5670_SV_EN (0x1 << 15) +#define RT5670_SPO_SV_MASK (0x1 << 14) +#define RT5670_SPO_SV_SFT 14 +#define RT5670_SPO_SV_DIS (0x0 << 14) +#define RT5670_SPO_SV_EN (0x1 << 14) +#define RT5670_OUT_SV_MASK (0x1 << 13) +#define RT5670_OUT_SV_SFT 13 +#define RT5670_OUT_SV_DIS (0x0 << 13) +#define RT5670_OUT_SV_EN (0x1 << 13) +#define RT5670_HP_SV_MASK (0x1 << 12) +#define RT5670_HP_SV_SFT 12 +#define RT5670_HP_SV_DIS (0x0 << 12) +#define RT5670_HP_SV_EN (0x1 << 12) +#define RT5670_ZCD_DIG_MASK (0x1 << 11) +#define RT5670_ZCD_DIG_SFT 11 +#define RT5670_ZCD_DIG_DIS (0x0 << 11) +#define RT5670_ZCD_DIG_EN (0x1 << 11) +#define RT5670_ZCD_MASK (0x1 << 10) +#define RT5670_ZCD_SFT 10 +#define RT5670_ZCD_PD (0x0 << 10) +#define RT5670_ZCD_PU (0x1 << 10) +#define RT5670_M_ZCD_MASK (0x3f << 4) +#define RT5670_M_ZCD_SFT 4 +#define RT5670_M_ZCD_RM_L (0x1 << 9) +#define RT5670_M_ZCD_RM_R (0x1 << 8) +#define RT5670_M_ZCD_SM_L (0x1 << 7) +#define RT5670_M_ZCD_SM_R (0x1 << 6) +#define RT5670_M_ZCD_OM_L (0x1 << 5) +#define RT5670_M_ZCD_OM_R (0x1 << 4) +#define RT5670_SV_DLY_MASK (0xf) +#define RT5670_SV_DLY_SFT 0 + +/* Soft volume and zero cross control 2 (0xda) */ +#define RT5670_ZCD_HP_MASK (0x1 << 15) +#define RT5670_ZCD_HP_SFT 15 +#define RT5670_ZCD_HP_DIS (0x0 << 15) +#define RT5670_ZCD_HP_EN (0x1 << 15) + + +/* Codec Private Register definition */ +/* 3D Speaker Control (0x63) */ +#define RT5670_3D_SPK_MASK (0x1 << 15) +#define RT5670_3D_SPK_SFT 15 +#define RT5670_3D_SPK_DIS (0x0 << 15) +#define RT5670_3D_SPK_EN (0x1 << 15) +#define RT5670_3D_SPK_M_MASK (0x3 << 13) +#define RT5670_3D_SPK_M_SFT 13 +#define RT5670_3D_SPK_CG_MASK (0x1f << 8) +#define RT5670_3D_SPK_CG_SFT 8 +#define RT5670_3D_SPK_SG_MASK (0x1f) +#define RT5670_3D_SPK_SG_SFT 0 + +/* Wind Noise Detection Control 1 (0x6c) */ +#define RT5670_WND_MASK (0x1 << 15) +#define RT5670_WND_SFT 15 +#define RT5670_WND_DIS (0x0 << 15) +#define RT5670_WND_EN (0x1 << 15) + +/* Wind Noise Detection Control 2 (0x6d) */ +#define RT5670_WND_FC_NW_MASK (0x3f << 10) +#define RT5670_WND_FC_NW_SFT 10 +#define RT5670_WND_FC_WK_MASK (0x3f << 4) +#define RT5670_WND_FC_WK_SFT 4 + +/* Wind Noise Detection Control 3 (0x6e) */ +#define RT5670_HPF_FC_MASK (0x3f << 6) +#define RT5670_HPF_FC_SFT 6 +#define RT5670_WND_FC_ST_MASK (0x3f) +#define RT5670_WND_FC_ST_SFT 0 + +/* Wind Noise Detection Control 4 (0x6f) */ +#define RT5670_WND_TH_LO_MASK (0x3ff) +#define RT5670_WND_TH_LO_SFT 0 + +/* Wind Noise Detection Control 5 (0x70) */ +#define RT5670_WND_TH_HI_MASK (0x3ff) +#define RT5670_WND_TH_HI_SFT 0 + +/* Wind Noise Detection Control 8 (0x73) */ +#define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */ +#define RT5670_WND_WIND_SFT 13 +#define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */ +#define RT5670_WND_STRONG_SFT 12 +enum { + RT5670_NO_WIND, + RT5670_BREEZE, + RT5670_STORM, +}; + +/* Dipole Speaker Interface (0x75) */ +#define RT5670_DP_ATT_MASK (0x3 << 14) +#define RT5670_DP_ATT_SFT 14 +#define RT5670_DP_SPK_MASK (0x1 << 10) +#define RT5670_DP_SPK_SFT 10 +#define RT5670_DP_SPK_DIS (0x0 << 10) +#define RT5670_DP_SPK_EN (0x1 << 10) + +/* EQ Pre Volume Control (0xb3) */ +#define RT5670_EQ_PRE_VOL_MASK (0xffff) +#define RT5670_EQ_PRE_VOL_SFT 0 + +/* EQ Post Volume Control (0xb4) */ +#define RT5670_EQ_PST_VOL_MASK (0xffff) +#define RT5670_EQ_PST_VOL_SFT 0 + +/* Jack Detect Control 3 (0xf8) */ +#define RT5670_CMP_MIC_IN_DET_MASK (0x7 << 12) +#define RT5670_JD_CBJ_EN (0x1 << 7) +#define RT5670_JD_CBJ_POL (0x1 << 6) +#define RT5670_JD_TRI_CBJ_SEL_MASK (0x7 << 3) +#define RT5670_JD_TRI_CBJ_SEL_SFT (3) +#define RT5670_JD_CBJ_GPIO_JD1 (0x0 << 3) +#define RT5670_JD_CBJ_JD1_1 (0x1 << 3) +#define RT5670_JD_CBJ_JD1_2 (0x2 << 3) +#define RT5670_JD_CBJ_JD2 (0x3 << 3) +#define RT5670_JD_CBJ_JD3 (0x4 << 3) +#define RT5670_JD_CBJ_GPIO_JD2 (0x5 << 3) +#define RT5670_JD_CBJ_MX0B_12 (0x6 << 3) +#define RT5670_JD_TRI_HPO_SEL_MASK (0x7 << 3) +#define RT5670_JD_TRI_HPO_SEL_SFT (0) +#define RT5670_JD_HPO_GPIO_JD1 (0x0) +#define RT5670_JD_HPO_JD1_1 (0x1) +#define RT5670_JD_HPO_JD1_2 (0x2) +#define RT5670_JD_HPO_JD2 (0x3) +#define RT5670_JD_HPO_JD3 (0x4) +#define RT5670_JD_HPO_GPIO_JD2 (0x5) +#define RT5670_JD_HPO_MX0B_12 (0x6) + +/* Digital Misc Control (0xfa) */ +#define RT5670_RST_DSP (0x1 << 13) +#define RT5670_IF1_ADC1_IN1_SEL (0x1 << 12) +#define RT5670_IF1_ADC1_IN1_SFT 12 +#define RT5670_IF1_ADC1_IN2_SEL (0x1 << 11) +#define RT5670_IF1_ADC1_IN2_SFT 11 +#define RT5670_IF1_ADC2_IN1_SEL (0x1 << 10) +#define RT5670_IF1_ADC2_IN1_SFT 10 + +/* General Control2 (0xfb) */ +#define RT5670_RXDC_SRC_MASK (0x1 << 7) +#define RT5670_RXDC_SRC_STO (0x0 << 7) +#define RT5670_RXDC_SRC_MONO (0x1 << 7) +#define RT5670_RXDC_SRC_SFT (7) +#define RT5670_RXDP2_SEL_MASK (0x1 << 3) +#define RT5670_RXDP2_SEL_IF2 (0x0 << 3) +#define RT5670_RXDP2_SEL_ADC (0x1 << 3) +#define RT5670_RXDP2_SEL_SFT (3) + +/* System Clock Source */ +enum { + RT5670_SCLK_S_MCLK, + RT5670_SCLK_S_PLL1, + RT5670_SCLK_S_RCCLK, +}; + +/* PLL1 Source */ +enum { + RT5670_PLL1_S_MCLK, + RT5670_PLL1_S_BCLK1, + RT5670_PLL1_S_BCLK2, + RT5670_PLL1_S_BCLK3, + RT5670_PLL1_S_BCLK4, +}; + +enum { + RT5670_AIF1, + RT5670_AIF2, + RT5670_AIF3, + RT5670_AIF4, + RT5670_AIFS, +}; + +enum { + RT5670_DMIC_DATA_GPIO6, + RT5670_DMIC_DATA_IN2P, + RT5670_DMIC_DATA_GPIO7, +}; + +enum { + RT5670_DMIC_DATA_GPIO8, + RT5670_DMIC_DATA_IN3N, +}; + +enum { + RT5670_DMIC_DATA_GPIO9, + RT5670_DMIC_DATA_GPIO10, + RT5670_DMIC_DATA_GPIO5, +}; + +struct rt5670_priv { + struct snd_soc_codec *codec; + struct rt5670_platform_data pdata; + struct regmap *regmap; + + int sysclk; + int sysclk_src; + int lrck[RT5670_AIFS]; + int bclk[RT5670_AIFS]; + int master[RT5670_AIFS]; + + int pll_src; + int pll_in; + int pll_out; + + int dsp_sw; /* expected parameter setting */ + int dsp_rate; + int jack_type; +}; + +#endif /* __RT5670_H__ */ diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index 833231e27340..67f14556462f 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -27,6 +27,7 @@ #include <sound/initval.h> #include <sound/tlv.h> +#include "rl6231.h" #include "rt5677.h" #define RT5677_DEVICE_ID 0x6327 @@ -604,19 +605,19 @@ static const struct snd_kcontrol_new rt5677_snd_controls[] = { adc_vol_tlv), /* ADC Boost Volume Control */ - SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5677_STO1_2_ADC_BST, + SOC_DOUBLE_TLV("STO1 ADC Boost Volume", RT5677_STO1_2_ADC_BST, RT5677_STO1_ADC_L_BST_SFT, RT5677_STO1_ADC_R_BST_SFT, 3, 0, adc_bst_tlv), - SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5677_STO1_2_ADC_BST, + SOC_DOUBLE_TLV("STO2 ADC Boost Volume", RT5677_STO1_2_ADC_BST, RT5677_STO2_ADC_L_BST_SFT, RT5677_STO2_ADC_R_BST_SFT, 3, 0, adc_bst_tlv), - SOC_DOUBLE_TLV("STO3 ADC Boost Gain", RT5677_STO3_4_ADC_BST, + SOC_DOUBLE_TLV("STO3 ADC Boost Volume", RT5677_STO3_4_ADC_BST, RT5677_STO3_ADC_L_BST_SFT, RT5677_STO3_ADC_R_BST_SFT, 3, 0, adc_bst_tlv), - SOC_DOUBLE_TLV("STO4 ADC Boost Gain", RT5677_STO3_4_ADC_BST, + SOC_DOUBLE_TLV("STO4 ADC Boost Volume", RT5677_STO3_4_ADC_BST, RT5677_STO4_ADC_L_BST_SFT, RT5677_STO4_ADC_R_BST_SFT, 3, 0, adc_bst_tlv), - SOC_DOUBLE_TLV("Mono ADC Boost Gain", RT5677_ADC_BST_CTRL2, + SOC_DOUBLE_TLV("Mono ADC Boost Volume", RT5677_ADC_BST_CTRL2, RT5677_MONO_ADC_L_BST_SFT, RT5677_MONO_ADC_R_BST_SFT, 3, 0, adc_bst_tlv), }; @@ -636,21 +637,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = w->codec; struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); - int div[] = {2, 3, 4, 6, 8, 12}, idx = -EINVAL, i; - int rate, red, bound, temp; - - rate = rt5677->sysclk; - red = 3000000 * 12; - for (i = 0; i < ARRAY_SIZE(div); i++) { - bound = div[i] * 3000000; - if (rate > bound) - continue; - temp = bound - rate; - if (temp < red) { - red = temp; - idx = i; - } - } + int idx = rl6231_calc_dmic_clk(rt5677->sysclk); if (idx < 0) dev_err(codec->dev, "Failed to set DMIC clock\n"); @@ -951,7 +938,7 @@ static const struct snd_kcontrol_new rt5677_ob_7_mix[] = { /* Mux */ -/* DAC1 L/R source */ /* MX-29 [10:8] */ +/* DAC1 L/R Source */ /* MX-29 [10:8] */ static const char * const rt5677_dac1_src[] = { "IF1 DAC 01", "IF2 DAC 01", "IF3 DAC LR", "IF4 DAC LR", "SLB DAC 01", "OB 01" @@ -962,9 +949,9 @@ static SOC_ENUM_SINGLE_DECL( RT5677_DAC1_L_SEL_SFT, rt5677_dac1_src); static const struct snd_kcontrol_new rt5677_dac1_mux = - SOC_DAPM_ENUM("DAC1 source", rt5677_dac1_enum); + SOC_DAPM_ENUM("DAC1 Source", rt5677_dac1_enum); -/* ADDA1 L/R source */ /* MX-29 [1:0] */ +/* ADDA1 L/R Source */ /* MX-29 [1:0] */ static const char * const rt5677_adda1_src[] = { "STO1 ADC MIX", "STO2 ADC MIX", "OB 67", }; @@ -974,10 +961,10 @@ static SOC_ENUM_SINGLE_DECL( RT5677_ADDA1_SEL_SFT, rt5677_adda1_src); static const struct snd_kcontrol_new rt5677_adda1_mux = - SOC_DAPM_ENUM("ADDA1 source", rt5677_adda1_enum); + SOC_DAPM_ENUM("ADDA1 Source", rt5677_adda1_enum); -/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ +/*DAC2 L/R Source*/ /* MX-1B [6:4] [2:0] */ static const char * const rt5677_dac2l_src[] = { "IF1 DAC 2", "IF2 DAC 2", "IF3 DAC L", "IF4 DAC L", "SLB DAC 2", "OB 2", @@ -988,7 +975,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_DAC2_L_SRC_SFT, rt5677_dac2l_src); static const struct snd_kcontrol_new rt5677_dac2_l_mux = - SOC_DAPM_ENUM("DAC2 L source", rt5677_dac2l_enum); + SOC_DAPM_ENUM("DAC2 L Source", rt5677_dac2l_enum); static const char * const rt5677_dac2r_src[] = { "IF1 DAC 3", "IF2 DAC 3", "IF3 DAC R", "IF4 DAC R", "SLB DAC 3", @@ -1000,9 +987,9 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_DAC2_R_SRC_SFT, rt5677_dac2r_src); static const struct snd_kcontrol_new rt5677_dac2_r_mux = - SOC_DAPM_ENUM("DAC2 R source", rt5677_dac2r_enum); + SOC_DAPM_ENUM("DAC2 R Source", rt5677_dac2r_enum); -/*DAC3 L/R source*/ /* MX-16 [6:4] [2:0] */ +/*DAC3 L/R Source*/ /* MX-16 [6:4] [2:0] */ static const char * const rt5677_dac3l_src[] = { "IF1 DAC 4", "IF2 DAC 4", "IF3 DAC L", "IF4 DAC L", "SLB DAC 4", "OB 4" @@ -1013,7 +1000,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_DAC3_L_SRC_SFT, rt5677_dac3l_src); static const struct snd_kcontrol_new rt5677_dac3_l_mux = - SOC_DAPM_ENUM("DAC3 L source", rt5677_dac3l_enum); + SOC_DAPM_ENUM("DAC3 L Source", rt5677_dac3l_enum); static const char * const rt5677_dac3r_src[] = { "IF1 DAC 5", "IF2 DAC 5", "IF3 DAC R", "IF4 DAC R", @@ -1025,9 +1012,9 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_DAC3_R_SRC_SFT, rt5677_dac3r_src); static const struct snd_kcontrol_new rt5677_dac3_r_mux = - SOC_DAPM_ENUM("DAC3 R source", rt5677_dac3r_enum); + SOC_DAPM_ENUM("DAC3 R Source", rt5677_dac3r_enum); -/*DAC4 L/R source*/ /* MX-16 [14:12] [10:8] */ +/*DAC4 L/R Source*/ /* MX-16 [14:12] [10:8] */ static const char * const rt5677_dac4l_src[] = { "IF1 DAC 6", "IF2 DAC 6", "IF3 DAC L", "IF4 DAC L", "SLB DAC 6", "OB 6" @@ -1038,7 +1025,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_DAC4_L_SRC_SFT, rt5677_dac4l_src); static const struct snd_kcontrol_new rt5677_dac4_l_mux = - SOC_DAPM_ENUM("DAC4 L source", rt5677_dac4l_enum); + SOC_DAPM_ENUM("DAC4 L Source", rt5677_dac4l_enum); static const char * const rt5677_dac4r_src[] = { "IF1 DAC 7", "IF2 DAC 7", "IF3 DAC R", "IF4 DAC R", @@ -1050,7 +1037,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_DAC4_R_SRC_SFT, rt5677_dac4r_src); static const struct snd_kcontrol_new rt5677_dac4_r_mux = - SOC_DAPM_ENUM("DAC4 R source", rt5677_dac4r_enum); + SOC_DAPM_ENUM("DAC4 R Source", rt5677_dac4r_enum); /* In/OutBound Source Pass SRC */ /* MX-A5 [3] [4] [0] [1] [2] */ static const char * const rt5677_iob_bypass_src[] = { @@ -1062,35 +1049,35 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_SRC_OB01_SFT, rt5677_iob_bypass_src); static const struct snd_kcontrol_new rt5677_ob01_bypass_src_mux = - SOC_DAPM_ENUM("OB01 Bypass source", rt5677_ob01_bypass_src_enum); + SOC_DAPM_ENUM("OB01 Bypass Source", rt5677_ob01_bypass_src_enum); static SOC_ENUM_SINGLE_DECL( rt5677_ob23_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL, RT5677_SEL_SRC_OB23_SFT, rt5677_iob_bypass_src); static const struct snd_kcontrol_new rt5677_ob23_bypass_src_mux = - SOC_DAPM_ENUM("OB23 Bypass source", rt5677_ob23_bypass_src_enum); + SOC_DAPM_ENUM("OB23 Bypass Source", rt5677_ob23_bypass_src_enum); static SOC_ENUM_SINGLE_DECL( rt5677_ib01_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL, RT5677_SEL_SRC_IB01_SFT, rt5677_iob_bypass_src); static const struct snd_kcontrol_new rt5677_ib01_bypass_src_mux = - SOC_DAPM_ENUM("IB01 Bypass source", rt5677_ib01_bypass_src_enum); + SOC_DAPM_ENUM("IB01 Bypass Source", rt5677_ib01_bypass_src_enum); static SOC_ENUM_SINGLE_DECL( rt5677_ib23_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL, RT5677_SEL_SRC_IB23_SFT, rt5677_iob_bypass_src); static const struct snd_kcontrol_new rt5677_ib23_bypass_src_mux = - SOC_DAPM_ENUM("IB23 Bypass source", rt5677_ib23_bypass_src_enum); + SOC_DAPM_ENUM("IB23 Bypass Source", rt5677_ib23_bypass_src_enum); static SOC_ENUM_SINGLE_DECL( rt5677_ib45_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL, RT5677_SEL_SRC_IB45_SFT, rt5677_iob_bypass_src); static const struct snd_kcontrol_new rt5677_ib45_bypass_src_mux = - SOC_DAPM_ENUM("IB45 Bypass source", rt5677_ib45_bypass_src_enum); + SOC_DAPM_ENUM("IB45 Bypass Source", rt5677_ib45_bypass_src_enum); /* Stereo ADC Source 2 */ /* MX-27 MX26 MX25 [11:10] */ static const char * const rt5677_stereo_adc2_src[] = { @@ -1102,21 +1089,21 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_STO1_ADC2_SFT, rt5677_stereo_adc2_src); static const struct snd_kcontrol_new rt5677_sto1_adc2_mux = - SOC_DAPM_ENUM("Stereo1 ADC2 source", rt5677_stereo1_adc2_enum); + SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5677_stereo1_adc2_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo2_adc2_enum, RT5677_STO2_ADC_MIXER, RT5677_SEL_STO2_ADC2_SFT, rt5677_stereo_adc2_src); static const struct snd_kcontrol_new rt5677_sto2_adc2_mux = - SOC_DAPM_ENUM("Stereo2 ADC2 source", rt5677_stereo2_adc2_enum); + SOC_DAPM_ENUM("Stereo2 ADC2 Source", rt5677_stereo2_adc2_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo3_adc2_enum, RT5677_STO3_ADC_MIXER, RT5677_SEL_STO3_ADC2_SFT, rt5677_stereo_adc2_src); static const struct snd_kcontrol_new rt5677_sto3_adc2_mux = - SOC_DAPM_ENUM("Stereo3 ADC2 source", rt5677_stereo3_adc2_enum); + SOC_DAPM_ENUM("Stereo3 ADC2 Source", rt5677_stereo3_adc2_enum); /* DMIC Source */ /* MX-28 [9:8][1:0] MX-27 MX-26 MX-25 MX-24 [9:8] */ static const char * const rt5677_dmic_src[] = { @@ -1128,44 +1115,44 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_MONO_DMIC_L_SFT, rt5677_dmic_src); static const struct snd_kcontrol_new rt5677_mono_dmic_l_mux = - SOC_DAPM_ENUM("Mono DMIC L source", rt5677_mono_dmic_l_enum); + SOC_DAPM_ENUM("Mono DMIC L Source", rt5677_mono_dmic_l_enum); static SOC_ENUM_SINGLE_DECL( rt5677_mono_dmic_r_enum, RT5677_MONO_ADC_MIXER, RT5677_SEL_MONO_DMIC_R_SFT, rt5677_dmic_src); static const struct snd_kcontrol_new rt5677_mono_dmic_r_mux = - SOC_DAPM_ENUM("Mono DMIC R source", rt5677_mono_dmic_r_enum); + SOC_DAPM_ENUM("Mono DMIC R Source", rt5677_mono_dmic_r_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo1_dmic_enum, RT5677_STO1_ADC_MIXER, RT5677_SEL_STO1_DMIC_SFT, rt5677_dmic_src); static const struct snd_kcontrol_new rt5677_sto1_dmic_mux = - SOC_DAPM_ENUM("Stereo1 DMIC source", rt5677_stereo1_dmic_enum); + SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5677_stereo1_dmic_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo2_dmic_enum, RT5677_STO2_ADC_MIXER, RT5677_SEL_STO2_DMIC_SFT, rt5677_dmic_src); static const struct snd_kcontrol_new rt5677_sto2_dmic_mux = - SOC_DAPM_ENUM("Stereo2 DMIC source", rt5677_stereo2_dmic_enum); + SOC_DAPM_ENUM("Stereo2 DMIC Source", rt5677_stereo2_dmic_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo3_dmic_enum, RT5677_STO3_ADC_MIXER, RT5677_SEL_STO3_DMIC_SFT, rt5677_dmic_src); static const struct snd_kcontrol_new rt5677_sto3_dmic_mux = - SOC_DAPM_ENUM("Stereo3 DMIC source", rt5677_stereo3_dmic_enum); + SOC_DAPM_ENUM("Stereo3 DMIC Source", rt5677_stereo3_dmic_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo4_dmic_enum, RT5677_STO4_ADC_MIXER, RT5677_SEL_STO4_DMIC_SFT, rt5677_dmic_src); static const struct snd_kcontrol_new rt5677_sto4_dmic_mux = - SOC_DAPM_ENUM("Stereo4 DMIC source", rt5677_stereo4_dmic_enum); + SOC_DAPM_ENUM("Stereo4 DMIC Source", rt5677_stereo4_dmic_enum); -/* Stereo2 ADC source */ /* MX-26 [0] */ +/* Stereo2 ADC Source */ /* MX-26 [0] */ static const char * const rt5677_stereo2_adc_lr_src[] = { "L", "LR" }; @@ -1175,7 +1162,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_STO2_LR_MIX_SFT, rt5677_stereo2_adc_lr_src); static const struct snd_kcontrol_new rt5677_sto2_adc_lr_mux = - SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5677_stereo2_adc_lr_enum); + SOC_DAPM_ENUM("Stereo2 ADC LR Source", rt5677_stereo2_adc_lr_enum); /* Stereo1 ADC Source 1 */ /* MX-27 MX26 MX25 [13:12] */ static const char * const rt5677_stereo_adc1_src[] = { @@ -1187,23 +1174,23 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_STO1_ADC1_SFT, rt5677_stereo_adc1_src); static const struct snd_kcontrol_new rt5677_sto1_adc1_mux = - SOC_DAPM_ENUM("Stereo1 ADC1 source", rt5677_stereo1_adc1_enum); + SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5677_stereo1_adc1_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo2_adc1_enum, RT5677_STO2_ADC_MIXER, RT5677_SEL_STO2_ADC1_SFT, rt5677_stereo_adc1_src); static const struct snd_kcontrol_new rt5677_sto2_adc1_mux = - SOC_DAPM_ENUM("Stereo2 ADC1 source", rt5677_stereo2_adc1_enum); + SOC_DAPM_ENUM("Stereo2 ADC1 Source", rt5677_stereo2_adc1_enum); static SOC_ENUM_SINGLE_DECL( rt5677_stereo3_adc1_enum, RT5677_STO3_ADC_MIXER, RT5677_SEL_STO3_ADC1_SFT, rt5677_stereo_adc1_src); static const struct snd_kcontrol_new rt5677_sto3_adc1_mux = - SOC_DAPM_ENUM("Stereo3 ADC1 source", rt5677_stereo3_adc1_enum); + SOC_DAPM_ENUM("Stereo3 ADC1 Source", rt5677_stereo3_adc1_enum); -/* Mono ADC Left source 2 */ /* MX-28 [11:10] */ +/* Mono ADC Left Source 2 */ /* MX-28 [11:10] */ static const char * const rt5677_mono_adc2_l_src[] = { "DD MIX1L", "DMIC", "MONO DAC MIXL" }; @@ -1213,9 +1200,9 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_MONO_ADC_L2_SFT, rt5677_mono_adc2_l_src); static const struct snd_kcontrol_new rt5677_mono_adc2_l_mux = - SOC_DAPM_ENUM("Mono ADC2 L source", rt5677_mono_adc2_l_enum); + SOC_DAPM_ENUM("Mono ADC2 L Source", rt5677_mono_adc2_l_enum); -/* Mono ADC Left source 1 */ /* MX-28 [13:12] */ +/* Mono ADC Left Source 1 */ /* MX-28 [13:12] */ static const char * const rt5677_mono_adc1_l_src[] = { "DD MIX1L", "ADC1", "MONO DAC MIXL" }; @@ -1225,9 +1212,9 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_MONO_ADC_L1_SFT, rt5677_mono_adc1_l_src); static const struct snd_kcontrol_new rt5677_mono_adc1_l_mux = - SOC_DAPM_ENUM("Mono ADC1 L source", rt5677_mono_adc1_l_enum); + SOC_DAPM_ENUM("Mono ADC1 L Source", rt5677_mono_adc1_l_enum); -/* Mono ADC Right source 2 */ /* MX-28 [3:2] */ +/* Mono ADC Right Source 2 */ /* MX-28 [3:2] */ static const char * const rt5677_mono_adc2_r_src[] = { "DD MIX1R", "DMIC", "MONO DAC MIXR" }; @@ -1237,9 +1224,9 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_MONO_ADC_R2_SFT, rt5677_mono_adc2_r_src); static const struct snd_kcontrol_new rt5677_mono_adc2_r_mux = - SOC_DAPM_ENUM("Mono ADC2 R source", rt5677_mono_adc2_r_enum); + SOC_DAPM_ENUM("Mono ADC2 R Source", rt5677_mono_adc2_r_enum); -/* Mono ADC Right source 1 */ /* MX-28 [5:4] */ +/* Mono ADC Right Source 1 */ /* MX-28 [5:4] */ static const char * const rt5677_mono_adc1_r_src[] = { "DD MIX1R", "ADC2", "MONO DAC MIXR" }; @@ -1249,7 +1236,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_MONO_ADC_R1_SFT, rt5677_mono_adc1_r_src); static const struct snd_kcontrol_new rt5677_mono_adc1_r_mux = - SOC_DAPM_ENUM("Mono ADC1 R source", rt5677_mono_adc1_r_enum); + SOC_DAPM_ENUM("Mono ADC1 R Source", rt5677_mono_adc1_r_enum); /* Stereo4 ADC Source 2 */ /* MX-24 [11:10] */ static const char * const rt5677_stereo4_adc2_src[] = { @@ -1261,7 +1248,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_STO4_ADC2_SFT, rt5677_stereo4_adc2_src); static const struct snd_kcontrol_new rt5677_sto4_adc2_mux = - SOC_DAPM_ENUM("Stereo4 ADC2 source", rt5677_stereo4_adc2_enum); + SOC_DAPM_ENUM("Stereo4 ADC2 Source", rt5677_stereo4_adc2_enum); /* Stereo4 ADC Source 1 */ /* MX-24 [13:12] */ @@ -1274,7 +1261,7 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_STO4_ADC1_SFT, rt5677_stereo4_adc1_src); static const struct snd_kcontrol_new rt5677_sto4_adc1_mux = - SOC_DAPM_ENUM("Stereo4 ADC1 source", rt5677_stereo4_adc1_enum); + SOC_DAPM_ENUM("Stereo4 ADC1 Source", rt5677_stereo4_adc1_enum); /* InBound0/1 Source */ /* MX-A3 [14:12] */ static const char * const rt5677_inbound01_src[] = { @@ -1416,7 +1403,7 @@ static SOC_ENUM_SINGLE_DECL( static const struct snd_kcontrol_new rt5677_dac3_mux = SOC_DAPM_ENUM("Analog DAC3 Source", rt5677_dac3_enum); -/* PDM channel source */ /* MX-31 [13:12][9:8][5:4][1:0] */ +/* PDM channel Source */ /* MX-31 [13:12][9:8][5:4][1:0] */ static const char * const rt5677_pdm_src[] = { "STO1 DAC MIX", "MONO DAC MIX", "DD MIX1", "DD MIX2" }; @@ -1426,28 +1413,28 @@ static SOC_ENUM_SINGLE_DECL( RT5677_SEL_PDM1_L_SFT, rt5677_pdm_src); static const struct snd_kcontrol_new rt5677_pdm1_l_mux = - SOC_DAPM_ENUM("PDM1 source", rt5677_pdm1_l_enum); + SOC_DAPM_ENUM("PDM1 Source", rt5677_pdm1_l_enum); static SOC_ENUM_SINGLE_DECL( rt5677_pdm2_l_enum, RT5677_PDM_OUT_CTRL, RT5677_SEL_PDM2_L_SFT, rt5677_pdm_src); static const struct snd_kcontrol_new rt5677_pdm2_l_mux = - SOC_DAPM_ENUM("PDM2 source", rt5677_pdm2_l_enum); + SOC_DAPM_ENUM("PDM2 Source", rt5677_pdm2_l_enum); static SOC_ENUM_SINGLE_DECL( rt5677_pdm1_r_enum, RT5677_PDM_OUT_CTRL, RT5677_SEL_PDM1_R_SFT, rt5677_pdm_src); static const struct snd_kcontrol_new rt5677_pdm1_r_mux = - SOC_DAPM_ENUM("PDM1 source", rt5677_pdm1_r_enum); + SOC_DAPM_ENUM("PDM1 Source", rt5677_pdm1_r_enum); static SOC_ENUM_SINGLE_DECL( rt5677_pdm2_r_enum, RT5677_PDM_OUT_CTRL, RT5677_SEL_PDM2_R_SFT, rt5677_pdm_src); static const struct snd_kcontrol_new rt5677_pdm2_r_mux = - SOC_DAPM_ENUM("PDM2 source", rt5677_pdm2_r_enum); + SOC_DAPM_ENUM("PDM2 Source", rt5677_pdm2_r_enum); /* TDM IF1/2 SLB ADC1 Data Selection */ /* MX-3C MX-41 [5:4] MX-08 [1:0]*/ static const char * const rt5677_if12_adc1_src[] = { @@ -1459,21 +1446,21 @@ static SOC_ENUM_SINGLE_DECL( RT5677_IF1_ADC1_SFT, rt5677_if12_adc1_src); static const struct snd_kcontrol_new rt5677_if1_adc1_mux = - SOC_DAPM_ENUM("IF1 ADC1 source", rt5677_if1_adc1_enum); + SOC_DAPM_ENUM("IF1 ADC1 Source", rt5677_if1_adc1_enum); static SOC_ENUM_SINGLE_DECL( rt5677_if2_adc1_enum, RT5677_TDM2_CTRL2, RT5677_IF2_ADC1_SFT, rt5677_if12_adc1_src); static const struct snd_kcontrol_new rt5677_if2_adc1_mux = - SOC_DAPM_ENUM("IF2 ADC1 source", rt5677_if2_adc1_enum); + SOC_DAPM_ENUM("IF2 ADC1 Source", rt5677_if2_adc1_enum); static SOC_ENUM_SINGLE_DECL( rt5677_slb_adc1_enum, RT5677_SLIMBUS_RX, RT5677_SLB_ADC1_SFT, rt5677_if12_adc1_src); static const struct snd_kcontrol_new rt5677_slb_adc1_mux = - SOC_DAPM_ENUM("SLB ADC1 source", rt5677_slb_adc1_enum); + SOC_DAPM_ENUM("SLB ADC1 Source", rt5677_slb_adc1_enum); /* TDM IF1/2 SLB ADC2 Data Selection */ /* MX-3C MX-41 [7:6] MX-08 [3:2] */ static const char * const rt5677_if12_adc2_src[] = { @@ -1485,21 +1472,21 @@ static SOC_ENUM_SINGLE_DECL( RT5677_IF1_ADC2_SFT, rt5677_if12_adc2_src); static const struct snd_kcontrol_new rt5677_if1_adc2_mux = - SOC_DAPM_ENUM("IF1 ADC2 source", rt5677_if1_adc2_enum); + SOC_DAPM_ENUM("IF1 ADC2 Source", rt5677_if1_adc2_enum); static SOC_ENUM_SINGLE_DECL( rt5677_if2_adc2_enum, RT5677_TDM2_CTRL2, RT5677_IF2_ADC2_SFT, rt5677_if12_adc2_src); static const struct snd_kcontrol_new rt5677_if2_adc2_mux = - SOC_DAPM_ENUM("IF2 ADC2 source", rt5677_if2_adc2_enum); + SOC_DAPM_ENUM("IF2 ADC2 Source", rt5677_if2_adc2_enum); static SOC_ENUM_SINGLE_DECL( rt5677_slb_adc2_enum, RT5677_SLIMBUS_RX, RT5677_SLB_ADC2_SFT, rt5677_if12_adc2_src); static const struct snd_kcontrol_new rt5677_slb_adc2_mux = - SOC_DAPM_ENUM("SLB ADC2 source", rt5677_slb_adc2_enum); + SOC_DAPM_ENUM("SLB ADC2 Source", rt5677_slb_adc2_enum); /* TDM IF1/2 SLB ADC3 Data Selection */ /* MX-3C MX-41 [9:8] MX-08 [5:4] */ static const char * const rt5677_if12_adc3_src[] = { @@ -1511,21 +1498,21 @@ static SOC_ENUM_SINGLE_DECL( RT5677_IF1_ADC3_SFT, rt5677_if12_adc3_src); static const struct snd_kcontrol_new rt5677_if1_adc3_mux = - SOC_DAPM_ENUM("IF1 ADC3 source", rt5677_if1_adc3_enum); + SOC_DAPM_ENUM("IF1 ADC3 Source", rt5677_if1_adc3_enum); static SOC_ENUM_SINGLE_DECL( rt5677_if2_adc3_enum, RT5677_TDM2_CTRL2, RT5677_IF2_ADC3_SFT, rt5677_if12_adc3_src); static const struct snd_kcontrol_new rt5677_if2_adc3_mux = - SOC_DAPM_ENUM("IF2 ADC3 source", rt5677_if2_adc3_enum); + SOC_DAPM_ENUM("IF2 ADC3 Source", rt5677_if2_adc3_enum); static SOC_ENUM_SINGLE_DECL( rt5677_slb_adc3_enum, RT5677_SLIMBUS_RX, RT5677_SLB_ADC3_SFT, rt5677_if12_adc3_src); static const struct snd_kcontrol_new rt5677_slb_adc3_mux = - SOC_DAPM_ENUM("SLB ADC3 source", rt5677_slb_adc3_enum); + SOC_DAPM_ENUM("SLB ADC3 Source", rt5677_slb_adc3_enum); /* TDM IF1/2 SLB ADC4 Data Selection */ /* MX-3C MX-41 [11:10] MX-08 [7:6] */ static const char * const rt5677_if12_adc4_src[] = { @@ -1537,21 +1524,21 @@ static SOC_ENUM_SINGLE_DECL( RT5677_IF1_ADC4_SFT, rt5677_if12_adc4_src); static const struct snd_kcontrol_new rt5677_if1_adc4_mux = - SOC_DAPM_ENUM("IF1 ADC4 source", rt5677_if1_adc4_enum); + SOC_DAPM_ENUM("IF1 ADC4 Source", rt5677_if1_adc4_enum); static SOC_ENUM_SINGLE_DECL( rt5677_if2_adc4_enum, RT5677_TDM2_CTRL2, RT5677_IF2_ADC4_SFT, rt5677_if12_adc4_src); static const struct snd_kcontrol_new rt5677_if2_adc4_mux = - SOC_DAPM_ENUM("IF2 ADC4 source", rt5677_if2_adc4_enum); + SOC_DAPM_ENUM("IF2 ADC4 Source", rt5677_if2_adc4_enum); static SOC_ENUM_SINGLE_DECL( rt5677_slb_adc4_enum, RT5677_SLIMBUS_RX, RT5677_SLB_ADC4_SFT, rt5677_if12_adc4_src); static const struct snd_kcontrol_new rt5677_slb_adc4_mux = - SOC_DAPM_ENUM("SLB ADC4 source", rt5677_slb_adc4_enum); + SOC_DAPM_ENUM("SLB ADC4 Source", rt5677_slb_adc4_enum); /* Interface3/4 ADC Data Input */ /* MX-2F [3:0] MX-30 [7:4]*/ static const char * const rt5677_if34_adc_src[] = { @@ -1564,14 +1551,14 @@ static SOC_ENUM_SINGLE_DECL( RT5677_IF3_ADC_IN_SFT, rt5677_if34_adc_src); static const struct snd_kcontrol_new rt5677_if3_adc_mux = - SOC_DAPM_ENUM("IF3 ADC source", rt5677_if3_adc_enum); + SOC_DAPM_ENUM("IF3 ADC Source", rt5677_if3_adc_enum); static SOC_ENUM_SINGLE_DECL( rt5677_if4_adc_enum, RT5677_IF4_DATA, RT5677_IF4_ADC_IN_SFT, rt5677_if34_adc_src); static const struct snd_kcontrol_new rt5677_if4_adc_mux = - SOC_DAPM_ENUM("IF4 ADC source", rt5677_if4_adc_enum); + SOC_DAPM_ENUM("IF4 ADC Source", rt5677_if4_adc_enum); static int rt5677_bst1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -1670,6 +1657,13 @@ static int rt5677_set_micbias1_event(struct snd_soc_dapm_widget *w, RT5677_PWR_CLK_MB, RT5677_PWR_CLK_MB1 | RT5677_PWR_PP_MB1 | RT5677_PWR_CLK_MB); break; + + case SND_SOC_DAPM_PRE_PMD: + regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, + RT5677_PWR_CLK_MB1 | RT5677_PWR_PP_MB1 | + RT5677_PWR_CLK_MB, 0); + break; + default: return 0; } @@ -1685,8 +1679,9 @@ static const struct snd_soc_dapm_widget rt5677_dapm_widgets[] = { /* Input Side */ /* micbias */ - SND_SOC_DAPM_SUPPLY("micbias1", RT5677_PWR_ANLG2, RT5677_PWR_MB1_BIT, - 0, rt5677_set_micbias1_event, SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5677_PWR_ANLG2, RT5677_PWR_MB1_BIT, + 0, rt5677_set_micbias1_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU), /* Input Lines */ SND_SOC_DAPM_INPUT("DMIC L1"), @@ -2798,21 +2793,6 @@ static const struct snd_soc_dapm_route rt5677_dapm_routes[] = { { "PDM2R", NULL, "PDM2 R Mux" }, }; -static int get_clk_info(int sclk, int rate) -{ - int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16}; - - if (sclk <= 0 || rate <= 0) - return -EINVAL; - - rate = rate << 8; - for (i = 0; i < ARRAY_SIZE(pd); i++) - if (sclk == rate * pd[i]) - return i; - - return -EINVAL; -} - static int rt5677_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { @@ -2822,7 +2802,7 @@ static int rt5677_hw_params(struct snd_pcm_substream *substream, int pre_div, bclk_ms, frame_size; rt5677->lrck[dai->id] = params_rate(params); - pre_div = get_clk_info(rt5677->sysclk, rt5677->lrck[dai->id]); + pre_div = rl6231_get_clk_info(rt5677->sysclk, rt5677->lrck[dai->id]); if (pre_div < 0) { dev_err(codec->dev, "Unsupported clock setting\n"); return -EINVAL; @@ -3016,62 +2996,12 @@ static int rt5677_set_dai_sysclk(struct snd_soc_dai *dai, * Returns 0 for success or negative error code. */ static int rt5677_pll_calc(const unsigned int freq_in, - const unsigned int freq_out, struct rt5677_pll_code *pll_code) + const unsigned int freq_out, struct rl6231_pll_code *pll_code) { - int max_n = RT5677_PLL_N_MAX, max_m = RT5677_PLL_M_MAX; - int k, red, n_t, pll_out, in_t; - int n = 0, m = 0, m_t = 0; - int out_t, red_t = abs(freq_out - freq_in); - bool m_bp = false, k_bp = false; - - if (RT5677_PLL_INP_MAX < freq_in || RT5677_PLL_INP_MIN > freq_in) + if (RT5677_PLL_INP_MIN > freq_in) return -EINVAL; - k = 100000000 / freq_out - 2; - if (k > RT5677_PLL_K_MAX) - k = RT5677_PLL_K_MAX; - for (n_t = 0; n_t <= max_n; n_t++) { - in_t = freq_in / (k + 2); - pll_out = freq_out / (n_t + 2); - if (in_t < 0) - continue; - if (in_t == pll_out) { - m_bp = true; - n = n_t; - goto code_find; - } - red = abs(in_t - pll_out); - if (red < red_t) { - m_bp = true; - n = n_t; - m = m_t; - if (red == 0) - goto code_find; - red_t = red; - } - for (m_t = 0; m_t <= max_m; m_t++) { - out_t = in_t / (m_t + 2); - red = abs(out_t - pll_out); - if (red < red_t) { - m_bp = false; - n = n_t; - m = m_t; - if (red == 0) - goto code_find; - red_t = red; - } - } - } - pr_debug("Only get approximation about PLL\n"); - -code_find: - - pll_code->m_bp = m_bp; - pll_code->k_bp = k_bp; - pll_code->m_code = m; - pll_code->n_code = n; - pll_code->k_code = k; - return 0; + return rl6231_pll_calc(freq_in, freq_out, pll_code); } static int rt5677_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, @@ -3079,7 +3009,7 @@ static int rt5677_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, { struct snd_soc_codec *codec = dai->codec; struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); - struct rt5677_pll_code pll_code; + struct rl6231_pll_code pll_code; int ret; if (source == rt5677->pll_src && freq_in == rt5677->pll_in && @@ -3137,15 +3067,12 @@ static int rt5677_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, return ret; } - dev_dbg(codec->dev, "m_bypass=%d k_bypass=%d m=%d n=%d k=%d\n", - pll_code.m_bp, pll_code.k_bp, - (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code, - (pll_code.k_bp ? 0 : pll_code.k_code)); + dev_dbg(codec->dev, "m_bypass=%d m=%d n=%d k=%d\n", + pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), + pll_code.n_code, pll_code.k_code); regmap_write(rt5677->regmap, RT5677_PLL1_CTRL1, - pll_code.n_code << RT5677_PLL_N_SFT | - pll_code.k_bp << RT5677_PLL_K_BP_SFT | - (pll_code.k_bp ? 0 : pll_code.k_code)); + pll_code.n_code << RT5677_PLL_N_SFT | pll_code.k_code); regmap_write(rt5677->regmap, RT5677_PLL1_CTRL2, (pll_code.m_bp ? 0 : pll_code.m_code) << RT5677_PLL_M_SFT | pll_code.m_bp << RT5677_PLL_M_BP_SFT); @@ -3197,7 +3124,7 @@ static int rt5677_set_bias_level(struct snd_soc_codec *codec, regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0); regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000); regmap_write(rt5677->regmap, RT5677_PWR_DIG2, 0x0000); - regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, 0x0000); + regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, 0x0022); regmap_write(rt5677->regmap, RT5677_PWR_ANLG2, 0x0000); regmap_update_bits(rt5677->regmap, RT5677_PR_BASE + RT5677_BIAS_CUR4, 0x0f00, 0x0000); @@ -3454,14 +3381,8 @@ static int rt5677_i2c_probe(struct i2c_client *i2c, regmap_update_bits(rt5677->regmap, RT5677_IN1, RT5677_IN_DF2, RT5677_IN_DF2); - ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5677, - rt5677_dai, ARRAY_SIZE(rt5677_dai)); - if (ret < 0) - goto err; - - return 0; -err: - return ret; + return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5677, + rt5677_dai, ARRAY_SIZE(rt5677_dai)); } static int rt5677_i2c_remove(struct i2c_client *i2c) @@ -3480,18 +3401,7 @@ static struct i2c_driver rt5677_i2c_driver = { .remove = rt5677_i2c_remove, .id_table = rt5677_i2c_id, }; - -static int __init rt5677_modinit(void) -{ - return i2c_add_driver(&rt5677_i2c_driver); -} -module_init(rt5677_modinit); - -static void __exit rt5677_modexit(void) -{ - i2c_del_driver(&rt5677_i2c_driver); -} -module_exit(rt5677_modexit); +module_i2c_driver(rt5677_i2c_driver); MODULE_DESCRIPTION("ASoC RT5677 driver"); MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h index af4e9c797408..863393e62096 100644 --- a/sound/soc/codecs/rt5677.h +++ b/sound/soc/codecs/rt5677.h @@ -1393,13 +1393,6 @@ #define RT5677_DSP_IB_9_L (0x1 << 1) #define RT5677_DSP_IB_9_L_SFT 1 -/* Debug String Length */ -#define RT5677_REG_DISP_LEN 23 - -#define RT5677_NO_JACK BIT(0) -#define RT5677_HEADSET_DET BIT(1) -#define RT5677_HEADPHO_DET BIT(2) - /* System Clock Source */ enum { RT5677_SCLK_S_MCLK, @@ -1425,14 +1418,6 @@ enum { RT5677_AIFS, }; -struct rt5677_pll_code { - bool m_bp; /* Indicates bypass m code or not. */ - bool k_bp; /* Indicates bypass k code or not. */ - int m_code; - int n_code; - int k_code; -}; - struct rt5677_priv { struct snd_soc_codec *codec; struct rt5677_platform_data pdata; diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 3d39f0b5b4a8..e997d271728d 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -724,25 +724,25 @@ static int sgtl5000_pcm_hw_params(struct snd_pcm_substream *substream, return ret; /* set i2s data format */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: if (sgtl5000->fmt == SND_SOC_DAIFMT_RIGHT_J) return -EINVAL; i2s_ctl |= SGTL5000_I2S_DLEN_16 << SGTL5000_I2S_DLEN_SHIFT; i2s_ctl |= SGTL5000_I2S_SCLKFREQ_32FS << SGTL5000_I2S_SCLKFREQ_SHIFT; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: i2s_ctl |= SGTL5000_I2S_DLEN_20 << SGTL5000_I2S_DLEN_SHIFT; i2s_ctl |= SGTL5000_I2S_SCLKFREQ_64FS << SGTL5000_I2S_SCLKFREQ_SHIFT; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: i2s_ctl |= SGTL5000_I2S_DLEN_24 << SGTL5000_I2S_DLEN_SHIFT; i2s_ctl |= SGTL5000_I2S_SCLKFREQ_64FS << SGTL5000_I2S_SCLKFREQ_SHIFT; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: if (sgtl5000->fmt == SND_SOC_DAIFMT_RIGHT_J) return -EINVAL; i2s_ctl |= SGTL5000_I2S_DLEN_32 << SGTL5000_I2S_DLEN_SHIFT; @@ -843,10 +843,8 @@ static int ldo_regulator_register(struct snd_soc_codec *codec, ldo = kzalloc(sizeof(struct ldo_regulator), GFP_KERNEL); - if (!ldo) { - dev_err(codec->dev, "failed to allocate ldo_regulator\n"); + if (!ldo) return -ENOMEM; - } ldo->desc.name = kstrdup(dev_name(codec->dev), GFP_KERNEL); if (!ldo->desc.name) { @@ -1277,7 +1275,7 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) return ret; } - ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies), + ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies), sgtl5000->supplies); if (ret) goto err_ldo_remove; @@ -1285,13 +1283,16 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) ret = regulator_bulk_enable(ARRAY_SIZE(sgtl5000->supplies), sgtl5000->supplies); if (ret) - goto err_ldo_remove; + goto err_regulator_free; /* wait for all power rails bring up */ udelay(10); return 0; +err_regulator_free: + regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies), + sgtl5000->supplies); err_ldo_remove: if (!external_vddd) ldo_regulator_remove(codec); @@ -1361,6 +1362,8 @@ static int sgtl5000_probe(struct snd_soc_codec *codec) err: regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies), sgtl5000->supplies); + regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies), + sgtl5000->supplies); ldo_regulator_remove(codec); return ret; @@ -1374,6 +1377,8 @@ static int sgtl5000_remove(struct snd_soc_codec *codec) regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies), sgtl5000->supplies); + regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies), + sgtl5000->supplies); ldo_regulator_remove(codec); return 0; diff --git a/sound/soc/codecs/si476x.c b/sound/soc/codecs/si476x.c index f26befb0c297..cdf882fa7716 100644 --- a/sound/soc/codecs/si476x.c +++ b/sound/soc/codecs/si476x.c @@ -167,17 +167,17 @@ static int si476x_codec_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S8: + switch (params_width(params)) { + case 8: width = SI476X_PCM_FORMAT_S8; break; - case SNDRV_PCM_FORMAT_S16_LE: + case 16: width = SI476X_PCM_FORMAT_S16_LE; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: width = SI476X_PCM_FORMAT_S20_3LE; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: width = SI476X_PCM_FORMAT_S24_LE; break; default: diff --git a/sound/soc/codecs/sirf-audio-codec.c b/sound/soc/codecs/sirf-audio-codec.c index d90cb0fafcb2..06ba4923fd5a 100644 --- a/sound/soc/codecs/sirf-audio-codec.c +++ b/sound/soc/codecs/sirf-audio-codec.c @@ -471,8 +471,8 @@ static int sirf_audio_codec_driver_probe(struct platform_device *pdev) mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(&pdev->dev, mem_res); - if (base == NULL) - return -ENOMEM; + if (IS_ERR(base)) + return PTR_ERR(base); sirf_audio_codec->regmap = devm_regmap_init_mmio(&pdev->dev, base, &sirf_audio_codec_regmap_config); diff --git a/sound/soc/codecs/sn95031.c b/sound/soc/codecs/sn95031.c index 42dff26b3a2a..cf8fa40662f0 100644 --- a/sound/soc/codecs/sn95031.c +++ b/sound/soc/codecs/sn95031.c @@ -661,12 +661,12 @@ static int sn95031_pcm_hw_params(struct snd_pcm_substream *substream, { unsigned int format, rate; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: format = BIT(4)|BIT(5); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: format = 0; break; default: diff --git a/sound/soc/codecs/spdif_transmitter.c b/sound/soc/codecs/spdif_transmitter.c index a078aa31052a..e0df537dd4b7 100644 --- a/sound/soc/codecs/spdif_transmitter.c +++ b/sound/soc/codecs/spdif_transmitter.c @@ -24,7 +24,7 @@ #define DRV_NAME "spdif-dit" -#define STUB_RATES SNDRV_PCM_RATE_8000_96000 +#define STUB_RATES SNDRV_PCM_RATE_8000_192000 #define STUB_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ SNDRV_PCM_FMTBIT_S20_3LE | \ SNDRV_PCM_FMTBIT_S24_LE) diff --git a/sound/soc/codecs/ssm2518.c b/sound/soc/codecs/ssm2518.c index 56adb3e2def9..e8680bea5f86 100644 --- a/sound/soc/codecs/ssm2518.c +++ b/sound/soc/codecs/ssm2518.c @@ -361,11 +361,11 @@ static int ssm2518_hw_params(struct snd_pcm_substream *substream, return -EINVAL; if (ssm2518->right_j) { - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_16BIT; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_24BIT; break; default: diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c index 97b0454eb346..484b3bbe8624 100644 --- a/sound/soc/codecs/ssm2602.c +++ b/sound/soc/codecs/ssm2602.c @@ -275,17 +275,17 @@ static int ssm2602_hw_params(struct snd_pcm_substream *substream, regmap_write(ssm2602->regmap, SSM2602_SRATE, srate); /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: iface = 0x0; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface = 0x4; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface = 0x8; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface = 0xc; break; default: diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c index 0579d187135b..48740855566d 100644 --- a/sound/soc/codecs/sta32x.c +++ b/sound/soc/codecs/sta32x.c @@ -678,15 +678,11 @@ static int sta32x_hw_params(struct snd_pcm_substream *substream, confb = snd_soc_read(codec, STA32X_CONFB); confb &= ~(STA32X_CONFB_SAI_MASK | STA32X_CONFB_SAIFB); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S24_LE: - case SNDRV_PCM_FORMAT_S24_BE: - case SNDRV_PCM_FORMAT_S24_3LE: - case SNDRV_PCM_FORMAT_S24_3BE: + switch (params_width(params)) { + case 24: pr_debug("24bit\n"); /* fall through */ - case SNDRV_PCM_FORMAT_S32_LE: - case SNDRV_PCM_FORMAT_S32_BE: + case 32: pr_debug("24bit or 32bit\n"); switch (sta32x->format) { case SND_SOC_DAIFMT_I2S: @@ -701,8 +697,7 @@ static int sta32x_hw_params(struct snd_pcm_substream *substream, } break; - case SNDRV_PCM_FORMAT_S20_3LE: - case SNDRV_PCM_FORMAT_S20_3BE: + case 20: pr_debug("20bit\n"); switch (sta32x->format) { case SND_SOC_DAIFMT_I2S: @@ -717,8 +712,7 @@ static int sta32x_hw_params(struct snd_pcm_substream *substream, } break; - case SNDRV_PCM_FORMAT_S18_3LE: - case SNDRV_PCM_FORMAT_S18_3BE: + case 18: pr_debug("18bit\n"); switch (sta32x->format) { case SND_SOC_DAIFMT_I2S: @@ -733,8 +727,7 @@ static int sta32x_hw_params(struct snd_pcm_substream *substream, } break; - case SNDRV_PCM_FORMAT_S16_LE: - case SNDRV_PCM_FORMAT_S16_BE: + case 16: pr_debug("16bit\n"); switch (sta32x->format) { case SND_SOC_DAIFMT_I2S: diff --git a/sound/soc/codecs/sta529.c b/sound/soc/codecs/sta529.c index a40c4b0196a3..9aa1323fb2ab 100644 --- a/sound/soc/codecs/sta529.c +++ b/sound/soc/codecs/sta529.c @@ -197,16 +197,16 @@ static int sta529_hw_params(struct snd_pcm_substream *substream, int pdata, play_freq_val, record_freq_val; int bclk_to_fs_ratio; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: pdata = 1; bclk_to_fs_ratio = 0; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: pdata = 2; bclk_to_fs_ratio = 1; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: pdata = 3; bclk_to_fs_ratio = 2; break; @@ -380,10 +380,8 @@ static int sta529_i2c_probe(struct i2c_client *i2c, return -EINVAL; sta529 = devm_kzalloc(&i2c->dev, sizeof(struct sta529), GFP_KERNEL); - if (sta529 == NULL) { - dev_err(&i2c->dev, "Can not allocate memory\n"); + if (!sta529) return -ENOMEM; - } sta529->regmap = devm_regmap_init_i2c(i2c, &sta529_regmap); if (IS_ERR(sta529->regmap)) { diff --git a/sound/soc/codecs/tas2552.c b/sound/soc/codecs/tas2552.c new file mode 100644 index 000000000000..23b32960ff1d --- /dev/null +++ b/sound/soc/codecs/tas2552.c @@ -0,0 +1,544 @@ +/* + * tas2552.c - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier + * + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * + * Author: Dan Murphy <dmurphy@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <linux/module.h> +#include <linux/errno.h> +#include <linux/device.h> +#include <linux/i2c.h> +#include <linux/gpio.h> +#include <linux/of_gpio.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <linux/slab.h> + +#include <linux/gpio/consumer.h> +#include <linux/regulator/consumer.h> + +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/tlv.h> +#include <sound/tas2552-plat.h> + +#include "tas2552.h" + +static struct reg_default tas2552_reg_defs[] = { + {TAS2552_CFG_1, 0x22}, + {TAS2552_CFG_3, 0x80}, + {TAS2552_DOUT, 0x00}, + {TAS2552_OUTPUT_DATA, 0xc0}, + {TAS2552_PDM_CFG, 0x01}, + {TAS2552_PGA_GAIN, 0x00}, + {TAS2552_BOOST_PT_CTRL, 0x0f}, + {TAS2552_RESERVED_0D, 0x00}, + {TAS2552_LIMIT_RATE_HYS, 0x08}, + {TAS2552_CFG_2, 0xef}, + {TAS2552_SER_CTRL_1, 0x00}, + {TAS2552_SER_CTRL_2, 0x00}, + {TAS2552_PLL_CTRL_1, 0x10}, + {TAS2552_PLL_CTRL_2, 0x00}, + {TAS2552_PLL_CTRL_3, 0x00}, + {TAS2552_BTIP, 0x8f}, + {TAS2552_BTS_CTRL, 0x80}, + {TAS2552_LIMIT_RELEASE, 0x04}, + {TAS2552_LIMIT_INT_COUNT, 0x00}, + {TAS2552_EDGE_RATE_CTRL, 0x40}, + {TAS2552_VBAT_DATA, 0x00}, +}; + +#define TAS2552_NUM_SUPPLIES 3 +static const char *tas2552_supply_names[TAS2552_NUM_SUPPLIES] = { + "vbat", /* vbat voltage */ + "iovdd", /* I/O Voltage */ + "avdd", /* Analog DAC Voltage */ +}; + +struct tas2552_data { + struct snd_soc_codec *codec; + struct regmap *regmap; + struct i2c_client *tas2552_client; + struct regulator_bulk_data supplies[TAS2552_NUM_SUPPLIES]; + struct gpio_desc *enable_gpio; + unsigned char regs[TAS2552_VBAT_DATA]; + unsigned int mclk; +}; + +static void tas2552_sw_shutdown(struct tas2552_data *tas_data, int sw_shutdown) +{ + u8 cfg1_reg; + + if (sw_shutdown) + cfg1_reg = 0; + else + cfg1_reg = TAS2552_SWS_MASK; + + snd_soc_update_bits(tas_data->codec, TAS2552_CFG_1, + TAS2552_SWS_MASK, cfg1_reg); +} + +static int tas2552_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev); + int sample_rate, pll_clk; + int d; + u8 p, j; + + /* Turn on Class D amplifier */ + snd_soc_update_bits(codec, TAS2552_CFG_2, TAS2552_CLASSD_EN_MASK, + TAS2552_CLASSD_EN); + + if (!tas2552->mclk) + return -EINVAL; + + snd_soc_update_bits(codec, TAS2552_CFG_2, TAS2552_PLL_ENABLE, 0); + + if (tas2552->mclk == TAS2552_245MHZ_CLK || + tas2552->mclk == TAS2552_225MHZ_CLK) { + /* By pass the PLL configuration */ + snd_soc_update_bits(codec, TAS2552_PLL_CTRL_2, + TAS2552_PLL_BYPASS_MASK, + TAS2552_PLL_BYPASS); + } else { + /* Fill in the PLL control registers for J & D + * PLL_CLK = (.5 * freq * J.D) / 2^p + * Need to fill in J and D here based on incoming freq + */ + p = snd_soc_read(codec, TAS2552_PLL_CTRL_1); + p = (p >> 7); + sample_rate = params_rate(params); + + if (sample_rate == 48000) + pll_clk = TAS2552_245MHZ_CLK; + else if (sample_rate == 44100) + pll_clk = TAS2552_225MHZ_CLK; + else { + dev_vdbg(codec->dev, "Substream sample rate is not found %i\n", + params_rate(params)); + return -EINVAL; + } + + j = (pll_clk * 2 * (1 << p)) / tas2552->mclk; + d = (pll_clk * 2 * (1 << p)) % tas2552->mclk; + + snd_soc_update_bits(codec, TAS2552_PLL_CTRL_1, + TAS2552_PLL_J_MASK, j); + snd_soc_write(codec, TAS2552_PLL_CTRL_2, + (d >> 7) & TAS2552_PLL_D_UPPER_MASK); + snd_soc_write(codec, TAS2552_PLL_CTRL_3, + d & TAS2552_PLL_D_LOWER_MASK); + + } + + snd_soc_update_bits(codec, TAS2552_CFG_2, TAS2552_PLL_ENABLE, + TAS2552_PLL_ENABLE); + + return 0; +} + +static int tas2552_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + u8 serial_format; + u8 serial_control_mask; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + serial_format = 0x00; + break; + case SND_SOC_DAIFMT_CBS_CFM: + serial_format = TAS2552_WORD_CLK_MASK; + break; + case SND_SOC_DAIFMT_CBM_CFS: + serial_format = TAS2552_BIT_CLK_MASK; + break; + case SND_SOC_DAIFMT_CBM_CFM: + serial_format = (TAS2552_BIT_CLK_MASK | TAS2552_WORD_CLK_MASK); + break; + default: + dev_vdbg(codec->dev, "DAI Format master is not found\n"); + return -EINVAL; + } + + serial_control_mask = TAS2552_BIT_CLK_MASK | TAS2552_WORD_CLK_MASK; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + serial_format &= TAS2552_DAIFMT_I2S_MASK; + break; + case SND_SOC_DAIFMT_DSP_A: + serial_format |= TAS2552_DAIFMT_DSP; + break; + case SND_SOC_DAIFMT_RIGHT_J: + serial_format |= TAS2552_DAIFMT_RIGHT_J; + break; + case SND_SOC_DAIFMT_LEFT_J: + serial_format |= TAS2552_DAIFMT_LEFT_J; + break; + default: + dev_vdbg(codec->dev, "DAI Format is not found\n"); + return -EINVAL; + } + + if (fmt & SND_SOC_DAIFMT_FORMAT_MASK) + serial_control_mask |= TAS2552_DATA_FORMAT_MASK; + + snd_soc_update_bits(codec, TAS2552_SER_CTRL_1, serial_control_mask, + serial_format); + + return 0; +} + +static int tas2552_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, + unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct tas2552_data *tas2552 = dev_get_drvdata(codec->dev); + + tas2552->mclk = freq; + + return 0; +} + +static int tas2552_mute(struct snd_soc_dai *dai, int mute) +{ + u8 cfg1_reg; + struct snd_soc_codec *codec = dai->codec; + + if (mute) + cfg1_reg = TAS2552_MUTE_MASK; + else + cfg1_reg = ~TAS2552_MUTE_MASK; + + snd_soc_update_bits(codec, TAS2552_CFG_1, TAS2552_MUTE_MASK, cfg1_reg); + + return 0; +} + +#ifdef CONFIG_PM_RUNTIME +static int tas2552_runtime_suspend(struct device *dev) +{ + struct tas2552_data *tas2552 = dev_get_drvdata(dev); + + tas2552_sw_shutdown(tas2552, 0); + + regcache_cache_only(tas2552->regmap, true); + regcache_mark_dirty(tas2552->regmap); + + if (tas2552->enable_gpio) + gpiod_set_value(tas2552->enable_gpio, 0); + + return 0; +} + +static int tas2552_runtime_resume(struct device *dev) +{ + struct tas2552_data *tas2552 = dev_get_drvdata(dev); + + if (tas2552->enable_gpio) + gpiod_set_value(tas2552->enable_gpio, 1); + + tas2552_sw_shutdown(tas2552, 1); + + regcache_cache_only(tas2552->regmap, false); + regcache_sync(tas2552->regmap); + + return 0; +} +#endif + +static const struct dev_pm_ops tas2552_pm = { + SET_RUNTIME_PM_OPS(tas2552_runtime_suspend, tas2552_runtime_resume, + NULL) +}; + +static void tas2552_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + + snd_soc_update_bits(codec, TAS2552_CFG_2, TAS2552_PLL_ENABLE, 0); +} + +static struct snd_soc_dai_ops tas2552_speaker_dai_ops = { + .hw_params = tas2552_hw_params, + .set_sysclk = tas2552_set_dai_sysclk, + .set_fmt = tas2552_set_dai_fmt, + .shutdown = tas2552_shutdown, + .digital_mute = tas2552_mute, +}; + +/* Formats supported by TAS2552 driver. */ +#define TAS2552_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +/* TAS2552 dai structure. */ +static struct snd_soc_dai_driver tas2552_dai[] = { + { + .name = "tas2552-amplifier", + .playback = { + .stream_name = "Speaker", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = TAS2552_FORMATS, + }, + .ops = &tas2552_speaker_dai_ops, + }, +}; + +/* + * DAC digital volumes. From -7 to 24 dB in 1 dB steps + */ +static DECLARE_TLV_DB_SCALE(dac_tlv, -7, 100, 24); + +static const struct snd_kcontrol_new tas2552_snd_controls[] = { + SOC_SINGLE_TLV("Speaker Driver Playback Volume", + TAS2552_PGA_GAIN, 0, 0x1f, 1, dac_tlv), +}; + +static const struct reg_default tas2552_init_regs[] = { + { TAS2552_RESERVED_0D, 0xc0 }, +}; + +static int tas2552_codec_probe(struct snd_soc_codec *codec) +{ + struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec); + int ret; + + tas2552->codec = codec; + + ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies), + tas2552->supplies); + + if (ret != 0) { + dev_err(codec->dev, "Failed to enable supplies: %d\n", + ret); + return ret; + } + + if (tas2552->enable_gpio) + gpiod_set_value(tas2552->enable_gpio, 1); + + ret = pm_runtime_get_sync(codec->dev); + if (ret < 0) { + dev_err(codec->dev, "Enabling device failed: %d\n", + ret); + goto probe_fail; + } + + snd_soc_write(codec, TAS2552_CFG_1, TAS2552_MUTE_MASK | + TAS2552_PLL_SRC_BCLK); + snd_soc_write(codec, TAS2552_CFG_3, TAS2552_I2S_OUT_SEL | + TAS2552_DIN_SRC_SEL_AVG_L_R | TAS2552_88_96KHZ); + snd_soc_write(codec, TAS2552_DOUT, TAS2552_PDM_DATA_I); + snd_soc_write(codec, TAS2552_OUTPUT_DATA, TAS2552_PDM_DATA_V_I | 0x8); + snd_soc_write(codec, TAS2552_PDM_CFG, TAS2552_PDM_BCLK_SEL); + snd_soc_write(codec, TAS2552_BOOST_PT_CTRL, TAS2552_APT_DELAY_200 | + TAS2552_APT_THRESH_2_1_7); + + ret = regmap_register_patch(tas2552->regmap, tas2552_init_regs, + ARRAY_SIZE(tas2552_init_regs)); + if (ret != 0) { + dev_err(codec->dev, "Failed to write init registers: %d\n", + ret); + goto patch_fail; + } + + snd_soc_write(codec, TAS2552_CFG_2, TAS2552_CLASSD_EN | + TAS2552_BOOST_EN | TAS2552_APT_EN | + TAS2552_LIM_EN); + return 0; + +patch_fail: + pm_runtime_put(codec->dev); +probe_fail: + if (tas2552->enable_gpio) + gpiod_set_value(tas2552->enable_gpio, 0); + + regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies), + tas2552->supplies); + return -EIO; +} + +static int tas2552_codec_remove(struct snd_soc_codec *codec) +{ + struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec); + + pm_runtime_put(codec->dev); + + if (tas2552->enable_gpio) + gpiod_set_value(tas2552->enable_gpio, 0); + + return 0; +}; + +#ifdef CONFIG_PM +static int tas2552_suspend(struct snd_soc_codec *codec) +{ + struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec); + int ret; + + ret = regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies), + tas2552->supplies); + + if (ret != 0) + dev_err(codec->dev, "Failed to disable supplies: %d\n", + ret); + return 0; +} + +static int tas2552_resume(struct snd_soc_codec *codec) +{ + struct tas2552_data *tas2552 = snd_soc_codec_get_drvdata(codec); + int ret; + + ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies), + tas2552->supplies); + + if (ret != 0) { + dev_err(codec->dev, "Failed to enable supplies: %d\n", + ret); + } + + return 0; +} +#else +#define tas2552_suspend NULL +#define tas2552_resume NULL +#endif + +static struct snd_soc_codec_driver soc_codec_dev_tas2552 = { + .probe = tas2552_codec_probe, + .remove = tas2552_codec_remove, + .suspend = tas2552_suspend, + .resume = tas2552_resume, + .controls = tas2552_snd_controls, + .num_controls = ARRAY_SIZE(tas2552_snd_controls), +}; + +static const struct regmap_config tas2552_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = TAS2552_MAX_REG, + .reg_defaults = tas2552_reg_defs, + .num_reg_defaults = ARRAY_SIZE(tas2552_reg_defs), + .cache_type = REGCACHE_RBTREE, +}; + +static int tas2552_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct device *dev; + struct tas2552_data *data; + int ret; + int i; + + dev = &client->dev; + data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); + if (data == NULL) + return -ENOMEM; + + data->enable_gpio = devm_gpiod_get(dev, "enable"); + if (IS_ERR(data->enable_gpio)) { + ret = PTR_ERR(data->enable_gpio); + if (ret != -ENOENT && ret != -ENOSYS) + return ret; + + data->enable_gpio = NULL; + } else { + gpiod_direction_output(data->enable_gpio, 0); + } + + data->tas2552_client = client; + data->regmap = devm_regmap_init_i2c(client, &tas2552_regmap_config); + if (IS_ERR(data->regmap)) { + ret = PTR_ERR(data->regmap); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(data->supplies); i++) + data->supplies[i].supply = tas2552_supply_names[i]; + + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies), + data->supplies); + if (ret != 0) { + dev_err(dev, "Failed to request supplies: %d\n", ret); + return ret; + } + + pm_runtime_set_active(&client->dev); + pm_runtime_set_autosuspend_delay(&client->dev, 1000); + pm_runtime_use_autosuspend(&client->dev); + pm_runtime_enable(&client->dev); + pm_runtime_mark_last_busy(&client->dev); + pm_runtime_put_sync_autosuspend(&client->dev); + + dev_set_drvdata(&client->dev, data); + + ret = snd_soc_register_codec(&client->dev, + &soc_codec_dev_tas2552, + tas2552_dai, ARRAY_SIZE(tas2552_dai)); + if (ret < 0) + dev_err(&client->dev, "Failed to register codec: %d\n", ret); + + return ret; +} + +static int tas2552_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + +static const struct i2c_device_id tas2552_id[] = { + { "tas2552", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, tas2552_id); + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id tas2552_of_match[] = { + { .compatible = "ti,tas2552", }, + {}, +}; +MODULE_DEVICE_TABLE(of, tas2552_of_match); +#endif + +static struct i2c_driver tas2552_i2c_driver = { + .driver = { + .name = "tas2552", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(tas2552_of_match), + .pm = &tas2552_pm, + }, + .probe = tas2552_probe, + .remove = tas2552_i2c_remove, + .id_table = tas2552_id, +}; + +module_i2c_driver(tas2552_i2c_driver); + +MODULE_AUTHOR("Dan Muprhy <dmurphy@ti.com>"); +MODULE_DESCRIPTION("TAS2552 Audio amplifier driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/tas2552.h b/sound/soc/codecs/tas2552.h new file mode 100644 index 000000000000..6cea8f31bf88 --- /dev/null +++ b/sound/soc/codecs/tas2552.h @@ -0,0 +1,129 @@ +/* + * tas2552.h - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier + * + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * + * Author: Dan Murphy <dmurphy@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#ifndef __TAS2552_H__ +#define __TAS2552_H__ + +/* Register Address Map */ +#define TAS2552_DEVICE_STATUS 0x00 +#define TAS2552_CFG_1 0x01 +#define TAS2552_CFG_2 0x02 +#define TAS2552_CFG_3 0x03 +#define TAS2552_DOUT 0x04 +#define TAS2552_SER_CTRL_1 0x05 +#define TAS2552_SER_CTRL_2 0x06 +#define TAS2552_OUTPUT_DATA 0x07 +#define TAS2552_PLL_CTRL_1 0x08 +#define TAS2552_PLL_CTRL_2 0x09 +#define TAS2552_PLL_CTRL_3 0x0a +#define TAS2552_BTIP 0x0b +#define TAS2552_BTS_CTRL 0x0c +#define TAS2552_RESERVED_0D 0x0d +#define TAS2552_LIMIT_RATE_HYS 0x0e +#define TAS2552_LIMIT_RELEASE 0x0f +#define TAS2552_LIMIT_INT_COUNT 0x10 +#define TAS2552_PDM_CFG 0x11 +#define TAS2552_PGA_GAIN 0x12 +#define TAS2552_EDGE_RATE_CTRL 0x13 +#define TAS2552_BOOST_PT_CTRL 0x14 +#define TAS2552_VER_NUM 0x16 +#define TAS2552_VBAT_DATA 0x19 +#define TAS2552_MAX_REG 0x20 + +/* CFG1 Register Masks */ +#define TAS2552_MUTE_MASK (1 << 2) +#define TAS2552_SWS_MASK (1 << 1) +#define TAS2552_WCLK_MASK 0x07 +#define TAS2552_CLASSD_EN_MASK (1 << 7) + +/* CFG2 Register Masks */ +#define TAS2552_CLASSD_EN (1 << 7) +#define TAS2552_BOOST_EN (1 << 6) +#define TAS2552_APT_EN (1 << 5) +#define TAS2552_PLL_ENABLE (1 << 3) +#define TAS2552_LIM_EN (1 << 2) +#define TAS2552_IVSENSE_EN (1 << 1) + +/* CFG3 Register Masks */ +#define TAS2552_WORD_CLK_MASK (1 << 7) +#define TAS2552_BIT_CLK_MASK (1 << 6) +#define TAS2552_DATA_FORMAT_MASK (0x11 << 2) + +#define TAS2552_DAIFMT_I2S_MASK 0xf3 +#define TAS2552_DAIFMT_DSP (1 << 3) +#define TAS2552_DAIFMT_RIGHT_J (1 << 4) +#define TAS2552_DAIFMT_LEFT_J (0x11 << 3) + +#define TAS2552_PLL_SRC_MCLK 0x00 +#define TAS2552_PLL_SRC_BCLK (1 << 3) +#define TAS2552_PLL_SRC_IVCLKIN (1 << 4) +#define TAS2552_PLL_SRC_1_8_FIXED (0x11 << 3) + +#define TAS2552_DIN_SRC_SEL_MUTED 0x00 +#define TAS2552_DIN_SRC_SEL_LEFT (1 << 4) +#define TAS2552_DIN_SRC_SEL_RIGHT (1 << 5) +#define TAS2552_DIN_SRC_SEL_AVG_L_R (0x11 << 4) + +#define TAS2552_PDM_IN_SEL (1 << 5) +#define TAS2552_I2S_OUT_SEL (1 << 6) +#define TAS2552_ANALOG_IN_SEL (1 << 7) + +/* CFG3 WCLK Dividers */ +#define TAS2552_8KHZ 0x00 +#define TAS2552_11_12KHZ (1 << 1) +#define TAS2552_16KHZ (1 << 2) +#define TAS2552_22_24KHZ (1 << 3) +#define TAS2552_32KHZ (1 << 4) +#define TAS2552_44_48KHZ (1 << 5) +#define TAS2552_88_96KHZ (1 << 6) +#define TAS2552_176_192KHZ (1 << 7) + +/* OUTPUT_DATA register */ +#define TAS2552_PDM_DATA_I 0x00 +#define TAS2552_PDM_DATA_V (1 << 6) +#define TAS2552_PDM_DATA_I_V (1 << 7) +#define TAS2552_PDM_DATA_V_I (0x11 << 6) + +/* PDM CFG Register */ +#define TAS2552_PDM_DATA_ES_RISE 0x4 + +#define TAS2552_PDM_PLL_CLK_SEL 0x00 +#define TAS2552_PDM_IV_CLK_SEL (1 << 1) +#define TAS2552_PDM_BCLK_SEL (1 << 2) +#define TAS2552_PDM_MCLK_SEL (1 << 3) + +/* Boost pass-through register */ +#define TAS2552_APT_DELAY_50 0x00 +#define TAS2552_APT_DELAY_75 (1 << 1) +#define TAS2552_APT_DELAY_125 (1 << 2) +#define TAS2552_APT_DELAY_200 (1 << 3) + +#define TAS2552_APT_THRESH_2_5 0x00 +#define TAS2552_APT_THRESH_1_7 (1 << 3) +#define TAS2552_APT_THRESH_1_4_1_1 (1 << 4) +#define TAS2552_APT_THRESH_2_1_7 (0x11 << 2) + +/* PLL Control Register */ +#define TAS2552_245MHZ_CLK 24576000 +#define TAS2552_225MHZ_CLK 22579200 +#define TAS2552_PLL_J_MASK 0x7f +#define TAS2552_PLL_D_UPPER_MASK 0x3f +#define TAS2552_PLL_D_LOWER_MASK 0xff +#define TAS2552_PLL_BYPASS_MASK 0x80 +#define TAS2552_PLL_BYPASS 0x80 + +#endif diff --git a/sound/soc/codecs/tas5086.c b/sound/soc/codecs/tas5086.c index d48491a4a19d..249ef5c4c762 100644 --- a/sound/soc/codecs/tas5086.c +++ b/sound/soc/codecs/tas5086.c @@ -36,6 +36,7 @@ #include <linux/gpio.h> #include <linux/i2c.h> #include <linux/regmap.h> +#include <linux/regulator/consumer.h> #include <linux/spi/spi.h> #include <linux/of.h> #include <linux/of_device.h> @@ -240,6 +241,10 @@ static int tas5086_reg_read(void *context, unsigned int reg, return 0; } +static const char * const supply_names[] = { + "dvdd", "avdd" +}; + struct tas5086_private { struct regmap *regmap; unsigned int mclk, sclk; @@ -251,6 +256,7 @@ struct tas5086_private { int rate; /* GPIO driving Reset pin, if any */ int gpio_nreset; + struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; }; static int tas5086_deemph[] = { 0, 32000, 44100, 48000 }; @@ -419,14 +425,14 @@ static int tas5086_hw_params(struct snd_pcm_substream *substream, } /* ... then add the offset for the sample bit depth. */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: val += 0; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: val += 1; break; - case SNDRV_PCM_FORMAT_S24_3LE: + case 24: val += 2; break; default: @@ -773,6 +779,8 @@ static int tas5086_soc_suspend(struct snd_soc_codec *codec) if (ret < 0) return ret; + regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies); + return 0; } @@ -781,6 +789,10 @@ static int tas5086_soc_resume(struct snd_soc_codec *codec) struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); int ret; + ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies); + if (ret < 0) + return ret; + tas5086_reset(priv); regcache_mark_dirty(priv->regmap); @@ -812,6 +824,12 @@ static int tas5086_probe(struct snd_soc_codec *codec) struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); int i, ret; + ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies); + if (ret < 0) { + dev_err(codec->dev, "Failed to enable regulators: %d\n", ret); + return ret; + } + priv->pwm_start_mid_z = 0; priv->charge_period = 1300000; /* hardware default is 1300 ms */ @@ -832,16 +850,22 @@ static int tas5086_probe(struct snd_soc_codec *codec) } } + tas5086_reset(priv); ret = tas5086_init(codec->dev, priv); if (ret < 0) - return ret; + goto exit_disable_regulators; /* set master volume to 0 dB */ ret = regmap_write(priv->regmap, TAS5086_MASTER_VOL, 0x30); if (ret < 0) - return ret; + goto exit_disable_regulators; return 0; + +exit_disable_regulators: + regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies); + + return ret; } static int tas5086_remove(struct snd_soc_codec *codec) @@ -852,6 +876,8 @@ static int tas5086_remove(struct snd_soc_codec *codec) /* Set codec to the reset state */ gpio_set_value(priv->gpio_nreset, 0); + regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies); + return 0; }; @@ -900,6 +926,16 @@ static int tas5086_i2c_probe(struct i2c_client *i2c, if (!priv) return -ENOMEM; + for (i = 0; i < ARRAY_SIZE(supply_names); i++) + priv->supplies[i].supply = supply_names[i]; + + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(priv->supplies), + priv->supplies); + if (ret < 0) { + dev_err(dev, "Failed to get regulators: %d\n", ret); + return ret; + } + priv->regmap = devm_regmap_init(dev, NULL, i2c, &tas5086_regmap); if (IS_ERR(priv->regmap)) { ret = PTR_ERR(priv->regmap); @@ -919,21 +955,34 @@ static int tas5086_i2c_probe(struct i2c_client *i2c, gpio_nreset = -EINVAL; priv->gpio_nreset = gpio_nreset; + + ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies); + if (ret < 0) { + dev_err(dev, "Failed to enable regulators: %d\n", ret); + return ret; + } + tas5086_reset(priv); /* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */ ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i); - if (ret < 0) - return ret; - - if (i != 0x3) { + if (ret == 0 && i != 0x3) { dev_err(dev, "Failed to identify TAS5086 codec (got %02x)\n", i); - return -ENODEV; + ret = -ENODEV; } - return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_tas5086, - &tas5086_dai, 1); + /* + * The chip has been identified, so we can turn off the power + * again until the dai link is set up. + */ + regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies); + + if (ret == 0) + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_tas5086, + &tas5086_dai, 1); + + return ret; } static int tas5086_i2c_remove(struct i2c_client *i2c) diff --git a/sound/soc/codecs/tlv320aic23.c b/sound/soc/codecs/tlv320aic23.c index 686b8b85b956..d67167920c2f 100644 --- a/sound/soc/codecs/tlv320aic23.c +++ b/sound/soc/codecs/tlv320aic23.c @@ -364,16 +364,16 @@ static int tlv320aic23_hw_params(struct snd_pcm_substream *substream, iface_reg = snd_soc_read(codec, TLV320AIC23_DIGT_FMT) & ~(0x03 << 2); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface_reg |= (0x01 << 2); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface_reg |= (0x02 << 2); break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface_reg |= (0x03 << 2); break; } diff --git a/sound/soc/codecs/tlv320aic26.c b/sound/soc/codecs/tlv320aic26.c index 43069de3d56a..620ab9ea1ef0 100644 --- a/sound/soc/codecs/tlv320aic26.c +++ b/sound/soc/codecs/tlv320aic26.c @@ -71,8 +71,8 @@ static int aic26_hw_params(struct snd_pcm_substream *substream, dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n", substream, params); - dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params), - params_format(params)); + dev_dbg(&aic26->spi->dev, "rate=%i width=%d\n", params_rate(params), + params_width(params)); switch (params_rate(params)) { case 8000: fsref = 48000; divisor = AIC26_DIV_6; break; @@ -89,11 +89,11 @@ static int aic26_hw_params(struct snd_pcm_substream *substream, } /* select data word length */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break; - case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break; - case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break; - case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break; + switch (params_width(params)) { + case 8: wlen = AIC26_WLEN_16; break; + case 16: wlen = AIC26_WLEN_16; break; + case 24: wlen = AIC26_WLEN_24; break; + case 32: wlen = AIC26_WLEN_32; break; default: dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; } diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index 23419109ecac..0f64c7890eed 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c @@ -249,17 +249,16 @@ static const char * const mic_select_text[] = { "Off", "FFR 10 Ohm", "FFR 20 Ohm", "FFR 40 Ohm" }; -static const -SOC_ENUM_SINGLE_DECL(mic1lp_p_enum, AIC31XX_MICPGAPI, 6, mic_select_text); -static const -SOC_ENUM_SINGLE_DECL(mic1rp_p_enum, AIC31XX_MICPGAPI, 4, mic_select_text); -static const -SOC_ENUM_SINGLE_DECL(mic1lm_p_enum, AIC31XX_MICPGAPI, 2, mic_select_text); - -static const -SOC_ENUM_SINGLE_DECL(cm_m_enum, AIC31XX_MICPGAMI, 6, mic_select_text); -static const -SOC_ENUM_SINGLE_DECL(mic1lm_m_enum, AIC31XX_MICPGAMI, 4, mic_select_text); +static SOC_ENUM_SINGLE_DECL(mic1lp_p_enum, AIC31XX_MICPGAPI, 6, + mic_select_text); +static SOC_ENUM_SINGLE_DECL(mic1rp_p_enum, AIC31XX_MICPGAPI, 4, + mic_select_text); +static SOC_ENUM_SINGLE_DECL(mic1lm_p_enum, AIC31XX_MICPGAPI, 2, + mic_select_text); + +static SOC_ENUM_SINGLE_DECL(cm_m_enum, AIC31XX_MICPGAMI, 6, mic_select_text); +static SOC_ENUM_SINGLE_DECL(mic1lm_m_enum, AIC31XX_MICPGAMI, 4, + mic_select_text); static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6350, 50, 0); static const DECLARE_TLV_DB_SCALE(adc_fgain_tlv, 0, 10, 0); @@ -329,6 +328,7 @@ static int aic31xx_wait_bits(struct aic31xx_priv *aic31xx, unsigned int reg, unsigned int bits; int counter = count; int ret = regmap_read(aic31xx->regmap, reg, &bits); + while ((bits & mask) != wbits && counter && !ret) { usleep_range(sleep, sleep * 2); ret = regmap_read(aic31xx->regmap, reg, &bits); @@ -435,6 +435,7 @@ static int mic_bias_event(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = w->codec; struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec); + switch (event) { case SND_SOC_DAPM_POST_PMU: /* change mic bias voltage to user defined */ @@ -759,8 +760,8 @@ static int aic31xx_hw_params(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = dai->codec; u8 data = 0; - dev_dbg(codec->dev, "## %s: format %d width %d rate %d\n", - __func__, params_format(params), params_width(params), + dev_dbg(codec->dev, "## %s: width %d rate %d\n", + __func__, params_width(params), params_rate(params)); switch (params_width(params)) { @@ -779,8 +780,8 @@ static int aic31xx_hw_params(struct snd_pcm_substream *substream, AIC31XX_IFACE1_DATALEN_SHIFT); break; default: - dev_err(codec->dev, "%s: Unsupported format %d\n", - __func__, params_format(params)); + dev_err(codec->dev, "%s: Unsupported width %d\n", + __func__, params_width(params)); return -EINVAL; } @@ -1178,7 +1179,7 @@ static void aic31xx_pdata_from_of(struct aic31xx_priv *aic31xx) } #endif /* CONFIG_OF */ -static void aic31xx_device_init(struct aic31xx_priv *aic31xx) +static int aic31xx_device_init(struct aic31xx_priv *aic31xx) { int ret, i; @@ -1197,7 +1198,7 @@ static void aic31xx_device_init(struct aic31xx_priv *aic31xx) "aic31xx-reset-pin"); if (ret < 0) { dev_err(aic31xx->dev, "not able to acquire gpio\n"); - return; + return ret; } } @@ -1210,6 +1211,7 @@ static void aic31xx_device_init(struct aic31xx_priv *aic31xx) if (ret != 0) dev_err(aic31xx->dev, "Failed to request supplies: %d\n", ret); + return ret; } static int aic31xx_i2c_probe(struct i2c_client *i2c, @@ -1239,7 +1241,9 @@ static int aic31xx_i2c_probe(struct i2c_client *i2c, aic31xx->pdata.codec_type = id->driver_data; - aic31xx_device_init(aic31xx); + ret = aic31xx_device_init(aic31xx); + if (ret) + return ret; return snd_soc_register_codec(&i2c->dev, &soc_codec_driver_aic31xx, aic31xx_dai_driver, diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 1d9b117345a3..6ea662db2410 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -450,16 +450,16 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream, data = snd_soc_read(codec, AIC32X4_IFACE1); data = data & ~(3 << 4); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: data |= (AIC32X4_WORD_LEN_20BITS << AIC32X4_DOSRMSB_SHIFT); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: data |= (AIC32X4_WORD_LEN_24BITS << AIC32X4_DOSRMSB_SHIFT); break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: data |= (AIC32X4_WORD_LEN_32BITS << AIC32X4_DOSRMSB_SHIFT); break; } @@ -626,32 +626,33 @@ static int aic32x4_probe(struct snd_soc_codec *codec) snd_soc_write(codec, AIC32X4_MICBIAS, AIC32X4_MICBIAS_LDOIN | AIC32X4_MICBIAS_2075V); } - if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE) { + if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE) snd_soc_write(codec, AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE); - } tmp_reg = (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) ? AIC32X4_LDOCTLEN : 0; snd_soc_write(codec, AIC32X4_LDOCTL, tmp_reg); tmp_reg = snd_soc_read(codec, AIC32X4_CMMODE); - if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36) { + if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36) tmp_reg |= AIC32X4_LDOIN_18_36; - } - if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED) { + if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED) tmp_reg |= AIC32X4_LDOIN2HP; - } snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg); /* Mic PGA routing */ if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) - snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K); + snd_soc_write(codec, AIC32X4_LMICPGANIN, + AIC32X4_LMICPGANIN_IN2R_10K); else - snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_CM1L_10K); + snd_soc_write(codec, AIC32X4_LMICPGANIN, + AIC32X4_LMICPGANIN_CM1L_10K); if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) - snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K); + snd_soc_write(codec, AIC32X4_RMICPGANIN, + AIC32X4_RMICPGANIN_IN1L_10K); else - snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_CM1R_10K); + snd_soc_write(codec, AIC32X4_RMICPGANIN, + AIC32X4_RMICPGANIN_CM1R_10K); aic32x4_set_bias_level(codec, SND_SOC_BIAS_STANDBY); diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index e12fafbb1e09..64f179ee9834 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -873,16 +873,16 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, /* select data word length */ data = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4)); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: data |= (0x01 << 4); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: data |= (0x02 << 4); break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: data |= (0x03 << 4); break; } @@ -1194,7 +1194,8 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec, #define AIC3X_RATES SNDRV_PCM_RATE_8000_96000 #define AIC3X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ - SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) static const struct snd_soc_dai_ops aic3x_dai_ops = { .hw_params = aic3x_hw_params, @@ -1477,10 +1478,8 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, u32 value; aic3x = devm_kzalloc(&i2c->dev, sizeof(struct aic3x_priv), GFP_KERNEL); - if (aic3x == NULL) { - dev_err(&i2c->dev, "failed to create private data\n"); + if (!aic3x) return -ENOMEM; - } aic3x->regmap = devm_regmap_init_i2c(i2c, &aic3x_regmap); if (IS_ERR(aic3x->regmap)) { @@ -1498,10 +1497,8 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, } else if (np) { ai3x_setup = devm_kzalloc(&i2c->dev, sizeof(*ai3x_setup), GFP_KERNEL); - if (ai3x_setup == NULL) { - dev_err(&i2c->dev, "failed to create private data\n"); + if (!ai3x_setup) return -ENOMEM; - } ret = of_get_named_gpio(np, "gpio-reset", 0); if (ret >= 0) diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c index df3a7506c023..e21ed934bdbf 100644 --- a/sound/soc/codecs/tlv320dac33.c +++ b/sound/soc/codecs/tlv320dac33.c @@ -832,18 +832,18 @@ static int dac33_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: dac33->fifo_size = DAC33_FIFO_SIZE_16BIT; dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 32); break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: dac33->fifo_size = DAC33_FIFO_SIZE_24BIT; dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64); break; default: - dev_err(codec->dev, "unsupported format %d\n", - params_format(params)); + dev_err(codec->dev, "unsupported width %d\n", + params_width(params)); return -EINVAL; } @@ -1404,7 +1404,7 @@ static int dac33_soc_probe(struct snd_soc_codec *codec) if (dac33->irq >= 0) { ret = request_irq(dac33->irq, dac33_interrupt_handler, IRQF_TRIGGER_RISING, - codec->name, codec); + codec->component.name, codec); if (ret < 0) { dev_err(codec->dev, "Could not request IRQ%d (%d)\n", dac33->irq, ret); diff --git a/sound/soc/codecs/tpa6130a2.c b/sound/soc/codecs/tpa6130a2.c index 8fc5a647453b..6fac9e034c48 100644 --- a/sound/soc/codecs/tpa6130a2.c +++ b/sound/soc/codecs/tpa6130a2.c @@ -381,10 +381,8 @@ static int tpa6130a2_probe(struct i2c_client *client, dev = &client->dev; data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); - if (data == NULL) { - dev_err(dev, "Can not allocate memory\n"); + if (!data) return -ENOMEM; - } if (pdata) { data->power_gpio = pdata->power_gpio; diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index 69e12a311ba2..b6b0cb399599 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c @@ -344,17 +344,16 @@ static void twl4030_init_chip(struct snd_soc_codec *codec) static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable) { struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); - int status = -1; if (enable) { twl4030->apll_enabled++; if (twl4030->apll_enabled == 1) - status = twl4030_audio_enable_resource( + twl4030_audio_enable_resource( TWL4030_AUDIO_RES_APLL); } else { twl4030->apll_enabled--; if (!twl4030->apll_enabled) - status = twl4030_audio_disable_resource( + twl4030_audio_disable_resource( TWL4030_AUDIO_RES_APLL); } } @@ -1764,16 +1763,16 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); format = old_format; format &= ~TWL4030_DATA_WIDTH; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: format |= TWL4030_DATA_WIDTH_16S_16W; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: format |= TWL4030_DATA_WIDTH_32S_24W; break; default: - dev_err(codec->dev, "%s: unknown format %d\n", __func__, - params_format(params)); + dev_err(codec->dev, "%s: unsupported bits/sample %d\n", + __func__, params_width(params)); return -EINVAL; } @@ -2162,10 +2161,8 @@ static int twl4030_soc_probe(struct snd_soc_codec *codec) twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv), GFP_KERNEL); - if (twl4030 == NULL) { - dev_err(codec->dev, "Can not allocate memory\n"); + if (!twl4030) return -ENOMEM; - } snd_soc_codec_set_drvdata(codec, twl4030); /* Set the defaults, and power up the codec */ twl4030->sysclk = twl4030_audio_get_mclk() / 1000; diff --git a/sound/soc/codecs/uda134x.c b/sound/soc/codecs/uda134x.c index edf27acc1d77..32b2f78aa62c 100644 --- a/sound/soc/codecs/uda134x.c +++ b/sound/soc/codecs/uda134x.c @@ -243,14 +243,14 @@ static int uda134x_hw_params(struct snd_pcm_substream *substream, case SND_SOC_DAIFMT_I2S: break; case SND_SOC_DAIFMT_RIGHT_J: - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: hw_params |= (1<<1); break; - case SNDRV_PCM_FORMAT_S18_3LE: + case 18: hw_params |= (1<<2); break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: hw_params |= ((1<<2) | (1<<1)); break; default: @@ -479,7 +479,7 @@ static struct snd_soc_dai_driver uda134x_dai = { static int uda134x_soc_probe(struct snd_soc_codec *codec) { struct uda134x_priv *uda134x; - struct uda134x_platform_data *pd = codec->card->dev->platform_data; + struct uda134x_platform_data *pd = codec->component.card->dev->platform_data; const struct snd_soc_dapm_widget *widgets; unsigned num_widgets; diff --git a/sound/soc/codecs/wl1273.c b/sound/soc/codecs/wl1273.c index 4ead0dc02b87..f3d4e88d0b7b 100644 --- a/sound/soc/codecs/wl1273.c +++ b/sound/soc/codecs/wl1273.c @@ -341,8 +341,9 @@ static int wl1273_hw_params(struct snd_pcm_substream *substream, struct wl1273_core *core = wl1273->core; unsigned int rate, width, r; - if (params_format(params) != SNDRV_PCM_FORMAT_S16_LE) { - pr_err("Only SNDRV_PCM_FORMAT_S16_LE supported.\n"); + if (params_width(params) != 16) { + dev_err(dai->dev, "%d bits/sample not supported\n", + params_width(params)); return -EINVAL; } @@ -461,10 +462,8 @@ static int wl1273_probe(struct snd_soc_codec *codec) } wl1273 = kzalloc(sizeof(struct wl1273_priv), GFP_KERNEL); - if (wl1273 == NULL) { - dev_err(codec->dev, "Cannot allocate memory.\n"); + if (!wl1273) return -ENOMEM; - } wl1273->mode = WL1273_MODE_BT; wl1273->core = *core; diff --git a/sound/soc/codecs/wm0010.c b/sound/soc/codecs/wm0010.c index 71ce3159a62e..f37989ec7cba 100644 --- a/sound/soc/codecs/wm0010.c +++ b/sound/soc/codecs/wm0010.c @@ -144,7 +144,7 @@ static const struct snd_soc_dapm_route wm0010_dapm_routes[] = { static const char *wm0010_state_to_str(enum wm0010_state state) { - const char *state_to_str[] = { + static const char * const state_to_str[] = { "Power off", "Out of reset", "Boot ROM", @@ -413,7 +413,6 @@ static int wm0010_firmware_load(const char *name, struct snd_soc_codec *codec) xfer = kzalloc(sizeof(*xfer), GFP_KERNEL); if (!xfer) { - dev_err(codec->dev, "Failed to allocate xfer\n"); ret = -ENOMEM; goto abort; } @@ -423,8 +422,6 @@ static int wm0010_firmware_load(const char *name, struct snd_soc_codec *codec) out = kzalloc(len, GFP_KERNEL | GFP_DMA); if (!out) { - dev_err(codec->dev, - "Failed to allocate RX buffer\n"); ret = -ENOMEM; goto abort1; } @@ -432,8 +429,6 @@ static int wm0010_firmware_load(const char *name, struct snd_soc_codec *codec) img = kzalloc(len, GFP_KERNEL | GFP_DMA); if (!img) { - dev_err(codec->dev, - "Failed to allocate image buffer\n"); ret = -ENOMEM; goto abort1; } @@ -526,14 +521,12 @@ static int wm0010_stage2_load(struct snd_soc_codec *codec) /* Copy to local buffer first as vmalloc causes problems for dma */ img = kzalloc(fw->size, GFP_KERNEL | GFP_DMA); if (!img) { - dev_err(codec->dev, "Failed to allocate image buffer\n"); ret = -ENOMEM; goto abort2; } out = kzalloc(fw->size, GFP_KERNEL | GFP_DMA); if (!out) { - dev_err(codec->dev, "Failed to allocate output buffer\n"); ret = -ENOMEM; goto abort1; } @@ -679,11 +672,8 @@ static int wm0010_boot(struct snd_soc_codec *codec) } img_swap = kzalloc(len, GFP_KERNEL | GFP_DMA); - if (!img_swap) { - dev_err(codec->dev, - "Failed to allocate image buffer\n"); + if (!img_swap) goto abort; - } /* We need to re-order for 0010 */ byte_swap_64((u64 *)&pll_rec, img_swap, len); diff --git a/sound/soc/codecs/wm1250-ev1.c b/sound/soc/codecs/wm1250-ev1.c index 6e6b93d4696e..8011f75fb6cb 100644 --- a/sound/soc/codecs/wm1250-ev1.c +++ b/sound/soc/codecs/wm1250-ev1.c @@ -164,7 +164,6 @@ static int wm1250_ev1_pdata(struct i2c_client *i2c) wm1250 = devm_kzalloc(&i2c->dev, sizeof(*wm1250), GFP_KERNEL); if (!wm1250) { - dev_err(&i2c->dev, "Unable to allocate private data\n"); ret = -ENOMEM; goto err; } diff --git a/sound/soc/codecs/wm2000.c b/sound/soc/codecs/wm2000.c index a4c352cc3464..34ef65c52a7d 100644 --- a/sound/soc/codecs/wm2000.c +++ b/sound/soc/codecs/wm2000.c @@ -826,10 +826,8 @@ static int wm2000_i2c_probe(struct i2c_client *i2c, wm2000 = devm_kzalloc(&i2c->dev, sizeof(struct wm2000_priv), GFP_KERNEL); - if (wm2000 == NULL) { - dev_err(&i2c->dev, "Unable to allocate private data\n"); + if (!wm2000) return -ENOMEM; - } mutex_init(&wm2000->lock); diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c index 91a9ea2a2056..7bb0d36d4c54 100644 --- a/sound/soc/codecs/wm5100.c +++ b/sound/soc/codecs/wm5100.c @@ -735,8 +735,7 @@ WM5100_MIXER_CONTROLS("LHPF4", WM5100_HPLP4MIX_INPUT_1_SOURCE), static void wm5100_seq_notifier(struct snd_soc_dapm_context *dapm, enum snd_soc_dapm_type event, int subseq) { - struct snd_soc_codec *codec = container_of(dapm, - struct snd_soc_codec, dapm); + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm); struct wm5100_priv *wm5100 = snd_soc_codec_get_drvdata(codec); u16 val, expect, i; diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 289b64d89abd..f60234962527 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -612,6 +612,62 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } +static int wm5102_out_comp_coeff_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + uint16_t data; + + mutex_lock(&codec->mutex); + data = cpu_to_be16(arizona->dac_comp_coeff); + memcpy(ucontrol->value.bytes.data, &data, sizeof(data)); + mutex_unlock(&codec->mutex); + + return 0; +} + +static int wm5102_out_comp_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + mutex_lock(&codec->mutex); + memcpy(&arizona->dac_comp_coeff, ucontrol->value.bytes.data, + sizeof(arizona->dac_comp_coeff)); + arizona->dac_comp_coeff = be16_to_cpu(arizona->dac_comp_coeff); + mutex_unlock(&codec->mutex); + + return 0; +} + +static int wm5102_out_comp_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + mutex_lock(&codec->mutex); + ucontrol->value.integer.value[0] = arizona->dac_comp_enabled; + mutex_unlock(&codec->mutex); + + return 0; +} + +static int wm5102_out_comp_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + mutex_lock(&codec->mutex); + arizona->dac_comp_enabled = ucontrol->value.integer.value[0]; + mutex_unlock(&codec->mutex); + + return 0; +} + static const char *wm5102_osr_text[] = { "Low power", "Normal", "High performance", }; @@ -843,6 +899,12 @@ SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), SOC_ENUM("Noise Gate Hold", arizona_ng_hold), +SND_SOC_BYTES_EXT("Output Compensation Coefficient", 2, + wm5102_out_comp_coeff_get, wm5102_out_comp_coeff_put), + +SOC_SINGLE_EXT("Output Compensation Switch", 0, 0, 1, 0, + wm5102_out_comp_switch_get, wm5102_out_comp_switch_put), + WM5102_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), WM5102_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), WM5102_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), @@ -1653,6 +1715,7 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm5102-aif2", @@ -1674,6 +1737,7 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm5102-aif3", @@ -1695,6 +1759,7 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm5102-slim1", diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 2e5fcb559e90..2f2ec26d831c 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1485,6 +1485,7 @@ static struct snd_soc_dai_driver wm5110_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm5110-aif2", @@ -1506,6 +1507,7 @@ static struct snd_soc_dai_driver wm5110_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm5110-aif3", @@ -1527,6 +1529,7 @@ static struct snd_soc_dai_driver wm5110_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm5110-slim1", @@ -1596,6 +1599,7 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) arizona_init_spk(codec); arizona_init_gpio(codec); + arizona_init_mono(codec); ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8); if (ret != 0) diff --git a/sound/soc/codecs/wm8350.c b/sound/soc/codecs/wm8350.c index 392285edb595..3dfdcc4197fa 100644 --- a/sound/soc/codecs/wm8350.c +++ b/sound/soc/codecs/wm8350.c @@ -918,16 +918,16 @@ static int wm8350_pcm_hw_params(struct snd_pcm_substream *substream, ~WM8350_AIF_WL_MASK; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x1 << 10; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x2 << 10; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x3 << 10; break; } @@ -1341,21 +1341,18 @@ int wm8350_hp_jack_detect(struct snd_soc_codec *codec, enum wm8350_jack which, { struct wm8350_data *priv = snd_soc_codec_get_drvdata(codec); struct wm8350 *wm8350 = priv->wm8350; - int irq; int ena; switch (which) { case WM8350_JDL: priv->hpl.jack = jack; priv->hpl.report = report; - irq = WM8350_IRQ_CODEC_JCK_DET_L; ena = WM8350_JDL_ENA; break; case WM8350_JDR: priv->hpr.jack = jack; priv->hpr.report = report; - irq = WM8350_IRQ_CODEC_JCK_DET_R; ena = WM8350_JDR_ENA; break; diff --git a/sound/soc/codecs/wm8400.c b/sound/soc/codecs/wm8400.c index 06e913d3fea1..72471bef2e9a 100644 --- a/sound/soc/codecs/wm8400.c +++ b/sound/soc/codecs/wm8400.c @@ -1095,16 +1095,16 @@ static int wm8400_hw_params(struct snd_pcm_substream *substream, audio1 &= ~WM8400_AIF_WL_MASK; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: audio1 |= WM8400_AIF_WL_20BITS; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: audio1 |= WM8400_AIF_WL_24BITS; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: audio1 |= WM8400_AIF_WL_32BITS; break; } diff --git a/sound/soc/codecs/wm8510.c b/sound/soc/codecs/wm8510.c index 1c1e328feeb8..e11127f9069e 100644 --- a/sound/soc/codecs/wm8510.c +++ b/sound/soc/codecs/wm8510.c @@ -449,16 +449,16 @@ static int wm8510_pcm_hw_params(struct snd_pcm_substream *substream, u16 adn = snd_soc_read(codec, WM8510_ADD) & 0x1f1; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0020; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0040; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x0060; break; } diff --git a/sound/soc/codecs/wm8523.c b/sound/soc/codecs/wm8523.c index 601ee8178af1..ec1f5740dbd0 100644 --- a/sound/soc/codecs/wm8523.c +++ b/sound/soc/codecs/wm8523.c @@ -163,16 +163,16 @@ static int wm8523_hw_params(struct snd_pcm_substream *substream, aifctrl2 |= lrclk_ratios[i].value; aifctrl1 &= ~WM8523_WL_MASK; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: aifctrl1 |= 0x8; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: aifctrl1 |= 0x10; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: aifctrl1 |= 0x18; break; } diff --git a/sound/soc/codecs/wm8580.c b/sound/soc/codecs/wm8580.c index 7665ff6aea6d..911605ee25b0 100644 --- a/sound/soc/codecs/wm8580.c +++ b/sound/soc/codecs/wm8580.c @@ -511,19 +511,19 @@ static int wm8580_paif_hw_params(struct snd_pcm_substream *substream, int i, ratio, osr; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: paifa |= 0x8; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: paifa |= 0x0; paifb |= WM8580_AIF_LENGTH_20; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: paifa |= 0x0; paifb |= WM8580_AIF_LENGTH_24; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: paifa |= 0x0; paifb |= WM8580_AIF_LENGTH_32; break; diff --git a/sound/soc/codecs/wm8711.c b/sound/soc/codecs/wm8711.c index b0fbcb377baf..32187e739b4f 100644 --- a/sound/soc/codecs/wm8711.c +++ b/sound/soc/codecs/wm8711.c @@ -169,13 +169,13 @@ static int wm8711_hw_params(struct snd_pcm_substream *substream, snd_soc_write(codec, WM8711_SRATE, srate); /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0008; break; } diff --git a/sound/soc/codecs/wm8728.c b/sound/soc/codecs/wm8728.c index bac7fc28fe71..38ff826f589a 100644 --- a/sound/soc/codecs/wm8728.c +++ b/sound/soc/codecs/wm8728.c @@ -94,13 +94,13 @@ static int wm8728_hw_params(struct snd_pcm_substream *substream, dac &= ~0x18; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: dac |= 0x10; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: dac |= 0x08; break; default: diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c index 5ada61611324..eebb3280bfad 100644 --- a/sound/soc/codecs/wm8731.c +++ b/sound/soc/codecs/wm8731.c @@ -348,13 +348,13 @@ static int wm8731_hw_params(struct snd_pcm_substream *substream, snd_soc_write(codec, WM8731_SRATE, srate); /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0008; break; } diff --git a/sound/soc/codecs/wm8737.c b/sound/soc/codecs/wm8737.c index b27f26cdc049..744a422ecb05 100644 --- a/sound/soc/codecs/wm8737.c +++ b/sound/soc/codecs/wm8737.c @@ -367,16 +367,16 @@ static int wm8737_hw_params(struct snd_pcm_substream *substream, clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: af |= 0x8; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: af |= 0x10; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: af |= 0x18; break; default: diff --git a/sound/soc/codecs/wm8741.c b/sound/soc/codecs/wm8741.c index b33542a04607..a237f1627f61 100644 --- a/sound/soc/codecs/wm8741.c +++ b/sound/soc/codecs/wm8741.c @@ -241,26 +241,26 @@ static int wm8741_hw_params(struct snd_pcm_substream *substream, } /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0001; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0002; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x0003; break; default: dev_dbg(codec->dev, "wm8741_hw_params: Unsupported bit size param = %d", - params_format(params)); + params_width(params)); return -EINVAL; } dev_dbg(codec->dev, "wm8741_hw_params: bit size param = %d", - params_format(params)); + params_width(params)); snd_soc_write(codec, WM8741_FORMAT_CONTROL, iface); return 0; diff --git a/sound/soc/codecs/wm8750.c b/sound/soc/codecs/wm8750.c index 33990b63d214..67653a2db223 100644 --- a/sound/soc/codecs/wm8750.c +++ b/sound/soc/codecs/wm8750.c @@ -586,16 +586,16 @@ static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, int coeff = get_coeff(wm8750->sysclk, params_rate(params)); /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0008; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x000c; break; } diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c index 53e57b4049a8..e54e097f4fcb 100644 --- a/sound/soc/codecs/wm8753.c +++ b/sound/soc/codecs/wm8753.c @@ -937,16 +937,16 @@ static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream, u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: voice |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: voice |= 0x0008; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: voice |= 0x000c; break; } @@ -1176,16 +1176,16 @@ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream, coeff_div[coeff].usb); /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: hifi |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: hifi |= 0x0008; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: hifi |= 0x000c; break; } diff --git a/sound/soc/codecs/wm8770.c b/sound/soc/codecs/wm8770.c index c61aeb38efb8..180e7a098726 100644 --- a/sound/soc/codecs/wm8770.c +++ b/sound/soc/codecs/wm8770.c @@ -426,16 +426,16 @@ static int wm8770_hw_params(struct snd_pcm_substream *substream, wm8770 = snd_soc_codec_get_drvdata(codec); iface = 0; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x10; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x20; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x30; break; } diff --git a/sound/soc/codecs/wm8804.c b/sound/soc/codecs/wm8804.c index d96e5963ee35..0ea01dfcb6e1 100644 --- a/sound/soc/codecs/wm8804.c +++ b/sound/soc/codecs/wm8804.c @@ -270,19 +270,19 @@ static int wm8804_hw_params(struct snd_pcm_substream *substream, codec = dai->codec; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: blen = 0x0; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: blen = 0x1; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: blen = 0x2; break; default: dev_err(dai->dev, "Unsupported word length: %u\n", - params_format(params)); + params_width(params)); return -EINVAL; } diff --git a/sound/soc/codecs/wm8900.c b/sound/soc/codecs/wm8900.c index d09fdce57f5a..44a5f1511f0f 100644 --- a/sound/soc/codecs/wm8900.c +++ b/sound/soc/codecs/wm8900.c @@ -640,16 +640,16 @@ static int wm8900_hw_params(struct snd_pcm_substream *substream, reg = snd_soc_read(codec, WM8900_REG_AUDIO1) & ~0x60; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: reg |= 0x20; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: reg |= 0x40; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: reg |= 0x60; break; default: diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index b84940c359a1..aa0984864e76 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c @@ -281,8 +281,7 @@ static int wm8903_dcs_event(struct snd_soc_dapm_widget *w, static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm, enum snd_soc_dapm_type event, int subseq) { - struct snd_soc_codec *codec = container_of(dapm, - struct snd_soc_codec, dapm); + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm); struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec); int dcs_mode = WM8903_DCS_MODE_WRITE_STOP; int i, val; @@ -1477,19 +1476,19 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream, aif1 &= ~WM8903_AIF_WL_MASK; bclk = 2 * fs; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: bclk *= 16; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: bclk *= 20; aif1 |= 0x4; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: bclk *= 24; aif1 |= 0x8; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: bclk *= 32; aif1 |= 0xc; break; diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c index f7c549949c54..4d2d2b1380d5 100644 --- a/sound/soc/codecs/wm8904.c +++ b/sound/soc/codecs/wm8904.c @@ -11,6 +11,7 @@ * published by the Free Software Foundation. */ +#include <linux/clk.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/init.h> @@ -49,6 +50,7 @@ static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = { /* codec private data */ struct wm8904_priv { struct regmap *regmap; + struct clk *mclk; enum wm8904_type devtype; @@ -1290,16 +1292,16 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream, wm8904->bclk = snd_soc_params_to_bclk(params); } - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: aif1 |= 0x40; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: aif1 |= 0x80; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: aif1 |= 0xc0; break; default: @@ -1828,6 +1830,7 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec, switch (level) { case SND_SOC_BIAS_ON: + clk_prepare_enable(wm8904->mclk); break; case SND_SOC_BIAS_PREPARE: @@ -1894,6 +1897,7 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec, regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); + clk_disable_unprepare(wm8904->mclk); break; } codec->dapm.bias_level = level; @@ -2013,12 +2017,8 @@ static void wm8904_handle_pdata(struct snd_soc_codec *codec) /* We need an array of texts for the enum API */ wm8904->drc_texts = kmalloc(sizeof(char *) * pdata->num_drc_cfgs, GFP_KERNEL); - if (!wm8904->drc_texts) { - dev_err(codec->dev, - "Failed to allocate %d DRC config texts\n", - pdata->num_drc_cfgs); + if (!wm8904->drc_texts) return; - } for (i = 0; i < pdata->num_drc_cfgs; i++) wm8904->drc_texts[i] = pdata->drc_cfgs[i].name; @@ -2110,6 +2110,13 @@ static int wm8904_i2c_probe(struct i2c_client *i2c, if (wm8904 == NULL) return -ENOMEM; + wm8904->mclk = devm_clk_get(&i2c->dev, "mclk"); + if (IS_ERR(wm8904->mclk)) { + ret = PTR_ERR(wm8904->mclk); + dev_err(&i2c->dev, "Failed to get MCLK\n"); + return ret; + } + wm8904->regmap = devm_regmap_init_i2c(i2c, &wm8904_regmap); if (IS_ERR(wm8904->regmap)) { ret = PTR_ERR(wm8904->regmap); diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c index fc6eec9ad66b..52011043e54c 100644 --- a/sound/soc/codecs/wm8940.c +++ b/sound/soc/codecs/wm8940.c @@ -430,19 +430,19 @@ static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream, if (ret) goto error_ret; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S8: + switch (params_width(params)) { + case 8: companding = companding | (1 << 5); break; - case SNDRV_PCM_FORMAT_S16_LE: + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= (1 << 5); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= (2 << 5); break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= (3 << 5); break; } diff --git a/sound/soc/codecs/wm8955.c b/sound/soc/codecs/wm8955.c index 2a35108f233d..09d91d9dc4ee 100644 --- a/sound/soc/codecs/wm8955.c +++ b/sound/soc/codecs/wm8955.c @@ -597,17 +597,17 @@ static int wm8955_hw_params(struct snd_pcm_substream *substream, int ret; int wl; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: wl = 0; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: wl = 0x4; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: wl = 0x8; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: wl = 0xc; break; default: diff --git a/sound/soc/codecs/wm8958-dsp2.c b/sound/soc/codecs/wm8958-dsp2.c index b2ebb104d879..0dada7f0105e 100644 --- a/sound/soc/codecs/wm8958-dsp2.c +++ b/sound/soc/codecs/wm8958-dsp2.c @@ -934,12 +934,8 @@ void wm8958_dsp2_init(struct snd_soc_codec *codec) /* We need an array of texts for the enum API */ wm8994->mbc_texts = kmalloc(sizeof(char *) * pdata->num_mbc_cfgs, GFP_KERNEL); - if (!wm8994->mbc_texts) { - dev_err(wm8994->hubs.codec->dev, - "Failed to allocate %d MBC config texts\n", - pdata->num_mbc_cfgs); + if (!wm8994->mbc_texts) return; - } for (i = 0; i < pdata->num_mbc_cfgs; i++) wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name; @@ -963,12 +959,8 @@ void wm8958_dsp2_init(struct snd_soc_codec *codec) /* We need an array of texts for the enum API */ wm8994->vss_texts = kmalloc(sizeof(char *) * pdata->num_vss_cfgs, GFP_KERNEL); - if (!wm8994->vss_texts) { - dev_err(wm8994->hubs.codec->dev, - "Failed to allocate %d VSS config texts\n", - pdata->num_vss_cfgs); + if (!wm8994->vss_texts) return; - } for (i = 0; i < pdata->num_vss_cfgs; i++) wm8994->vss_texts[i] = pdata->vss_cfgs[i].name; @@ -993,12 +985,8 @@ void wm8958_dsp2_init(struct snd_soc_codec *codec) /* We need an array of texts for the enum API */ wm8994->vss_hpf_texts = kmalloc(sizeof(char *) * pdata->num_vss_hpf_cfgs, GFP_KERNEL); - if (!wm8994->vss_hpf_texts) { - dev_err(wm8994->hubs.codec->dev, - "Failed to allocate %d VSS HPF config texts\n", - pdata->num_vss_hpf_cfgs); + if (!wm8994->vss_hpf_texts) return; - } for (i = 0; i < pdata->num_vss_hpf_cfgs; i++) wm8994->vss_hpf_texts[i] = pdata->vss_hpf_cfgs[i].name; @@ -1024,12 +1012,8 @@ void wm8958_dsp2_init(struct snd_soc_codec *codec) /* We need an array of texts for the enum API */ wm8994->enh_eq_texts = kmalloc(sizeof(char *) * pdata->num_enh_eq_cfgs, GFP_KERNEL); - if (!wm8994->enh_eq_texts) { - dev_err(wm8994->hubs.codec->dev, - "Failed to allocate %d enhanced EQ config texts\n", - pdata->num_enh_eq_cfgs); + if (!wm8994->enh_eq_texts) return; - } for (i = 0; i < pdata->num_enh_eq_cfgs; i++) wm8994->enh_eq_texts[i] = pdata->enh_eq_cfgs[i].name; diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index a145d0431b63..4dc4e85116cd 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -472,7 +472,7 @@ static int wm8960_add_widgets(struct snd_soc_codec *codec) * list each time to find the desired power state do so now * and save the result. */ - list_for_each_entry(w, &codec->card->widgets, list) { + list_for_each_entry(w, &codec->component.card->widgets, list) { if (w->dapm != &codec->dapm) continue; if (strcmp(w->name, "LOUT1 PGA") == 0) @@ -567,24 +567,21 @@ static int wm8960_hw_params(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = dai->codec; struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3; - snd_pcm_format_t format = params_format(params); int i; /* bit size */ - switch (format) { - case SNDRV_PCM_FORMAT_S16_LE: - case SNDRV_PCM_FORMAT_S16_BE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: - case SNDRV_PCM_FORMAT_S20_3BE: + case 20: iface |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: - case SNDRV_PCM_FORMAT_S24_BE: + case 24: iface |= 0x0008; break; default: - dev_err(codec->dev, "unsupported format %i\n", format); + dev_err(codec->dev, "unsupported width %d\n", + params_width(params)); return -EINVAL; } diff --git a/sound/soc/codecs/wm8961.c b/sound/soc/codecs/wm8961.c index 9c88f04442b3..41d23e920ad5 100644 --- a/sound/soc/codecs/wm8961.c +++ b/sound/soc/codecs/wm8961.c @@ -565,16 +565,16 @@ static int wm8961_hw_params(struct snd_pcm_substream *substream, reg = snd_soc_read(codec, WM8961_AUDIO_INTERFACE_0); reg &= ~WM8961_WL_MASK; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: reg |= 1 << WM8961_WL_SHIFT; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: reg |= 2 << WM8961_WL_SHIFT; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: reg |= 3 << WM8961_WL_SHIFT; break; default: diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index ca2fda9d72be..1098ae32f1f9 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -14,6 +14,7 @@ #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/init.h> +#include <linux/clk.h> #include <linux/delay.h> #include <linux/pm.h> #include <linux/gcd.h> @@ -2586,16 +2587,16 @@ static int wm8962_hw_params(struct snd_pcm_substream *substream, if (wm8962->lrclk % 8000 == 0) adctl3 |= WM8962_SAMPLE_RATE_INT_MODE; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: aif0 |= 0x4; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: aif0 |= 0x8; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: aif0 |= 0xc; break; default: @@ -3541,6 +3542,8 @@ static int wm8962_set_pdata_from_of(struct i2c_client *i2c, pdata->gpio_init[i] = 0x0; } + pdata->mclk = devm_clk_get(&i2c->dev, NULL); + return 0; } @@ -3572,6 +3575,14 @@ static int wm8962_i2c_probe(struct i2c_client *i2c, return ret; } + /* Mark the mclk pointer to NULL if no mclk assigned */ + if (IS_ERR(wm8962->pdata.mclk)) { + /* But do not ignore the request for probe defer */ + if (PTR_ERR(wm8962->pdata.mclk) == -EPROBE_DEFER) + return -EPROBE_DEFER; + wm8962->pdata.mclk = NULL; + } + for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) wm8962->supplies[i].supply = wm8962_supply_names[i]; @@ -3780,6 +3791,12 @@ static int wm8962_runtime_resume(struct device *dev) struct wm8962_priv *wm8962 = dev_get_drvdata(dev); int ret; + ret = clk_prepare_enable(wm8962->pdata.mclk); + if (ret) { + dev_err(dev, "Failed to enable MCLK: %d\n", ret); + return ret; + } + ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); if (ret != 0) { @@ -3839,6 +3856,8 @@ static int wm8962_runtime_suspend(struct device *dev) regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); + clk_disable_unprepare(wm8962->pdata.mclk); + return 0; } #endif diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c index 09b7b4200221..0499cd4cfb71 100644 --- a/sound/soc/codecs/wm8971.c +++ b/sound/soc/codecs/wm8971.c @@ -517,16 +517,16 @@ static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream, int coeff = get_coeff(wm8971->sysclk, params_rate(params)); /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0008; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x000c; break; } diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c index 0627c56fa44e..682e9eda1019 100644 --- a/sound/soc/codecs/wm8974.c +++ b/sound/soc/codecs/wm8974.c @@ -445,16 +445,16 @@ static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream, u16 adn = snd_soc_read(codec, WM8974_ADD) & 0x1f1; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0020; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0040; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x0060; break; } diff --git a/sound/soc/codecs/wm8978.c b/sound/soc/codecs/wm8978.c index 28ef46c91f62..ee2ba574952b 100644 --- a/sound/soc/codecs/wm8978.c +++ b/sound/soc/codecs/wm8978.c @@ -736,16 +736,16 @@ static int wm8978_hw_params(struct snd_pcm_substream *substream, return -EINVAL; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface_ctl |= 0x20; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface_ctl |= 0x40; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface_ctl |= 0x60; break; } @@ -817,8 +817,8 @@ static int wm8978_hw_params(struct snd_pcm_substream *substream, wm8978->sysclk == WM8978_MCLK ? ", consider using PLL" : ""); - dev_dbg(codec->dev, "%s: fmt %d, rate %u, MCLK divisor #%d\n", __func__, - params_format(params), params_rate(params), best); + dev_dbg(codec->dev, "%s: width %d, rate %u, MCLK divisor #%d\n", __func__, + params_width(params), params_rate(params), best); /* MCLK divisor mask = 0xe0 */ snd_soc_update_bits(codec, WM8978_CLOCKING, 0xe0, best << 5); diff --git a/sound/soc/codecs/wm8983.c b/sound/soc/codecs/wm8983.c index 19d5baa38f5c..ac5defda8824 100644 --- a/sound/soc/codecs/wm8983.c +++ b/sound/soc/codecs/wm8983.c @@ -719,22 +719,22 @@ static int wm8983_hw_params(struct snd_pcm_substream *substream, wm8983->bclk = ret; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: blen = 0x0; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: blen = 0x1; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: blen = 0x2; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: blen = 0x3; break; default: dev_err(dai->dev, "Unsupported word length %u\n", - params_format(params)); + params_width(params)); return -EINVAL; } diff --git a/sound/soc/codecs/wm8985.c b/sound/soc/codecs/wm8985.c index 0f5780c09f3a..ee380190399f 100644 --- a/sound/soc/codecs/wm8985.c +++ b/sound/soc/codecs/wm8985.c @@ -698,22 +698,22 @@ static int wm8985_hw_params(struct snd_pcm_substream *substream, if ((int)wm8985->bclk < 0) return wm8985->bclk; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: blen = 0x0; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: blen = 0x1; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: blen = 0x2; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: blen = 0x3; break; default: dev_err(dai->dev, "Unsupported word length %u\n", - params_format(params)); + params_width(params)); return -EINVAL; } @@ -980,9 +980,6 @@ static int wm8985_resume(struct snd_soc_codec *codec) static int wm8985_remove(struct snd_soc_codec *codec) { - struct wm8985_priv *wm8985; - - wm8985 = snd_soc_codec_get_drvdata(codec); wm8985_set_bias_level(codec, SND_SOC_BIAS_OFF); return 0; } diff --git a/sound/soc/codecs/wm8988.c b/sound/soc/codecs/wm8988.c index d3fea46d58e8..a5130d965146 100644 --- a/sound/soc/codecs/wm8988.c +++ b/sound/soc/codecs/wm8988.c @@ -687,16 +687,16 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream, } /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: iface |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: iface |= 0x0008; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: iface |= 0x000c; break; } diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index b5c1f0f07058..03e43e3f395e 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -1073,16 +1073,16 @@ static int wm8990_hw_params(struct snd_pcm_substream *substream, audio1 &= ~WM8990_AIF_WL_MASK; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: audio1 |= WM8990_AIF_WL_20BITS; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: audio1 |= WM8990_AIF_WL_24BITS; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: audio1 |= WM8990_AIF_WL_32BITS; break; } diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c index b8fd284fc0c0..d0be89731cdb 100644 --- a/sound/soc/codecs/wm8991.c +++ b/sound/soc/codecs/wm8991.c @@ -1081,16 +1081,16 @@ static int wm8991_hw_params(struct snd_pcm_substream *substream, audio1 &= ~WM8991_AIF_WL_MASK; /* bit size */ - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: audio1 |= WM8991_AIF_WL_20BITS; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: audio1 |= WM8991_AIF_WL_24BITS; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: audio1 |= WM8991_AIF_WL_32BITS; break; } diff --git a/sound/soc/codecs/wm8993.c b/sound/soc/codecs/wm8993.c index f825dc04ebe1..93b14eda355a 100644 --- a/sound/soc/codecs/wm8993.c +++ b/sound/soc/codecs/wm8993.c @@ -1214,19 +1214,19 @@ static int wm8993_hw_params(struct snd_pcm_substream *substream, wm8993->tdm_slots, wm8993->tdm_width); wm8993->bclk *= wm8993->tdm_width * wm8993->tdm_slots; } else { - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: wm8993->bclk *= 16; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: wm8993->bclk *= 20; aif1 |= 0x8; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: wm8993->bclk *= 24; aif1 |= 0x10; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: wm8993->bclk *= 32; aif1 |= 0x18; break; diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 247b39013fba..6cc0566dc29a 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -2815,19 +2815,19 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, } bclk_rate = params_rate(params); - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: bclk_rate *= 16; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: bclk_rate *= 20; aif1 |= 0x20; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: bclk_rate *= 24; aif1 |= 0x40; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: bclk_rate *= 32; aif1 |= 0x60; break; @@ -2966,16 +2966,16 @@ static int wm8994_aif3_hw_params(struct snd_pcm_substream *substream, return 0; } - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: aif1 |= 0x20; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: aif1 |= 0x40; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: aif1 |= 0x60; break; default: @@ -3296,12 +3296,8 @@ static void wm8994_handle_pdata(struct wm8994_priv *wm8994) /* We need an array of texts for the enum API */ wm8994->drc_texts = devm_kzalloc(wm8994->hubs.codec->dev, sizeof(char *) * pdata->num_drc_cfgs, GFP_KERNEL); - if (!wm8994->drc_texts) { - dev_err(wm8994->hubs.codec->dev, - "Failed to allocate %d DRC config texts\n", - pdata->num_drc_cfgs); + if (!wm8994->drc_texts) return; - } for (i = 0; i < pdata->num_drc_cfgs; i++) wm8994->drc_texts[i] = pdata->drc_cfgs[i].name; @@ -3505,6 +3501,7 @@ static irqreturn_t wm8994_mic_irq(int irq, void *data) return IRQ_HANDLED; } +/* Should be called with accdet_lock held */ static void wm1811_micd_stop(struct snd_soc_codec *codec) { struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); @@ -3512,14 +3509,10 @@ static void wm1811_micd_stop(struct snd_soc_codec *codec) if (!wm8994->jackdet) return; - mutex_lock(&wm8994->accdet_lock); - snd_soc_update_bits(codec, WM8958_MIC_DETECT_1, WM8958_MICD_ENA, 0); wm1811_jackdet_set_mode(codec, WM1811_JACKDET_MODE_JACK); - mutex_unlock(&wm8994->accdet_lock); - if (wm8994->wm8994->pdata.jd_ext_cap) snd_soc_dapm_disable_pin(&codec->dapm, "MICBIAS2"); @@ -3560,10 +3553,10 @@ static void wm8958_open_circuit_work(struct work_struct *work) open_circuit_work.work); struct device *dev = wm8994->wm8994->dev; - wm1811_micd_stop(wm8994->hubs.codec); - mutex_lock(&wm8994->accdet_lock); + wm1811_micd_stop(wm8994->hubs.codec); + dev_dbg(dev, "Reporting open circuit\n"); wm8994->jack_mic = false; diff --git a/sound/soc/codecs/wm8995.c b/sound/soc/codecs/wm8995.c index 863a2c38bcb5..cae4ac5a5730 100644 --- a/sound/soc/codecs/wm8995.c +++ b/sound/soc/codecs/wm8995.c @@ -1597,21 +1597,21 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream, return bclk_rate; aif1 = 0; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: aif1 |= (0x1 << WM8995_AIF1_WL_SHIFT); break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: aif1 |= (0x2 << WM8995_AIF1_WL_SHIFT); break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: aif1 |= (0x3 << WM8995_AIF1_WL_SHIFT); break; default: dev_err(dai->dev, "Unsupported word length %u\n", - params_format(params)); + params_width(params)); return -EINVAL; } diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c index 69266332760e..f16ff4f56923 100644 --- a/sound/soc/codecs/wm8996.c +++ b/sound/soc/codecs/wm8996.c @@ -620,15 +620,12 @@ static int bg_event(struct snd_soc_dapm_widget *w, static int cp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - int ret = 0; - switch (event) { case SND_SOC_DAPM_POST_PMU: msleep(5); break; default: WARN(1, "Invalid event %d\n", event); - ret = -EINVAL; } return 0; @@ -690,8 +687,7 @@ static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask) static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm, enum snd_soc_dapm_type event, int subseq) { - struct snd_soc_codec *codec = container_of(dapm, - struct snd_soc_codec, dapm); + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm); struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); u16 val, mask; diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index bb9b47b956aa..ab33fe596519 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -967,6 +967,7 @@ static struct snd_soc_dai_driver wm8997_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm8997-aif2", @@ -988,6 +989,7 @@ static struct snd_soc_dai_driver wm8997_dai[] = { }, .ops = &arizona_dai_ops, .symmetric_rates = 1, + .symmetric_samplebits = 1, }, { .name = "wm8997-slim1", diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c index 185eb97769e7..0cdc9e2184ab 100644 --- a/sound/soc/codecs/wm9081.c +++ b/sound/soc/codecs/wm9081.c @@ -1029,19 +1029,19 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream, /* Otherwise work out a BCLK from the sample size */ wm9081->bclk = 2 * wm9081->fs; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: wm9081->bclk *= 16; break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: wm9081->bclk *= 20; aif2 |= 0x4; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: wm9081->bclk *= 24; aif2 |= 0x8; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: wm9081->bclk *= 32; aif2 |= 0xc; break; diff --git a/sound/soc/codecs/wm9090.c b/sound/soc/codecs/wm9090.c index 87934171f063..a13f0725611a 100644 --- a/sound/soc/codecs/wm9090.c +++ b/sound/soc/codecs/wm9090.c @@ -613,10 +613,8 @@ static int wm9090_i2c_probe(struct i2c_client *i2c, int ret; wm9090 = devm_kzalloc(&i2c->dev, sizeof(*wm9090), GFP_KERNEL); - if (wm9090 == NULL) { - dev_err(&i2c->dev, "Can not allocate memory\n"); + if (!wm9090) return -ENOMEM; - } wm9090->regmap = devm_regmap_init_i2c(i2c, &wm9090_regmap); if (IS_ERR(wm9090->regmap)) { diff --git a/sound/soc/codecs/wm9713.c b/sound/soc/codecs/wm9713.c index 2a9c6d11330c..bddee30a4bc7 100644 --- a/sound/soc/codecs/wm9713.c +++ b/sound/soc/codecs/wm9713.c @@ -953,16 +953,16 @@ static int wm9713_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = dai->codec; u16 reg = ac97_read(codec, AC97_CENTER_LFE_MASTER) & 0xfff3; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: reg |= 0x0004; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: reg |= 0x0008; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: reg |= 0x000c; break; } diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 060027182dcb..f412a9911a75 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1382,7 +1382,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, int ret; int val; - dsp->card = codec->card; + dsp->card = codec->component.card; switch (event) { case SND_SOC_DAPM_POST_PMU: @@ -1617,7 +1617,7 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); struct wm_adsp *dsp = &dsps[w->shift]; - dsp->card = codec->card; + dsp->card = codec->component.card; switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -1758,3 +1758,5 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) return 0; } EXPORT_SYMBOL_GPL(wm_adsp2_init); + +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c index 916817fe6632..374537d5e179 100644 --- a/sound/soc/codecs/wm_hubs.c +++ b/sound/soc/codecs/wm_hubs.c @@ -183,10 +183,8 @@ static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg) return; cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL); - if (!cache) { - dev_err(codec->dev, "Failed to allocate DCS cache entry\n"); + if (!cache) return; - } cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME); cache->left &= WM8993_HPOUT1L_VOL_MASK; |