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-rw-r--r--tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/bus.json15
1 files changed, 6 insertions, 9 deletions
diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/bus.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/bus.json
index fce7309ae624..e0875d3a685d 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/bus.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/bus.json
@@ -1,19 +1,16 @@
[
{
- "EventCode": "0x11",
- "EventName": "CPU_CYCLES",
+ "PublicDescription": "The number of core clock cycles",
+ "ArchStdEvent": "CPU_CYCLES",
"BriefDescription": "The number of core clock cycles."
},
{
- "PublicDescription": "Bus access. This event counts for every beat of data transferred over the data channels between the core and the SCU. If both read and write data beats are transferred on a given cycle, this event is counted twice on that cycle. This event counts the sum of BUS_ACCESS_RD and BUS_ACCESS_WR.",
- "EventCode": "0x19",
- "EventName": "BUS_ACCESS",
- "BriefDescription": "Bus access."
+ "PublicDescription": "This event counts for every beat of data transferred over the data channels between the core and the SCU. If both read and write data beats are transferred on a given cycle, this event is counted twice on that cycle. This event counts the sum of BUS_ACCESS_RD and BUS_ACCESS_WR.",
+ "ArchStdEvent": "BUS_ACCESS"
},
{
- "EventCode": "0x1D",
- "EventName": "BUS_CYCLES",
- "BriefDescription": "Bus cycles. This event duplicates CPU_CYCLES."
+ "PublicDescription": "This event duplicates CPU_CYCLES.",
+ "ArchStdEvent": "BUS_CYCLES"
},
{
"ArchStdEvent": "BUS_ACCESS_RD"