diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json | 66 |
1 files changed, 61 insertions, 5 deletions
diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json index ca48747642e1..67ab19e8cf3a 100644 --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json @@ -4,34 +4,90 @@ "EventName": "uncore_hisi_l3c.rd_cpipe", "BriefDescription": "Total read accesses", "PublicDescription": "Total read accesses", - "Unit": "hisi_sccl,l3c", + "Unit": "hisi_sccl,l3c" }, { "EventCode": "0x01", "EventName": "uncore_hisi_l3c.wr_cpipe", "BriefDescription": "Total write accesses", "PublicDescription": "Total write accesses", - "Unit": "hisi_sccl,l3c", + "Unit": "hisi_sccl,l3c" }, { "EventCode": "0x02", "EventName": "uncore_hisi_l3c.rd_hit_cpipe", "BriefDescription": "Total read hits", "PublicDescription": "Total read hits", - "Unit": "hisi_sccl,l3c", + "Unit": "hisi_sccl,l3c" }, { "EventCode": "0x03", "EventName": "uncore_hisi_l3c.wr_hit_cpipe", "BriefDescription": "Total write hits", "PublicDescription": "Total write hits", - "Unit": "hisi_sccl,l3c", + "Unit": "hisi_sccl,l3c" }, { "EventCode": "0x04", "EventName": "uncore_hisi_l3c.victim_num", "BriefDescription": "l3c precharge commands", "PublicDescription": "l3c precharge commands", - "Unit": "hisi_sccl,l3c", + "Unit": "hisi_sccl,l3c" }, + { + "EventCode": "0x20", + "EventName": "uncore_hisi_l3c.rd_spipe", + "BriefDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe", + "PublicDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x21", + "EventName": "uncore_hisi_l3c.wr_spipe", + "BriefDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe", + "PublicDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x22", + "EventName": "uncore_hisi_l3c.rd_hit_spipe", + "BriefDescription": "Count of the number of read lines that hits in spipe of this L3C", + "PublicDescription": "Count of the number of read lines that hits in spipe of this L3C", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x23", + "EventName": "uncore_hisi_l3c.wr_hit_spipe", + "BriefDescription": "Count of the number of write lines that hits in spipe of this L3C", + "PublicDescription": "Count of the number of write lines that hits in spipe of this L3C", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x29", + "EventName": "uncore_hisi_l3c.back_invalid", + "BriefDescription": "Count of the number of L3C back invalid operations", + "PublicDescription": "Count of the number of L3C back invalid operations", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x40", + "EventName": "uncore_hisi_l3c.retry_cpu", + "BriefDescription": "Count of the number of retry that L3C suppresses the CPU operations", + "PublicDescription": "Count of the number of retry that L3C suppresses the CPU operations", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x41", + "EventName": "uncore_hisi_l3c.retry_ring", + "BriefDescription": "Count of the number of retry that L3C suppresses the ring operations", + "PublicDescription": "Count of the number of retry that L3C suppresses the ring operations", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x42", + "EventName": "uncore_hisi_l3c.prefetch_drop", + "BriefDescription": "Count of the number of prefetch drops from this L3C", + "PublicDescription": "Count of the number of prefetch drops from this L3C", + "Unit": "hisi_sccl,l3c" + } ] |