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2006-12-04[POWERPC] Add files build to .gitignoreRutger Nijlunsing6-1/+21
Mostly taken from corresponding Makefile's make-clean rule. Tested by (cross)compiling for $ARCH PPC and POWERPC and checking output of git-status. Signed-off-by: Rutger Nijlunsing <git-commit@tux.tmfweb.nl> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Provide dummy hard_irq_enable/disable() for PPC32Michael Ellerman1-0/+3
To allow arch/powerpc/kernel/crash.c to build on 32-bit we need a definition of hard_irq_disable(). 32-bit doesn't support the lazy interrupt disabling mechanism, so on 32-bit hard_irq_disable() is simply local_irq_disable(). Add a definition for hard_irq_enable() just for completeness. This allows (KEXEC=y && PPC32=y) to build again. Broken since d04c56f73c30a5e593202ecfcf25ed43d42363a2. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] include/asm-powerpc/: "extern inline" -> "static inline"Adrian Bunk3-6/+6
"extern inline" generates a warning with -Wmissing-prototypes and I'm currently working on getting the kernel cleaned up for adding this to the CFLAGS since it will help us to avoid a nasty class of runtime errors. If there are places that really need a forced inline, __always_inline would be the correct solution. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Add of_platform support for ROM devicesVitaly Wool3-0/+71
This adds support for flash device descriptions to the OF device tree. It's inspired by and partially borrowed from Sergei's patch "[RFC] Adding MTD to device tree.patch". Signed-off-by: Vitaly Wool <vwool@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] pSeries/kexec: Fix for interrupt distributionMohan Kumar M1-19/+49
This allows any secondary CPU thread also to become boot cpu for POWER5. The patch is required to solve kdump boot issue when the kdump kernel is booted with parameter "maxcpus=1". XICS init code tries to match the current boot cpu id with "reg" property in each CPU node in the device tree. But CPU node is created only for primary thread CPU ids and "reg" property only reflects primary CPU ids. So when a kernel is booted on a secondary cpu thread above condition will never meet and the default distribution server is left as zero. This leads to route the interrupts to CPU 0, but which is not online at this time. We use ibm,ppc-interrupt-server#s to check for both primary and secondary CPU ids. Accordingly default distribution server value is initialized from "ibm,ppc-interrupt-gserver#s" property. We loop through ibm,ppc-interrupt-gserver#s property to find the global distribution server from the last entry that matches with boot cpuid. Signed-off-by: Mohan Kumar M <mohan@in.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] fix building without PCIArnd Bergmann1-0/+7
At least the ide driver calls pcibus_to_node, which is not defined when CONFIG_PCI is disabled. This adds a nop function for the !PCI case. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] fix missing #include in sys_ppc32.cArnd Bergmann1-0/+1
sys_mmap is declared in asm/syscalls.h Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add a default zImage targetArnd Bergmann1-0/+1
It's currently not possible to build the default zImage target if PS3 is the only selected platform. This is a hack to fall back to building the pseries style zImage, so the build is successful. This will probably change in the future, if someone writes a PS3 specific boot wrapper. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: multiplatform build fixesArnd Bergmann8-11/+44
A few code paths need to check whether or not they are running on the PS3's LV1 hypervisor before making hcalls. This introduces a new firmware feature bit for this, FW_FEATURE_PS3_LV1. Now when both PS3 and IBM_CELL_BLADE are enabled, but not PSERIES, FW_FEATURE_PS3_LV1 and FW_FEATURE_LPAR get enabled at compile time, which is a bug. The same problem can also happen for (PPC_ISERIES && !PPC_PSERIES && PPC_SOMETHING_ELSE). In order to solve this, I introduce a new CONFIG_PPC_NATIVE option that is set when at least one platform is selected that can run without a hypervisor and then turns the firmware feature check into a run-time option. The new cell oprofile support that was recently merged does not work on hypervisor based platforms like the PS3, therefore make it depend on PPC_CELL_NATIVE instead of PPC_CELL. This may change if we get oprofile support for PS3. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: Missed renames of CONFIG_PS3 to CONFIG_PPC_PS3Geert Uytterhoeven3-6/+6
When renaming CONFIG_PS3 to CONFIG_PPC_PS3, a few occurrences have been missed. I also fixed up the alignment in arch/powerpc/platforms/Makefile. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] cell: fix building without spufsArnd Bergmann3-5/+5
It may be desireable to build a kernel for cell without spufs, e.g. as the initial kboot kernel. This requires that the SPU specific parts of the core dump and the xmon code depend on CONFIG_SPU_BASE instead of CONFIG_PPC_CELL. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] spufs: we should only execute init_spu_base on cellStephen Rothwell1-0/+3
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] spufs: always send sigtrap on breakpointArnd Bergmann1-6/+4
Currently, we only send a sigtrap if the current task is being ptraced. This is somewhat inconsistant, and it breaks utrace support in fedora. Removing the check should do the right thing in all cases. Cc: Ulrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] spufs: return an error in spu_create is isolated create isnt supportedJeremy Kerr1-0/+4
This changes the spu_create system call to return an error (-ENODEV) if and isolated spu context is requested on hardware that doesn't support isolated mode. Tested on systemsim with and without isolation support Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Fix compile issue for Efika platformNicolas DET2-1/+2
This patch fixes a compile issue for the Efika platform recently introduced by API changes. Signed-off-by: Nicolas DET <nd@bplan-gmbh.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Compile a zImage.chrp if PPC_EFIKA seletedNicolas DET1-0/+1
Signed-off-by: Nicolas DET <nd@bplan-gmbh.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] powerpc: Make 970MP detectable by oprofileMike Wolf1-1/+1
Change the oprofile_cpu_type in cputables.c to be ppc64/970MP. Oprofile needs to distinquish the MP from other 970 processors so it can add some new counters specific to the 970MP. Signed-off-by: Mike Wolf <mjw@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] update cell_defconfig for ps3 supportArnd Bergmann1-8/+23
In the common cell kernel, I want to have ps3 enabled to find potential bugs at compile-time. Also enable SPU disassembly in xmon. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add ps3_defconfigGeoff Levand1-0/+837
Adds a ps3_defconfig for the PS3 game console. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add ps3 platform system bus supportGeoff Levand4-0/+433
Adds a PS3 system bus driver. This system bus is a virtual bus used to present the PS3 system devices in the LDM. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add spu supportGeoff Levand3-0/+623
Adds spu support for the PS3 platform. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add OS params supportGeoff Levand2-1/+260
Adds support for early access to the parameter data from the PS3 'Other OS' flash memory area. The parameter data mainly holds user preferences like static ip address. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add lpar addressingGeoff Levand2-0/+17
Adds some needed bits for a config option PS3_USE_LPAR_ADDR that disables the PS3 lpar address translation mechanism. This is a currently needed workaround for limitations in the design of the generic cell spu support. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add interrupt supportGeoff Levand1-0/+575
Adds routines to interface with the PS3 interrupt services. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add repository supportGeoff Levand2-0/+979
Adds support for the PS3 repository. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add htab routinesGeoff Levand1-0/+277
Adds pagetable management routines for the PS3. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add feature bitsGeoff Levand1-0/+8
Adds the needed firmware feature bits for the PS3. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add lv1 hvcallsGeoff Levand3-0/+1176
Adds the PS3 hvcalls. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add support for ps3 platformGeoff Levand11-1/+1624
Adds the core platform support for the PS3 game console and other devices using the PS3 hypervisor. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] cell: spu management xmon routinesMichael Ellerman1-9/+1
This fixes the xmon support for the cell spu to be compatable with the split spu platform code. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] cell: abstract spu management routinesGeoff Levand7-347/+490
This adds a platform specific spu management abstraction and the coresponding routines to support the IBM Cell Blade. It also removes the hypervisor only resources that were included in struct spu. Three new platform specific routines are introduced, spu_enumerate_spus(), spu_create_spu() and spu_destroy_spu(). The underlying design uses a new type, struct spu_management_ops, to hold function pointers that the platform setup code is expected to initialize to instances appropriate to that platform. For the IBM Cell Blade support, I put the hypervisor only resources that were in struct spu into a platform specific data structure struct spu_pdata. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] add virq_to_hw accessor routineGeoff Levand1-0/+4
This adds an accessor routine virq_to_hw() to the virq routines which hides the implementation details of the virq to hwirq map. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Import updated version of ppc disassembly code for xmonMichael Ellerman3-219/+618
This includes: * version 1.24 of ppc-dis.c * version 1.88 of ppc-opc.c * version 1.23 of ppc.h I can't vouch for the accuracy etc. of these changes, but it brings us into line with binutils - and from a cursory test appears to work fine. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Make 64-bit cpu features defined on 32-bitMichael Ellerman1-2/+2
It saves #ifdef'ing in callers if we at least define the 64-bit cpu features for 32-bit also. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Make xmon disassembly optionalMichael Ellerman6-10/+49
While adding spu disassembly support it struck me that we're actually carrying quite a lot of code around, just to do disassembly in the case of a crash. While on large systems it's not an issue, on smaller ones it might be nice to have xmon - but without the weight of the disassembly support. For a Cell build this saves ~230KB (!), and for pSeries ~195KB. We still support the 'di' and 'sdi' commands, however they just dump the instruction in hex. Move the definitions into a header to clean xmon.c just a tiny bit. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Add spu disassembly to xmonMichael Ellerman2-8/+28
This patch adds a "sdi" command to xmon, to disassemble the contents of an spu's local store. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Import spu disassembly code into xmonMichael Ellerman4-0/+829
This patch imports and munges the spu disassembly code from binutils. All files originated from version 1.1 in binutils cvs. * spu.h, spu-insns.h and spu-opc.c are unchanged except for pathnames. * spu-dis.c has been edited heavily: * use printf instead of info->fprintf_func and similar. * pass the instruction in rather than reading it. * we have no equivalent to symbol_at_address_func, so we just assume there is never a symbol at the address given. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Prepare for spu disassembly in xmonMichael Ellerman2-6/+15
In order to do disassembly of spu binaries in xmon, we need to abstract the disassembly function from ppc_inst_dump. We do this by making the actual disassembly function a function pointer that we pass to ppc_inst_dump(). To save updating all the callers, we turn ppc_inst_dump() into generic_inst_dump() and make ppc_inst_dump() a wrapper which always uses print_insn_powerpc(). Currently we pass the dialect into print_insn_powerpc(), but we always pass 0 - so just make it a local. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Add a sd command (spu dump) to xmon to dump spu local storeMichael Ellerman1-5/+55
Add a command to xmon to dump the memory of a spu's local store. This mimics the 'd' command which dumps regular memory, but does a little hand holding by taking the user supplied address and finding that offset in the local store for the specified spu. This makes it easy for example to look at what was executing on a spu: 1:mon> ss ... Stopped spu 04 (was running) ... 1:mon> sf 4 Dumping spu fields at address c0000000019e0a00: ... problem->spu_npc_RW = 0x228 ... 1:mon> sd 4 0x228 d000080080318228 01a00c021cffc408 4020007f217ff488 |........@ ..!...| Aha, 01a00c02, which is of course rdch $2,$ch24 ! -- Updated to only do the setjmp goo around the spu access, and not around prdump because it does its own (via mread). Also the num variable is now common between sf and sd, so you don't have to keep typing the spu number in if you're repeating commands on the same spu. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Show state of spus as theyre stopped in Cell xmon helperMichael Ellerman1-1/+4
After stopping spus in xmon I often find myself trawling through the field dumps to find out which spus were running. The spu stopping code actually knows what's running, so let's print it out to save the user some futzing. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Fix sparse warning in xmon Cell codeMichael Ellerman1-7/+15
My patch to add spu helpers to xmon (a898497088f46252e6750405504064e2dce53117) introduced a few sparse warnings, because I was dereferencing an __iomem pointer. I think the best way to handle it is to actually use the appropriate in_beXX functions. Need to rejigger the DUMP macro a little to accomodate that. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] cell: hard disable interrupts in power_save()Benjamin Herrenschmidt1-0/+9
With soft-disabled interrupts in power_save, we can still get external exceptions on Cell, even if we are in pause(0) a.k.a. sleep state. When the CPU really wakes up through the 0x100 (system reset) vector, while we have already started processing the 0x500 (external) exception, we get a panic in unrecoverable_exception() because of the lost state. This occurred in Systemsim for Cell, but as far as I can see, it can theoretically occur on any machine that uses the system reset exception to get out of sleep state. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] coredump: Add SPU elf notes to coredump.Dwayne Grant McConnell11-87/+618
This patch adds SPU elf notes to the coredump. It creates a separate note for each of /regs, /fpcr, /lslr, /decr, /decr_status, /mem, /signal1, /signal1_type, /signal2, /signal2_type, /event_mask, /event_status, /mbox_info, /ibox_info, /wbox_info, /dma_info, /proxydma_info, /object-id. A new macro, ARCH_HAVE_EXTRA_NOTES, was created for architectures to specify they have extra elf core notes. A new macro, ELF_CORE_EXTRA_NOTES_SIZE, was created so the size of the additional notes could be calculated and added to the notes phdr entry. A new macro, ELF_CORE_WRITE_EXTRA_NOTES, was created so the new notes would be written after the existing notes. The SPU coredump code resides in spufs. Stub functions are provided in the kernel which are hooked into the spufs code which does the actual work via register_arch_coredump_calls(). A new set of __spufs_<file>_read/get() functions was provided to allow the coredump code to read from the spufs files without having to lock the SPU context for each file read from. Cc: <linux-arch@vger.kernel.org> Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] powerpc: Workaround for of_platform without "reg" nor "dcr-reg"Benjamin Herrenschmidt1-2/+9
Devices with no "reg" nor "dcr-reg" property are given a bus_id which is the node name alone. This means that if more than one such device with the same names are present in the system, sysfs will have collisions when creating the symlinks and will fail registering the devices. This works around that problem by assigning successive numbers to such devices. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Distinguish POWER6 partition modes and tell userspacePaul Mackerras8-47/+130
This adds code to look at the properties firmware puts in the device tree to determine what compatibility mode the partition is in on POWER6 machines, and set the ELF aux vector AT_HWCAP and AT_PLATFORM entries appropriately. Specifically, we look at the cpu-version property in the cpu node(s). If that contains a "logical" PVR value (of the form 0x0f00000x), we call identify_cpu again with this PVR value. A value of 0x0f000001 indicates the partition is in POWER5+ compatibility mode, and a value of 0x0f000002 indicates "POWER6 architected" mode, with various extensions disabled. We also look for various other properties: ibm,dfp, ibm,purr and ibm,spurr. Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Add oprofile supportMaynard Johnson10-5/+798
Add PPU event-based and cycle-based profiling support to Oprofile for Cell. Oprofile is expected to collect data on all CPUs simultaneously. However, there is one set of performance counters per node. There are two hardware threads or virtual CPUs on each node. Hence, OProfile must multiplex in time the performance counter collection on the two virtual CPUs. The multiplexing of the performance counters is done by a virtual counter routine. Initially, the counters are configured to collect data on the even CPUs in the system, one CPU per node. In order to capture the PC for the virtual CPU when the performance counter interrupt occurs (the specified number of events between samples has occurred), the even processors are configured to handle the performance counter interrupts for their node. The virtual counter routine is called via a kernel timer after the virtual sample time. The routine stops the counters, saves the current counts, loads the last counts for the other virtual CPU on the node, sets interrupts to be handled by the other virtual CPU and restarts the counters, the virtual timer routine is scheduled to run again. The virtual sample time is kept relatively small to make sure sampling occurs on both CPUs on the node with a relatively small granularity. Whenever the counters overflow, the performance counter interrupt is called to collect the PC for the CPU where data is being collected. The oprofile driver relies on a firmware RTAS call to setup the debug bus to route the desired signals to the performance counter hardware to be counted. The RTAS call must set the routing registers appropriately in each of the islands to pass the signals down the debug bus as well as routing the signals from a particular island onto the bus. There is a second firmware RTAS call to reset the debug bus to the non pass thru state when the counters are not in use. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Add routines for managing PMU interruptsKevin Corry5-0/+101
The following routines are added to arch/powerpc/platforms/cell/pmu.c: cbe_clear_pm_interrupts() cbe_enable_pm_interrupts() cbe_disable_pm_interrupts() cbe_query_pm_interrupts() cbe_pm_irq() cbe_init_pm_irq() This also adds a routine in arch/powerpc/platforms/cell/interrupt.c and some macros in cbe_regs.h to manipulate the IIC_IR register: iic_set_interrupt_routing() Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Move PMU-related stuff to include/asm-powerpc/cell-pmu.hKevin Corry4-87/+92
Move some PMU-related macros and function prototypes from cbe_regs.h and pmu.h in arch/powerpc/platforms/cell/ to a new header at include/asm-powerpc/cell-pmu.h This is cleaner to use from the oprofile code, since that sits in arch/powerpc/oprofile, not in the cell platform directory. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: PMU register macrosKevin Corry1-1/+22
More macros for manipulating bits in the Cell PMU control registers. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Add symbol exports for oprofileArnd Bergmann1-0/+13
Add symbol-exports for the new routines in arch/powerpc/platforms/cell/pmu.c. They are needed for Oprofile, which can be built as a module. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>