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2014-12-12mtd: tests: abort torturetest on erase errorsBrian Norris1-1/+3
The torture test should quit once it actually induces an error in the flash. This step was accidentally removed during refactoring. Without this fix, the torturetest just continues infinitely, or until the maximum cycle count is reached. e.g.: ... [ 7619.218171] mtd_test: error -5 while erasing EB 100 [ 7619.297981] mtd_test: error -5 while erasing EB 100 [ 7619.377953] mtd_test: error -5 while erasing EB 100 [ 7619.457998] mtd_test: error -5 while erasing EB 100 [ 7619.537990] mtd_test: error -5 while erasing EB 100 ... Fixes: 6cf78358c94f ("mtd: mtd_torturetest: use mtd_test helpers") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: <stable@vger.kernel.org>
2014-12-12mtd: physmap_of: fix potential NULL dereferenceArd Biesheuvel1-5/+3
On device remove, when testing the cmtd field of an of_flash struct to decide whether it is a concatenated device or not, we get a false positive on cmtd == NULL, and dereference it subsequently. This may occur if of_flash_remove() is called from the cleanup path of of_flash_probe(). Instead, test for NULL first, and only then perform the test for a concatenated device. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: spi-nor: allow NULL as chip name and try to auto detect itRafał Miłecki1-3/+11
This will allow spi-nor users to plainly use JEDEC to detect flash chip. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: nand: gpmi: add raw oob access functionsBoris BREZILLON1-0/+18
Implement raw OOB access functions to retrieve OOB bytes when accessing the NAND in raw mode. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: nand: gpmi: add proper raw access supportBoris BREZILLON2-0/+185
Several MTD users (either in user or kernel space) expect a valid raw access support to NAND chip devices. This is particularly true for testing tools which are often touching the data stored in a NAND chip in raw mode to artificially generate errors. The GPMI drivers do not implemenent raw access functions, and thus rely on default HW_ECC scheme implementation. The default implementation consider the data and OOB area as properly separated in their respective NAND section, which is not true for the GPMI controller. In this driver/controller some OOB data are stored at the beginning of the NAND data area (these data are called metadata in the driver), then ECC bytes are interleaved with data chunk (which is similar to the HW_ECC_SYNDROME scheme), and eventually the remaining bytes are used as OOB data. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: nand: gpmi: add gpmi_copy_bits functionBoris BREZILLON2-0/+157
Add a new function to copy bits (not bytes) from a memory region to another one. This function is similar to memcpy except it acts at bit level. It is needed to implement GPMI raw access functions and adapt to the hardware ECC engine which does not pad ECC bits to the next byte boundary. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: spi-nor: factor out write_enable() for erase commandsBrian Norris3-14/+6
write_enable() was being duplicated to both m25p80.c and fsl-quadspi.c. But this should be handled within the spi-nor abstraction layer. At the same time, let's add write_disable() after erasing, so we don't leave the flash in a write-enabled state afterward. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <shijie.huang@intel.com>
2014-12-01mtd: spi-nor: add support for s25fl128sHuang Shijie1-0/+18
We need to store the six bytes ID for s25fl128s, since it shares the same five bytes with s25fl129p1. This patch adds a macro INFO6 which is used for the six bytes ID flash, and adds a new item for the s25fl128s. Signed-off-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: spi-nor: remove the jedec_id/ext_idHuang Shijie1-53/+45
The "id" array contains all the information about the JEDEC and the manufacturer ID info. This patch removes the jedec_id/ext_id from flash_info. Signed-off-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: spi-nor: add id/id_len for flash_info{}Huang Shijie1-14/+25
This patch adds the id/id_len fields for flash_info{}, and rewrite the INFO to fill them. And at last, we read out 6 bytes in the spi_nor_read_id(), and we use these new fields to parse out the correct flash_info. Signed-off-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-28mtd: nand: correct the comment of function nand_block_isreserved()Gu Zheng1-2/+2
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-28jffs2: Drop bogus if in commentGeert Uytterhoeven1-1/+1
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-mtd@lists.infradead.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25mtd: atmel_nand: replace memcpy32_toio/memcpy32_fromio with memcpyWu, Josh1-29/+10
There is no need to use memcpy32_toio/memcpy32_fromio to transfer data between memory and NFC sram. As the NFC sram is a also a memory space not an I/O space, we can just use memcpy(). We remove the __iomem prefix for NFC sram to avoid sparse warnings. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25mtd: cafe_nand: drop duplicate .write_page implementationBrian Norris1-45/+0
This write_page() function is functionally equivalent to the default in nand_base.c. Its only difference is in subpage programming support, which cafe_nand.c does not advertise, so the difference is negligible. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25mtd: m25p80: Add support for serial flash Spansion S25FL132KKnut Wohlrab2-3/+2
Signed-off-by: Knut Wohlrab <knut.wohlrab@de.bosch.com> Signed-off-by: Alison Chaiken <alison_chaiken@mentor.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25MTD: m25p80: fix inconsistency in m25p_ids compared to spi_nor_idsAlison Chaiken1-3/+3
As stated in a5b7616c5, "mtd: m25p80,spi-nor: Fix module aliases for m25p80", m25p_ids[] in m25p80.c needs to be kept in sync with spi_nor_ids[] in spi-nor.c. The change here corrects a misalignment. (We were missing m25px80 and we had a duplicate w25q128.) Signed-off-by: Alison Chaiken <alison_chaiken@mentor.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: <stable@vger.kernel.org> # 3.18+
2014-11-25mtd: spi-nor: improve wait-till-ready timeout loopBrian Norris1-4/+9
There are a few small issues with the timeout loop in spi_nor_wait_till_ready(): * The first operation should not be a reschedule; we should check the status register at least once to see if we're complete! * We should check the status register one last time after declaring the deadline has passed, to prevent a premature timeout error (this is theoretically possible if we sleep for a long time after the previous status register check). * Add an error message, so it's obvious if we ever hit a timeout. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
2014-11-25mtd: delete unnecessary checks before two function callsMarkus Elfring2-4/+2
The functions kfree() and pci_dev_put() test whether their argument is NULL and then return immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25mtd: nand: omap: Fix NAND enumeration on 3430 LDPRoger Quadros1-7/+0
3430LDP has NAND flash with 32 bytes OOB size which is sufficient to hold BCH8 codes but the small page check introduced in commit b491da7233d5 ("mtd: nand: omap: clean-up ecc layout for BCH ecc schemes") considers anything below 64 bytes unsuitable for BCH4/8/16. There is another bug in that code where it doesn't skip the check for OMAP_ECC_HAM1_CODE_SW. Get rid of that small page check code as it is insufficient and redundant because we are checking for OOB available bytes vs ecc layout before calling nand_scan_tail(). Fixes: b491da7233d5 ("mtd: nand: omap: clean-up ecc layout for BCH ecc schemes") Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25mtd: nand: add ATO manufacturer infoBrian Norris2-0/+2
Tested with ATO AFND1G08U3, 128MiB NAND. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25mtd: nand: print erase size on initRafał Miłecki1-2/+2
It may be useful info, e.g. if someone wants to use ubinize. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-20mtd: oobtest: correct printf() format specifier for 'size_t'Brian Norris1-1/+1
Fixes warning: drivers/mtd/tests/oobtest.c: In function 'memcmpshow': drivers/mtd/tests/oobtest.c:129: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'size_t' Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Sekhar Nori <nsekhar@ti.com>
2014-11-20mtd: nand: provide detailed description for raw read/write page methodsBoris BREZILLON1-2/+15
read_page_raw and write_page_raw method description is not clear enough. It clearly specifies that ECC correction should not be involved but does not talk about specific layout (by layout I mean where in-band and out-of-band data are stored on the NAND media) used by NAND/ECC controllers. Those specific layouts might impact MTD users and thus should be hidden (as already done in the standard NAND_ECC_HW_SYNDROME implementation). Clearly state this constraint in the nand_ecc_ctrl struct documentation. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-19mtd: mtd_oobtest: add bitflip_limit parameterRoger Quadros1-18/+47
It is common for NAND devices to have bitflip errors. Add a bitflip_limit parameter to specify how many bitflips per page we can tolerate without flagging an error. By default zero bitflips are tolerated. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-19mtd: mtd_oobtest: Show the verification error location and dataRoger Quadros1-7/+29
Add a function memcmpshow() that compares the 2 data buffers and shows the address:offset and data bytes on comparison failure. This function does not break at a comparison failure but runs the check for the whole data buffer. Use memcmpshow() instead of memcmp() for all the verification paths. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05fsl_ifc: Support all 8 IFC chip selectsAaron Sierra3-13/+31
Freescale's QorIQ T Series processors support 8 IFC chip selects within a memory map backward compatible with previous P Series processors which supported only 4 chip selects. Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: atmel_nand: make PMECC lookup table and offset property optionalJosh Wu3-6/+85
If there is no PMECC lookup table stored in ROM, or lookup table offset is not specified, PMECC driver should build it in DDR by itself. That make the PMECC driver work for some board which doesn't have PMECC lookup table in ROM. The PMECC use the BCH algorithm, so based on the build_gf_tables() function in lib/bch.c, we can build the Galois Field lookup table. For more information can refer to section 5.4 of PMECC controller application note: http://www.atmel.com/images/doc11127.pdf Signed-off-by: Josh Wu <josh.wu@atmel.com> Cc: devicetree@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: mxc_nand: use __iowrite32_copy for 32 bit copyKoul, Vinod1-7/+3
The driver was also using own method to do 32bit copy, turns out we have a kernel API so use that instead Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: intflmount: fix off by one error in INFTL_dumpVUchains()Dan Carpenter1-1/+1
The ->PUtable[] array has "->nb_blocks" number of elemetns so this comparison should be ">=" instead of ">". Otherwise it could result in a minor read beyond the end of an array. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: spi-nor: Add support for SST spi flashHarini Katakam1-0/+1
Add sst25wf080 to the spi-nor device id table. Signed-off-by: Harini Katakam <harinik@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: spi-nor: Add support for Fujitsu MB85RS1MT FRAMRostislav Lisovy1-0/+3
Tested with this particular FRAM chip Signed-off-by: Rostislav Lisovy <lisovy@merica.cz> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: nand: omap: Synchronize the access to the ECC engineRostislav Lisovy1-5/+7
The AM335x Technical Reference Manual (spruh73j.pdf) says "Because the ECC engine includes only one accumulation context, it can be allocated to only one chip-select at a time ... " (7.1.3.3.12.3). Since the commit 97a288ba2cfa ("ARM: omap2+: gpmc-nand: Use dynamic platform_device_alloc()") gpmc-nand driver supports multiple NAND flash devices connected to the single controller. Use global 'struct nand_hw_control' among multiple NAND instances to synchronize the access to the single ECC Engine. Tested with custom AM335x board using 2x NAND flash chips. Signed-off-by: Rostislav Lisovy <lisovy@merica.cz> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: spi-nor: Move n25q032 entry to Micron devices listChunhe Lan1-1/+1
Because n25q032 is the Micron SPI chip, move it to Micron devices list group. In order that know which Micron SPI chips have been support at a glance. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Huang Shijie <shijie8@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: dataflash: Remove use of tx_dmaMark Brown1-3/+3
We are trying to remove the legacy tx_dma and rx_dma fields from the spi_transfer structure. Currently dataflash uses tx_dma but only to make sure that it's set to 0 so we can remove this use by replacing with a zero initialisation of the entire spi_transfer struct. Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: spi-nor: drop replaceable wait-till-ready function pointerBrian Norris2-20/+10
We don't need to expose a 'wait-till-ready' interface to drivers. Status register polling should be handled by the core spi-nor.c library, and as of now, I see no need to provide a special driver-specific hook for it. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2014-11-05mtd: fsl-quadspi: drop wait-till-ready checksBrian Norris1-11/+0
spi-nor.c should be taking care of these now. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Huang Shijie <b32955@freescale.com> Reviewed-by: Marek Vasut <marex@denx.de>
2014-11-05mtd: m25p80: drop wait-till-ready checksBrian Norris2-11/+6
spi-nor.c should be taking care of these now. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2014-11-05mtd: spi-nor: move "wait-till-ready" checks into erase/write functionsBrian Norris1-27/+9
We shouldn't have *every* function checking if a previous write is complete; this should be done synchronously after each write/erase. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2014-11-05mtd: spi-nor: handle timeout errors in spi_nor_write()Brian Norris1-2/+5
The error label was unused here. It looks like we're missing at least one case that should be doing 'goto write_err'. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Huang Shijie <shijie8@gmail.com>
2014-11-05mtd: spi-nor: eliminate duplicate spi_nor_wait_till_{, fsr}_ready() codeBrian Norris1-32/+34
These functions were near-carbon-copies due to a small per-flash quirk. Let's add a new spi_nor::flags bitfield to support these types of quirks. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Graham Moore <grmoore@altera.com> Cc: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: update help of CONFIG_MTD_OF_PARTSMichal Sojka1-1/+1
The help text of CONFIG_MTD_OF_PARTS refers to additional documentation in booting-without-of.txt but this documentation was moved to another file in commit efcc2da3fd148c9acb7d7cf1d9800e0649f950fc (Stefan Roese: Factor MTD physmap bindings out of booting-without-of). This updates the help text to point to the right place. Signed-off-by: Michal Sojka <sojkam1@fel.cvut.cz> [Brian: fixed doc reference] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: nand: comment update, the DEPLETE1 command has goneGerhard Sittig1-1/+1
update a comment in nand_command_lp() about specific requirements of individual commands, the DEPLETE1 command was removed in the past and the comment no longer applied Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: spi-nor: fix the wrong dummy valueHuang Shijie2-2/+5
For the DDR Quad read, the dummy cycles maybe 3 or 6 which is less then 8. The dummy cycles is actually 8 for SPI fast/dual/quad read. This patch makes preparations for the DDR quad read, it fixes the wrong dummy value for both the spi-nor.c and m25p80.c. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: nand: Base BCH ECC bytes on required strengthJordan Friendshuh1-1/+1
NAND devices with page sizes over 4 KiB require more than 4-bits of ECC coverage. This patch calculates the value of ecc_bytes based on a still assumed 512-byte step size (13-bits) and the ecc_strength. Example: Micron M73A devices (8 KiB page) require 8-bit ECC per 512-byte Signed-off-by: Jordan Friendshuh <jfriendshuh@xes-inc.com> Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-04mtd: nand: gpio: improve comments about GPIO assisted operationGerhard Sittig2-3/+7
The drivers/mtd/nand/gpio.c driver does not GPIO bitbang the complete NAND protocol, but instead is GPIO _assisted_ -- a memory mapped interface communicates commands and data, and only few control signals are connected to GPIO pins. Expand comments in the driver source and in the Kconfig description to better reflect the very nature of the driver. The previous text could be mistaken for complete GPIO bitbanging. Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-04devicetree: bindings: improve description for GPIO assisted NAND flashGerhard Sittig1-7/+7
Expand the description of the 'gpios' property in the GPIO assisted NAND flash binding, to explicitly list the required GPIO pin references and their order. Update the example section to individually bracket the GPIO references, and capitalize the signal names for improved readability. Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-10-29MTD: merge 3.18 development into -next developmentBrian Norris2-1/+3
To keep the two paths in sync
2014-10-29mtd: cfi_cmdset_0001.c: fix resume for LH28F640BF chipsDmitry Eremin-Solenikov1-0/+2
After '#echo mem > /sys/power/state' some devices can not be properly resumed because apparently the MTD Partition Configuration Register has been reset to default thus the rootfs cannot be mounted cleanly on resume. An example of this can be found in the SA-1100 Developer's Manual at 9.5.3.3 where the second step of the Sleep Shutdown Sequence is described: "An internal reset is applied to the SA-1100. All units are reset...". As workaround we refresh the PCR value as done initially on chip setup. This behavior and the fix are confirmed by our tests done on 2 different Zaurus collie units with kernel 3.17. Fixes: 812c5fa82bae: ("mtd: cfi_cmdset_0001.c: add support for Sharp LH28F640BF NOR") Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Cc: <stable@vger.kernel.org> # 3.16+ Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-10-29mtd: omap: fix mtd devices not showing upFrans Klaver1-1/+1
Since commit 6d178ef2fd5e ("mtd: nand: Move ELM driver and rename as omap_elm"), I don't have any mtd devices present on my am335x. This changes the link order of the omap_elm and omap2 objects, causing them to probe in the wrong order. To fix this, make elm_config defer probing until the omap_elm driver is actually loaded. Signed-off-by: Frans Klaver <frans.klaver@xsens.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-10-29mtd: nand: add sunxi NFC dt bindings docBoris BREZILLON1-0/+45
Add the sunxi NAND Flash Controller dt bindings documentation. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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