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2020-07-01drm/amdgpu: Enable Multi Media Hub (MMHUB) Clock Gating for sienna_cichlid.Likun Gao1-0/+1
2020-07-01drm/amd/amdgpu: add athub ls supportKenneth Feng1-1/+2
2020-07-01drm/amd/amdgpu: add IH cg supportKenneth Feng1-1/+2
2020-07-01drm/amd/amdgpu: add HDP mgcg and ls supportKenneth Feng1-1/+3
2020-07-01drm/amd/amdgpu: fix the HDP LS/DS/SD programmingKenneth Feng1-0/+10
2020-07-01drm/amdgpu: update golden setting for gfx10.3Likun Gao1-1/+3
2020-07-01drm/amdgpu: set the LMI ctrl and reset earlierLeo Liu1-9/+9
2020-07-01drm/amdgpu: fix the PSP front door loading VCN firmwareLeo Liu1-2/+2
2020-07-01drm/amdgpu: change the offset for VCN FW cache windowLeo Liu1-3/+0
2020-07-01drm/amdgpu: open GFX clock gating for sienna_cichlidLikun Gao1-1/+4
2020-07-01drm/amdgpu: switch to query reserved fb size from vbios (v3)Hawking Zhang1-5/+16
2020-07-01drm/amdgpu: add atomfirmware helper funciton to query reserved fb sizeHawking Zhang2-0/+39
2020-07-01drm/amdgpu: add firmware_info v3_4 structure for Sienna_CichlidHawking Zhang1-0/+36
2020-07-01drm/amdgpu: only send one sdma firmware for sienna_cichlidLikun Gao1-0/+9
2020-07-01drm/amdgpu: drop gfx_v10_0_tiling_mode_table_initHawking Zhang1-8/+0
2020-07-01drm/amdgpu: support query vram info for sienna_cichlidHawking Zhang1-0/+22
2020-07-01drm/amdgpu: add vram_info v2_5 in atomfirmware headerHawking Zhang1-0/+124
2020-07-01drm/amdgpu: disable gfxoff for sienna_cichlidLikun Gao1-0/+3
2020-07-01drm/amdgpu: add cp firmware backdoor loading trigerLikun Gao1-0/+37
2020-07-01drm/amdgpu: force pa_sc_tile_steering_override to 0 for gfx10.3Hawking Zhang1-13/+8
2020-07-01drm/amdgpu/gfx10: add gc golden setting for sienna_cichlidLikun Gao1-0/+55
2020-07-01drm/amdgpu: enable JPEG3.0 for Sienna_CichlidLeo Liu1-0/+2
2020-07-01drm/amdgpu: enable JPEG3.0 PG and CG for Sienna_CichlidLeo Liu1-2/+4
2020-07-01drm/amdgpu: add Sienna_Cichlid JPEG PG and CG supportLeo Liu1-0/+129
2020-07-01drm/amdgpu: add JPEG3.0 support for Sienna_CichlidLeo Liu3-1/+515
2020-07-01drm/amdgpu: enable VCN3.0 for Sienna_CichlidLeo Liu1-0/+2
2020-07-01drm/amdgpu: add Sienna_Cichlid VCN to the VCN familyLeo Liu1-0/+5
2020-07-01drm/amdgpu: enable VCN3.0 PG and CG for Sienna_CichlidLeo Liu1-2/+2
2020-07-01drm/amdgpu: add Sienna_Cichlid VCN PG and CG support (v2)Leo Liu1-0/+332
2020-07-01drm/amdgpu: add VCN3.0 support for Sienna_CichlidLeo Liu4-0/+1002
2020-07-01drm/amdgpu/mes: correct register offset for sienna_cichlidLikun Gao1-4/+35
2020-07-01drm/amdgpu: update the num of queue per pipe for mec on sienna_cichlidLikun Gao1-1/+8
2020-07-01drm/amdgpu: add mes block to sienna_cichlidJack Xiao1-0/+2
2020-07-01drm/amdgpu/mes10.1: update mes initializationJack Xiao1-5/+15
2020-07-01drm/amdgpu: no need to set up GPU scheduler for mes ringJack Xiao1-2/+3
2020-07-01drm/amdgpu/psp: convert amdgpu mes ucode typeJack Xiao1-0/+6
2020-07-01drm/amdgpu: upload mes firmware to gpu bufferJack Xiao1-0/+14
2020-07-01drm/amdgpu/mes10.1: copy mes fw info into global fw arrayJack Xiao1-0/+17
2020-07-01drm/amdgpu/mes10.1: add sienna_cichlid mes firmware supportJack Xiao1-0/+4
2020-07-01drm/amdgpu/mes10.1: implement setting hardware resourcesJack Xiao1-0/+41
2020-07-01drm/amdgpu/mes10.1: implement querying the scheduler statusJack Xiao1-0/+19
2020-07-01drm/amdgpu/mes10.1: implement removing hardware queueJack Xiao1-1/+18
2020-07-01drm/amdgpu/mes10.1: implement adding hardware queueJack Xiao1-1/+49
2020-07-01drm/amdgpu/mes10.1: add the helper function for mes command submissionJack Xiao1-0/+30
2020-07-01drm/amdgpu/mes10.1: add the mes fw apiJack Xiao2-0/+406
2020-07-01drm/amdgpu/mes10.1: enable the mes ring during initializationJack Xiao1-0/+31
2020-07-01drm/amdgpu/mes10.1: install mes queue via kiqJack Xiao1-0/+27
2020-07-01drm/amdgpu/mes10.1: install mes queue by register programmingJack Xiao1-0/+62
2020-07-01drm/amdgpu/mes10.1: initialize the mqdJack Xiao1-0/+130
2020-07-01drm/amdgpu/mes10.1: allocate mqd bufferJack Xiao1-0/+37
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