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2022-07-20can: pch_can: do not report txerr and rxerr during bus-offVincent Mailhol1-3/+3
During bus off, the error count is greater than 255 and can not fit in a u8. Fixes: 0c78ab76a05c ("pch_can: Add setting TEC/REC statistics processing") Link: https://lore.kernel.org/all/20220719143550.3681-2-mailhol.vincent@wanadoo.fr Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-20drm/imx/dcss: Add missing of_node_put() in fail pathLiang He1-0/+3
In dcss_dev_create() and dcss_dev_destroy(), we should call of_node_put() in fail path or before the dcss's destroy as of_graph_get_port_by_id() has increased the refcount. Fixes: 9021c317b770 ("drm/imx: Add initial support for DCSS on iMX8MQ") Signed-off-by: Liang He <windhl@126.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220714081337.374761-1-windhl@126.com
2022-07-20mailmap: update Baolin Wang's emailBaolin Wang1-0/+4
I recently switched to my Alibaba email address. So add aliases for my previous email addresses. Signed-off-by: Baolin Wang <baolin.wang@linux.alibaba.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-20ARM: dts: lan966x: add clock gating registerMichael Walle1-1/+1
The clock controller supports an optional clock gating register. This is necessary to expose the USB device clock, for example. Add it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220707132500.1708020-1-michael@walle.cc
2022-07-20powerpc/64s: Disable stack variable initialisation for prom_initMichael Ellerman1-0/+1
With GCC 12 allmodconfig prom_init fails to build: Error: External symbol 'memset' referenced from prom_init.c make[2]: *** [arch/powerpc/kernel/Makefile:204: arch/powerpc/kernel/prom_init_check] Error 1 The allmodconfig build enables KASAN, so all calls to memset in prom_init should be converted to __memset by the #ifdefs in asm/string.h, because prom_init must use the non-KASAN instrumented versions. The build failure happens because there's a call to memset that hasn't been caught by the pre-processor and converted to __memset. Typically that's because it's a memset generated by the compiler itself, and that is the case here. With GCC 12, allmodconfig enables CONFIG_INIT_STACK_ALL_PATTERN, which causes the compiler to emit memset calls to initialise on-stack variables with a pattern. Because prom_init is non-user-facing boot-time only code, as a workaround just disable stack variable initialisation to unbreak the build. Reported-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220718134418.354114-1-mpe@ellerman.id.au
2022-07-19RISC-V: Support for 64bit hartid on RV64 platformsPalmer Dabbelt12-43/+60
The hartid can be a 64bit value on RV64 platforms. This series updates the code so that 64bit hartid can be supported on RV64 platforms. * 'riscv-64bit_hartid' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git: riscv/efi_stub: Add 64bit boot-hartid support on RV64 riscv: cpu: Add 64bit hartid support on RV64 riscv: smp: Add 64bit hartid support on RV64 riscv: spinwait: Fix hartid variable type riscv: cpu_ops_sbi: Add 64bit hartid support on RV64
2022-07-19drm/i915/guc: support v69 in parallel to v70Daniele Ceraolo Spurio7-62/+417
This patch re-introduces support for GuC v69 in parallel to v70. As this is a quick fix, v69 has been re-introduced as the single "fallback" guc version in case v70 is not available on disk and only for platforms that are out of force_probe and require the GuC by default. All v69 specific code has been labeled as such for easy identification, and the same was done for all v70 functions for which there is a separate v69 version, to avoid accidentally calling the wrong version via the unlabeled name. When the fallback mode kicks in, a drm_notice message is printed in dmesg to inform the user of the required update. The existing logging of the fetch function has also been updated so that we no longer complain immediately if we can't find a fw and we only throw an error if the fetch of both the base and fallback blobs fails. The plan is to follow this up with a more complex rework to allow for multiple different GuC versions to be supported at the same time. v2: reduce the fallback to platform that require it, switch to firmware_request_nowarn(), improve logs. Fixes: 2584b3549f4c ("drm/i915/guc: Update to GuC version 70.1.1") Link: https://lists.freedesktop.org/archives/intel-gfx/2022-July/301640.html Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Dave Airlie <airlied@gmail.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220718230732.1409641-1-daniele.ceraolospurio@intel.com (cherry picked from commit 774ce1510e6ccb9c0752d4aa7a9ff3624b3db3f3) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-19drm/i915/guc: Support programming the EU priority in the GuC descriptorMatthew Brost3-11/+33
In GuC submission mode the EU priority must be updated by the GuC rather than the driver as the GuC owns the programming of the context descriptor. Given that the GuC code uses the GuC priorities, we can't use a generic function using i915 priorities for both execlists and GuC submission. The existing function has therefore been pushed to the execlists back-end while a new one has been added for GuC. v2: correctly use the GuC prio. Cc: John Harrison <john.c.harrison@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504234636.2119794-1-daniele.ceraolospurio@intel.com (cherry picked from commit a5c89f7c43c12c592a882a0ec2a15e9df0011e80) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-20platform/chrome: cros_kbd_led_backlight: fix build warningTzung-Bi Shih1-5/+5
drivers/platform/chrome/cros_kbd_led_backlight.c got a new build warning when using the randconfig in [1]: >>> warning: unused variable 'keyboard_led_drvdata_ec_pwm' The warning happens when CONFIG_CROS_EC is set but CONFIG_OF is not set. Reproduce: - mkdir build_dir - wget [1] -O build_dir/.config - COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 \ O=build_dir ARCH=s390 SHELL=/bin/bash drivers/platform/chrome/ Fix the warning by using __maybe_unused. Also use IS_ENABLED() because CROS_EC is a tristate. [1]: https://download.01.org/0day-ci/archive/20220717/202207170538.MR39dw8m-lkp@intel.com/config Fixes: 40f58143745e ("platform/chrome: cros_kbd_led_backlight: support EC PWM backend") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220718105047.2356542-1-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit test for cros_ec_cmd()Tzung-Bi Shih1-0/+48
cros_ec_cmd() is a wrapper of cros_ec_cmd_xfer_status(). Add Kunit test for cros_ec_cmd(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-8-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for get_sensor_countTzung-Bi Shih3-0/+182
cros_ec_get_sensor_count() gets number of MEMS sensors. Add Kunit tests for cros_ec_get_sensor_count(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-7-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for check_featuresTzung-Bi Shih1-0/+77
cros_ec_check_features() gets EC features if it hasn't had cache, and checks whether the given EC_FEATURE_* is supported or not. Add Kunit tests for cros_ec_check_features(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-6-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for get_host_eventTzung-Bi Shih1-0/+59
cros_ec_get_host_event() performs some sanity checks, parses `ec_dev->event_data.data.host_event`, and returns bitmap of EC_HOST_EVENT_*. Add Kunit tests for cros_ec_get_host_event(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-5-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for get_next_eventTzung-Bi Shih1-0/+266
cros_ec_get_next_event() gets events from EC. It consists of 3 versions of event retrieval: 1. No MKBP event. 2. MKBP event version 0. 3. MKBP event version >0. Add Kunit tests for cros_ec_get_next_event(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-4-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit test for cros_ec_map_error()Tzung-Bi Shih1-0/+49
cros_ec_cmd_xfer_status() is the only exported function that calls static function cros_ec_map_error(). Add Kunit test for cros_ec_map_error() through calling cros_ec_cmd_xfer_status(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-3-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for cmd_xfer_statusTzung-Bi Shih1-0/+42
cros_ec_cmd_xfer_status() calls cros_ec_cmd_xfer() and cros_ec_map_error(). Given that there are already test cases for cros_ec_cmd_xfer(), only add basic Kunit tests for cros_ec_cmd_xfer_status(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-2-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: return -EPROTO if empty payloadTzung-Bi Shih1-0/+5
cros_ec_wait_until_complete() sends EC_CMD_GET_COMMS_STATUS which expects to receive sizeof(struct ec_response_get_comms_status) from cros_ec_xfer_command(). Return -EPROTO if cros_ec_xfer_command() returns 0. Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-11-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit test for empty payloadTzung-Bi Shih1-0/+31
cros_ec_wait_until_complete() sends EC_CMD_GET_COMMS_STATUS which expects to receive sizeof(struct ec_response_get_comms_status) from cros_ec_xfer_command(). Add Kunit test and expect to receive an error code when cros_ec_xfer_command() returns 0. Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220718050914.2267370-10-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: return -EAGAIN when retries timed outTzung-Bi Shih1-0/+3
While EC_COMMS_STATUS_PROCESSING flag is still on after it tries EC_COMMAND_RETRIES times for sending EC_CMD_GET_COMMS_STATUS, cros_ec_wait_until_complete() doesn't return an error code. Return -EAGAIN in the case instead. Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220718050914.2267370-9-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: change Kunit expectation when timed outTzung-Bi Shih1-3/+1
While EC_COMMS_STATUS_PROCESSING flag is still on after it tries EC_COMMAND_RETRIES times for sending EC_CMD_GET_COMMS_STATUS, cros_ec_wait_until_complete() doesn't return an error code. Change the expectation to an error code. Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-8-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: separate cros_ec_wait_until_complete()Tzung-Bi Shih1-37/+33
EC returns EC_RES_IN_PROGRESS if the host command needs more time to complete. Whenever receives the return code, cros_ec_send_command() sends EC_CMD_GET_COMMS_STATUS to query the command status. Separate cros_ec_wait_until_complete() from cros_ec_send_command(). It sends EC_CMD_GET_COMMS_STATUS and waits until the previous command was completed, or encountered error, or timed out. Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220718050914.2267370-7-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: separate cros_ec_xfer_command()Tzung-Bi Shih1-3/+10
cros_ec_send_command() has extra logic to handle EC_RES_IN_PROGRESS. Separate the command transfer part into cros_ec_xfer_command() so that other functions can re-use it. Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-6-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for cros_ec_send_command()Tzung-Bi Shih3-0/+289
cros_ec_cmd_xfer() is the only exported function that calls static function cros_ec_send_command(). Add Kunit tests for cros_ec_send_command() through calling cros_ec_cmd_xfer(). Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-5-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for cros_ec_cmd_xfer()Tzung-Bi Shih1-0/+149
cros_ec_cmd_xfer() transfers the given command and data if any. It performs some sanity checks and calls cros_ec_send_command(). Add Kunit tests for cros_ec_cmd_xfer(). Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-4-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add "cros_ec_" prefix to send_command()Tzung-Bi Shih1-8/+7
To be neat, add "cros_ec_" prefix to static function send_command(). Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-3-tzungbi@kernel.org
2022-07-19Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queueJakub Kicinski3-11/+17
Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2022-07-18 This series contains updates to igc driver only. Kurt Kanzenbach adds support for Qbv schedules where one queue stays open in consecutive entries. Sasha removes an unused define and field. * '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: igc: Remove forced_speed_duplex value igc: Remove MSI-X PBA Clear register igc: Lift TAPRIO schedule restriction ==================== Link: https://lore.kernel.org/r/20220718180109.4114540-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19Merge branch '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queueJakub Kicinski5-26/+81
Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2022-07-18 This series contains updates to iavf driver only. Przemyslaw fixes handling of multiple VLAN requests to account for individual errors instead of rejecting them all. He removes incorrect implementations of ETHTOOL_COALESCE_MAX_FRAMES and ETHTOOL_COALESCE_MAX_FRAMES_IRQ. He also corrects an issue with NULL pointer caused by improper handling of dummy receive descriptors. Finally, he corrects debug prints reporting an unknown state. * '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: iavf: Fix missing state logs iavf: Fix handling of dummy receive descriptors iavf: Disallow changing rx/tx-frames and rx/tx-frames-irq iavf: Fix VLAN_V2 addition/rejection ==================== Link: https://lore.kernel.org/r/20220718174807.4113582-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19Documentation: fix udp_wmem_min in ip-sysctl.rstXin Long1-5/+1
UDP doesn't support tx memory accounting, and sysctl udp_wmem_min is not really used anywhere. So we should fix the description in ip-sysctl.rst accordingly. Fixes: 95766fff6b9a ("[UDP]: Add memory accounting.") Signed-off-by: Xin Long <lucien.xin@gmail.com> Link: https://lore.kernel.org/r/c880a963d9b1fb5f442ae3c9e4dfa70d45296a16.1658167019.git.lucien.xin@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19net: ethernet: mtk_ppe: fix possible NULL pointer dereference in mtk_flow_get_wdma_infoLorenzo Bianconi1-0/+3
odev pointer can be NULL in mtk_flow_offload_replace routine according to the flower action rules. Fix possible NULL pointer dereference in mtk_flow_get_wdma_info. Fixes: a333215e10cb5 ("net: ethernet: mtk_eth_soc: implement flow offloading to WED devices") Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/4e1685bc4976e21e364055f6bee86261f8f9ee93.1658137753.git.lorenzo@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19net/sched: remove qdisc_root_lock() helperDavide Caratti1-19/+0
the last caller has been removed with commit 96f5e66e8a79 ("mac80211: fix aggregation for hardware with ampdu queues"), so it's safe to remove this function. Signed-off-by: Davide Caratti <dcaratti@redhat.com> Link: https://lore.kernel.org/r/703d549e3088367651d92a059743f1be848d74b7.1658133689.git.dcaratti@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19r8152: fix a WOL issueHayes Wang1-2/+14
This fixes that the platform is waked by an unexpected packet. The size and range of FIFO is different when the device enters S3 state, so it is necessary to correct some settings when suspending. Regardless of jumbo frame, set RMS to 1522 and MTPS to MTPS_DEFAULT. Besides, enable MCU_BORW_EN to update the method of calculating the pointer of data. Then, the hardware could get the correct data. Fixes: 195aae321c82 ("r8152: support new chips") Signed-off-by: Hayes Wang <hayeswang@realtek.com> Link: https://lore.kernel.org/r/20220718082120.10957-391-nic_swsd@realtek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19riscv/efi_stub: Add 64bit boot-hartid support on RV64Sunil V L1-3/+10
The boot-hartid can be a 64bit value on RV64 platforms but the "boot-hartid" in DT is assumed to be 32bit only. Detect the size of the "boot-hartid" in DT and use 32bit or 64bit read appropriately. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Link: https://lore.kernel.org/r/20220527051743.2829940-6-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-19riscv: cpu: Add 64bit hartid support on RV64Sunil V L7-32/+42
The hartid can be a 64bit value on RV64 platforms. Add support for 64bit hartid in riscv_of_processor_hartid() and update its callers. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20220527051743.2829940-5-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-19riscv: smp: Add 64bit hartid support on RV64Sunil V L2-4/+4
The hartid can be a 64bit value on RV64 platforms. Modify the hartid parameter in riscv_hartid_to_cpuid() as unsigned long so that it can hold 64bit value on RV64 platforms. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20220527051743.2829940-4-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-19riscv: spinwait: Fix hartid variable typeSunil V L1-2/+2
The hartid variable is of type int but compared with ULONG_MAX(INVALID_HARTID). This issue is fixed by changing the hartid variable type to unsigned long. Fixes: c78f94f35cf6 ("RISC-V: Use __cpu_up_stack/task_pointer only for spinwait method") Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20220527051743.2829940-3-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-19riscv: cpu_ops_sbi: Add 64bit hartid support on RV64Sunil V L1-2/+2
The hartid can be a 64bit value on RV64 platforms. Modify the hartid variable type to unsigned long so that it can hold 64bit value on RV64 platforms. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20220527051743.2829940-2-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-19Documentation/cxl: Use a double line break between entriesDan Williams1-0/+16
Make it easier to read delineations between the "Description" line break, new paragraph line breaks, and new entries. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/165784324750.1758207.10379257962719807754.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19drm/panel-edp: Fix variable typo when saving hpd absent delay from DTNícolas F. R. A. Prado1-1/+1
The value read from the "hpd-absent-delay-ms" property in DT was being saved to the wrong variable, overriding the hpd_reliable delay. Fix the typo. Fixes: 5540cf8f3e8d ("drm/panel-edp: Implement generic "edp-panel"s probed by EDID") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: André Almeida <andrealmeid@igalia.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220719203857.1488831-4-nfraprado@collabora.com
2022-07-19cxl/port: Read CDAT tableIra Weiny5-0/+244
The per-device CDAT data provides performance data that is relevant for mapping which CXL devices can participate in which CXL ranges by QTG (QoS Throttling Group) (per ECN: CXL 2.0 CEDT CFMWS & QTG_DSM) [1]. The QTG association specified in the ECN is advisory. Until the cxl_acpi driver grows support for invoking the QTG _DSM method the CDAT data is only of interest to userspace that may need it for debug purposes. Search the DOE mailboxes available, query CDAT data, cache the data and make it available via a sysfs binary attribute per endpoint at: /sys/bus/cxl/devices/endpointX/CDAT ...similar to other ACPI-structured table data in /sys/firmware/ACPI/tables. The CDAT is relative to 'struct cxl_port' objects since switches in addition to endpoints can host a CDAT instance. Switch CDAT support is not implemented. This does not support table updates at runtime. It will always provide whatever was there when first cached. It is also the case that table updates are not expected outside of explicit DPA address map affecting commands like Set Partition with the immediate flag set. Given that the driver does not support Set Partition with the immediate flag set there is no current need for update support. Link: https://www.computeexpresslink.org/spec-landing [1] Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> [djbw: drop in-kernel parsing infra for now, and other minor fixups] Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20220719205249.566684-7-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW}Ira Weiny1-0/+16
Many binary attributes need to limit access to CAP_SYS_ADMIN only; ie many binary attributes specify is_visible with 0400 or 0600. Make setting the permissions of such attributes more explicit by defining BIN_ATTR_ADMIN_{RO,RW}. Cc: Bjorn Helgaas <bhelgaas@google.com> Suggested-by: Dan Williams <dan.j.williams@intel.com> Suggested-by: Krzysztof Wilczyński <kw@linux.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-6-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19cxl/pci: Create PCI DOE mailbox's for memory devicesIra Weiny3-0/+48
DOE mailbox objects will be needed for various mailbox communications with each memory device. Iterate each DOE mailbox capability and create PCI DOE mailbox objects as found. It is not anticipated that this is the final resting place for the iteration of the DOE devices. The support of switch ports will drive this code into the PCIe side. In this imagined architecture the CXL port driver would then query into the PCI device for the DOE mailbox array. For now creating the mailboxes in the CXL port is good enough for the endpoints. Later PCIe ports will need to support this to support switch ports more generically. Cc: Dan Williams <dan.j.williams@intel.com> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: Lukas Wunner <lukas@wunner.de> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-5-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19PCI/DOE: Add DOE mailbox support functionsJonathan Cameron6-1/+646
Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based mailbox with standard protocol discovery. Each mailbox is accessed through a DOE Extended Capability. Each DOE mailbox must support the DOE discovery protocol in addition to any number of additional protocols. Define core PCIe functionality to manage a single PCIe DOE mailbox at a defined config space offset. Functionality includes iterating, creating, query of supported protocol, and task submission. Destruction of the mailboxes is device managed. Cc: "Li, Ming" <ming4.li@intel.com> Cc: Bjorn Helgaas <helgaas@kernel.org> Cc: Matthew Wilcox <willy@infradead.org> Acked-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Co-developed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-4-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19PCI: Replace magic constant for PCI Sig Vendor IDIra Weiny1-1/+1
Replace the magic value in pci_bus_crs_vendor_id() with PCI_VENDOR_ID_PCI_SIG. Reviewed-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-3-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19PCI: Add vendor ID for the PCI SIGJonathan Cameron1-0/+1
This ID is used in DOE headers to identify protocols that are defined within the PCI Express Base Specification, PCIe r6.0, sec 6.30.1.1 table 6-32. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20220719205249.566684-2-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19arm64: dts: qcom: qrb5165-rb5: Fix 'dtbs_check' error for led nodesBhupesh Sharma1-4/+3
make dtbs_check currently reports the following errors with qrb5165-rb5 led nodes: arch/arm64/boot/dts/qcom/qrb5165-rb5.dtb: leds: 'bt', 'user4', 'wlan' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Fix the same. Also while at it, fix a blank line issue in the led node. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220719205058.1004942-3-bhupesh.sharma@linaro.org
2022-07-19arm64: dts: qcom: qrb5165-rb5: Fix 'dtbs_check' error for lpg nodesBhupesh Sharma1-0/+3
make dtbs_check currently reports the following warnings with qrb5165-rb5 lpg nodes: arch/arm64/boot/dts/qcom/qrb5165-rb5.dts: Warning (reg_format): /soc@0/spmi@c440000/pmic@5/lpg/led@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) arch/arm64/boot/dts/qcom/qrb5165-rb5.dts: Warning (avoid_default_addr_size): /soc@0/spmi@c440000/pmic@5/lpg/led@1: Relying on default #address-cells value Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220719205058.1004942-2-bhupesh.sharma@linaro.org
2022-07-19ipc: mqueue: fix possible memory leak in init_mqueue_fs()Hangyu Hua1-0/+1
commit db7cfc380900 ("ipc: Free mq_sysctls if ipc namespace creation failed") Here's a similar memory leak to the one fixed by the patch above. retire_mq_sysctls need to be called when init_mqueue_fs fails after setup_mq_sysctls. Fixes: dc55e35f9e81 ("ipc: Store mqueue sysctls in the ipc namespace") Signed-off-by: Hangyu Hua <hbh25y@gmail.com> Link: https://lkml.kernel.org/r/20220715062301.19311-1-hbh25y@gmail.com Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2022-07-19of: overlay: Simplify of_overlay_fdt_apply() tailGeert Uytterhoeven1-7/+2
It does not hurt to fill in the changeset id while the mutex is still held. After doing so, the function tails for the success and failure cases become identical, so they can be unified. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Frank Rowand <frank.rowand@sony.com> Tested-by: Frank Rowand <frank.rowand@sony.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/6a3357a8f7f29704350e3ffae768ee8a462b54d3.1657893306.git.geert+renesas@glider.be
2022-07-19of: overlay: Move devicetree_corrupt() check upGeert Uytterhoeven1-6/+5
There is no point in doing several preparatory steps in of_overlay_fdt_apply(), only to see of_overlay_apply() return early because of a corrupt device tree. Move the check for a corrupt device tree from of_overlay_apply() to of_overlay_fdt_apply(), to check for this as early as possible. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Frank Rowand <frank.rowand@sony.com> Tested-by: Frank Rowand <frank.rowand@sony.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/c91ce7112eb5167ea46a43d8a980e76b920010ba.1657893306.git.geert+renesas@glider.be
2022-07-19drm/i915/guc: support v69 in parallel to v70Daniele Ceraolo Spurio7-62/+417
This patch re-introduces support for GuC v69 in parallel to v70. As this is a quick fix, v69 has been re-introduced as the single "fallback" guc version in case v70 is not available on disk and only for platforms that are out of force_probe and require the GuC by default. All v69 specific code has been labeled as such for easy identification, and the same was done for all v70 functions for which there is a separate v69 version, to avoid accidentally calling the wrong version via the unlabeled name. When the fallback mode kicks in, a drm_notice message is printed in dmesg to inform the user of the required update. The existing logging of the fetch function has also been updated so that we no longer complain immediately if we can't find a fw and we only throw an error if the fetch of both the base and fallback blobs fails. The plan is to follow this up with a more complex rework to allow for multiple different GuC versions to be supported at the same time. v2: reduce the fallback to platform that require it, switch to firmware_request_nowarn(), improve logs. Fixes: 2584b3549f4c ("drm/i915/guc: Update to GuC version 70.1.1") Link: https://lists.freedesktop.org/archives/intel-gfx/2022-July/301640.html Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Dave Airlie <airlied@gmail.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220718230732.1409641-1-daniele.ceraolospurio@intel.com