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2022-07-13KVM: sefltests: Use CPUID_* instead of X86_FEATURE_* for one-off usageSean Christopherson5-15/+12
Rename X86_FEATURE_* macros to CPUID_* in various tests to free up the X86_FEATURE_* names for KVM-Unit-Tests style CPUID automagic where the function, leaf, register, and bit for the feature is embedded in its macro value. No functional change intended. Signed-off-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20220614200707.3315957-3-seanjc@google.com
2022-07-13KVM: selftests: Set KVM's supported CPUID as vCPU's CPUID during recreateSean Christopherson7-7/+26
On x86-64, set KVM's supported CPUID as the vCPU's CPUID when recreating a VM+vCPU to deduplicate code for state save/restore tests, and to provide symmetry of sorts with respect to vm_create_with_one_vcpu(). The extra KVM_SET_CPUID2 call is wasteful for Hyper-V, but ultimately is nothing more than an expensive nop, and overriding the vCPU's CPUID with the Hyper-V CPUID information is the only known scenario where a state save/restore test wouldn't need/want the default CPUID. Opportunistically use __weak for the default vm_compute_max_gfn(), it's provided by tools' compiler.h. Signed-off-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20220614200707.3315957-2-seanjc@google.com
2022-07-13KVM: selftests: Fix filename reporting in guest assertsColton Lewis41-102/+68
Fix filename reporting in guest asserts by ensuring the GUEST_ASSERT macro records __FILE__ and substituting REPORT_GUEST_ASSERT for many repetitive calls to TEST_FAIL. Previously filename was reported by using __FILE__ directly in the selftest, wrongly assuming it would always be the same as where the assertion failed. Signed-off-by: Colton Lewis <coltonlewis@google.com> Reported-by: Ricardo Koller <ricarkol@google.com> Fixes: 4e18bccc2e5544f0be28fc1c4e6be47a469d6c60 Link: https://lore.kernel.org/r/20220615193116.806312-5-coltonlewis@google.com [sean: convert more TEST_FAIL => REPORT_GUEST_ASSERT instances] Signed-off-by: Sean Christopherson <seanjc@google.com>
2022-07-13KVM: selftests: Write REPORT_GUEST_ASSERT macros to pair with GUEST_ASSERTColton Lewis1-0/+42
Write REPORT_GUEST_ASSERT macros to pair with GUEST_ASSERT to abstract and make consistent all guest assertion reporting. Every report includes an explanatory string, a filename, and a line number. Signed-off-by: Colton Lewis <coltonlewis@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Link: https://lore.kernel.org/r/20220615193116.806312-4-coltonlewis@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2022-07-13KVM: selftests: Increase UCALL_MAX_ARGS to 7Colton Lewis1-1/+1
Increase UCALL_MAX_ARGS to 7 to allow GUEST_ASSERT_4 to pass 3 builtin ucall arguments specified in guest_assert_builtin_args plus 4 user-specified arguments. Signed-off-by: Colton Lewis <coltonlewis@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Link: https://lore.kernel.org/r/20220615193116.806312-3-coltonlewis@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2022-07-13KVM: selftests: enumerate GUEST_ASSERT argumentsColton Lewis1-0/+8
Enumerate GUEST_ASSERT arguments to avoid magic indices to ucall.args. Signed-off-by: Colton Lewis <coltonlewis@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Link: https://lore.kernel.org/r/20220615193116.806312-2-coltonlewis@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2022-07-13KVM: x86: WARN only once if KVM leaves a dangling userspace I/O requestSean Christopherson1-2/+4
Change a WARN_ON() to separate WARN_ON_ONCE() if KVM has an outstanding PIO or MMIO request without an associated callback, i.e. if KVM queued a userspace I/O exit but didn't actually exit to userspace before moving on to something else. Warning on every KVM_RUN risks spamming the kernel if KVM gets into a bad state. Opportunistically split the WARNs so that it's easier to triage failures when a WARN fires. Deliberately do not use KVM_BUG_ON(), i.e. don't kill the VM. While the WARN is all but guaranteed to fire if and only if there's a KVM bug, a dangling I/O request does not present a danger to KVM (that flag is truly truly consumed only in a single emulator path), and any such bug is unlikely to be fatal to the VM (KVM essentially failed to do something it shouldn't have tried to do in the first place). In other words, note the bug, but let the VM keep running. Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Link: https://lore.kernel.org/r/20220711232750.1092012-4-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2022-07-13KVM: x86: Set error code to segment selector on LLDT/LTR non-canonical #GPSean Christopherson1-2/+2
When injecting a #GP on LLDT/LTR due to a non-canonical LDT/TSS base, set the error code to the selector. Intel SDM's says nothing about the #GP, but AMD's APM explicitly states that both LLDT and LTR set the error code to the selector, not zero. Note, a non-canonical memory operand on LLDT/LTR does generate a #GP(0), but the KVM code in question is specific to the base from the descriptor. Fixes: e37a75a13cda ("KVM: x86: Emulator ignores LDTR/TR extended base on LLDT/LTR") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Link: https://lore.kernel.org/r/20220711232750.1092012-3-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2022-07-13KVM: x86: Mark TSS busy during LTR emulation _after_ all fault checksSean Christopherson1-10/+9
Wait to mark the TSS as busy during LTR emulation until after all fault checks for the LTR have passed. Specifically, don't mark the TSS busy if the new TSS base is non-canonical. Opportunistically drop the one-off !seg_desc.PRESENT check for TR as the only reason for the early check was to avoid marking a !PRESENT TSS as busy, i.e. the common !PRESENT is now done before setting the busy bit. Fixes: e37a75a13cda ("KVM: x86: Emulator ignores LDTR/TR extended base on LLDT/LTR") Reported-by: syzbot+760a73552f47a8cd0fd9@syzkaller.appspotmail.com Cc: stable@vger.kernel.org Cc: Tetsuo Handa <penguin-kernel@i-love.sakura.ne.jp> Cc: Hou Wenlong <houwenlong.hwl@antgroup.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Link: https://lore.kernel.org/r/20220711232750.1092012-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2022-07-13KVM: x86: Tweak name of MONITOR/MWAIT #UD quirk to make it #UD specificSean Christopherson5-5/+5
Add a "UD" clause to KVM_X86_QUIRK_MWAIT_NEVER_FAULTS to make it clear that the quirk only controls the #UD behavior of MONITOR/MWAIT. KVM doesn't currently enforce fault checks when MONITOR/MWAIT are supported, but that could change in the future. SVM also has a virtualization hole in that it checks all faults before intercepts, and so "never faults" is already a lie when running on SVM. Fixes: bfbcc81bb82c ("KVM: x86: Add a quirk for KVM's "MONITOR/MWAIT are NOPs!" behavior") Signed-off-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20220711225753.1073989-4-seanjc@google.com
2022-07-13KVM: selftests: Use "a" and "d" to set EAX/EDX for wrmsr_safe()Vitaly Kuznetsov1-1/+1
Do not use GCC's "A" constraint to load EAX:EDX in wrmsr_safe(). Per GCC's documenation on x86-specific constraints, "A" will not actually load a 64-bit value into EAX:EDX on x86-64. The a and d registers. This class is used for instructions that return double word results in the ax:dx register pair. Single word values will be allocated either in ax or dx. For example on i386 the following implements rdtsc: unsigned long long rdtsc (void) { unsigned long long tick; __asm__ __volatile__("rdtsc":"=A"(tick)); return tick; } This is not correct on x86-64 as it would allocate tick in either ax or dx. You have to use the following variant instead: unsigned long long rdtsc (void) { unsigned int tickl, tickh; __asm__ __volatile__("rdtsc":"=a"(tickl),"=d"(tickh)); return ((unsigned long long)tickh << 32)|tickl; } Because a u64 fits in a single 64-bit register, using "A" for selftests, which are 64-bit only, results in GCC loading the value into either RAX or RDX instead of splitting it across EAX:EDX. E.g.: kvm_exit: reason MSR_WRITE rip 0x402919 info 0 0 kvm_msr: msr_write 40000118 = 0x60000000001 (#GP) ... With "A": 48 8b 43 08 mov 0x8(%rbx),%rax 49 b9 ba da ca ba 0a movabs $0xabacadaba,%r9 00 00 00 4c 8d 15 07 00 00 00 lea 0x7(%rip),%r10 # 402f44 <guest_msr+0x34> 4c 8d 1d 06 00 00 00 lea 0x6(%rip),%r11 # 402f4a <guest_msr+0x3a> 0f 30 wrmsr With "a"/"d": 48 8b 53 08 mov 0x8(%rbx),%rdx 89 d0 mov %edx,%eax 48 c1 ea 20 shr $0x20,%rdx 49 b9 ba da ca ba 0a movabs $0xabacadaba,%r9 00 00 00 4c 8d 15 07 00 00 00 lea 0x7(%rip),%r10 # 402fc3 <guest_msr+0xb3> 4c 8d 1d 06 00 00 00 lea 0x6(%rip),%r11 # 402fc9 <guest_msr+0xb9> 0f 30 wrmsr Fixes: 3b23054cd3f5 ("KVM: selftests: Add x86-64 support for exception fixup") Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Link: https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints [sean: use "& -1u", provide GCC blurb and link to documentation] Signed-off-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20220714011115.3135828-1-seanjc@google.com
2022-07-13smb3: workaround negprot bug in some Samba serversSteve French1-6/+7
Mount can now fail to older Samba servers due to a server bug handling padding at the end of the last negotiate context (negotiate contexts typically are rounded up to 8 bytes by adding padding if needed). This server bug can be avoided by switching the order of negotiate contexts, placing a negotiate context at the end that does not require padding (prior to the recent netname context fix this was the case on the client). Fixes: 73130a7b1ac9 ("smb3: fix empty netname context on secondary channels") Reported-by: Julian Sikorski <belegdol@gmail.com> Tested-by: Julian Sikorski <belegdol+github@gmail.com> Reviewed-by: Shyam Prasad N <sprasad@microsoft.com> Signed-off-by: Steve French <stfrench@microsoft.com>
2022-07-13drm/amd/display: remove duplicate dcn314 includesAlex Deucher3-3/+0
Several headers were included twice. Fix that. Reported-by: kernel test robot <yujie.liu@intel.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: André Almeida <andrealmeid@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Enable DCN314 in DMRoman Li2-0/+12
Add support for DCN 3.1.4 in Display Manager Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Add DMUB support for DCN314Roman Li1-0/+1
Initialize DMUB for DCN 3.1.4. Use same funcs as DCN31. Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Enable DCN314 in DCRoman Li17-15/+366
Add support for DCN 3.1.4 in Display Core Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Add DCN314 version identifiersRoman Li3-0/+3
DCN 3.1.4 version and family ids Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Add DCN314 DML calculation supportRoman Li4-0/+9267
Display mode library for DCN 3.1.4 v2: squash in checkpatch fix (Alex) Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Add DCN314 DC resourcesRoman Li13-0/+4693
Display Core support for DCN 3.1.4 v2:(squash)fix non-x86 in dc/dcn314/Makefile Properly handle PPC as well. (Alex) v3: minor cleanup (Alex) v4: fix comment (Alex) Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Add DCN314 clock managerRoman Li4-0/+1278
Clock and SMU interfaces for DCN 3.1.4 Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Add DCN314 IRQ servicesRoman Li2-0/+469
IRQ services to support DCN 3.1.4 interrupts. v2: make to_dal_irq_source_dcn314 static (Alex) Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amdgpu: Add reg headers for DCN314Roman Li4-0/+139486
Register headers for the following IPs: - DCN 3.1.4 - DPCS 3.1.4 v2:(squash) clean up (Alex) Signed-off-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amd/display: Ensure valid event timestamp for cursor-only commitsMichel Dänzer1-3/+39
Requires enabling the vblank machinery for them. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2030 Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13drm/amdgpu: Check BO's requested pinning domains against its preferred_domainsLeo Li1-0/+4
When pinning a buffer, we should check to see if there are any additional restrictions imposed by bo->preferred_domains. This will prevent the BO from being moved to an invalid domain when pinning. For example, this can happen if the user requests to create a BO in GTT domain for display scanout. amdgpu_dm will allow pinning to either VRAM or GTT domains, since DCN can scanout from either or. However, in amdgpu_bo_pin_restricted(), pinning to VRAM is preferred if there is adequate carveout. This can lead to pinning to VRAM despite the user requesting GTT placement for the BO. v2: Allow the kernel to override the domain, which can happen when exporting a BO to a V4L camera (for example). Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2022-07-13apparmor: disable showing the mode as part of a secid to secctxJohn Johansen3-6/+20
Displaying the mode as part of the seectx takes up unnecessary memory, makes it so we can't use refcounted secctx so we need to alloc/free on every conversion from secid to secctx and introduces a space that could be potentially mishandled by tooling. Eg. In an audit record we get subj_type=firefix (enforce) Having the mode reported is not necessary, and might even be confusing eg. when writing an audit rule to match the above record field you would use -F subj_type=firefox ie. the mode is not included. AppArmor provides ways to find the mode without reporting as part of the secctx. So disable this by default before its use is wide spread and we can't. For now we add a sysctl to control the behavior as we can't guarantee no one is using this. Acked-by: Andrea Righi <andrea.righi@canonical.com> Signed-off-by: John Johansen <john.johansen@canonical.com>
2022-07-13apparmor: Convert secid mapping to XArrays instead of IDRMatthew Wilcox3-32/+13
XArrays are a better match than IDR for how AppArmor is mapping secids. Specifically AppArmor is trying to keep the allocation dense. XArrays also have the advantage of avoiding the complexity IDRs preallocation. In addition this avoids/fixes a lockdep issue raised in the LKML thread "Linux 5.18-rc4" where there is a report of an interaction between apparmor and IPC, this warning may have been spurious as the reported issue is in a per-cpu local lock taken by the IDR. With the one side in the IPC id allocation and the other in AppArmor's secid allocation. Description by John Johansen <john.johansen@canonical.com> Message-Id: <226cee6a-6ca1-b603-db08-8500cd8f77b7@gnuweeb.org> Signed-off-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: John Johansen <john.johansen@canonical.com>
2022-07-13apparmor: add a kernel label to use on kernel objectsJohn Johansen4-13/+37
Separate kernel objects from unconfined. This is done so we can distinguish between the two in debugging, auditing and in preparation for being able to replace unconfined, which is not appropriate for the kernel. The kernel label will continue to behave similar to unconfined. Acked-by: Jon Tourville <jon.tourville@canonical.com> Signed-off-by: John Johansen <john.johansen@canonical.com>
2022-07-13net/mlx5e: Remove the duplicating check for striding RQ when enabling LROMaxim Mikityanskiy1-6/+0
LRO requires striding RQ and checks that it's enabled at two places: mlx5e_fix_features and set_feature_lro. This commit keeps only one check at mlx5e_fix_features and removes the duplicating one in set_feature_lro. Signed-off-by: Maxim Mikityanskiy <maximmi@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5e: Move the LRO-XSK check to mlx5e_fix_featuresMaxim Mikityanskiy1-7/+5
LRO is mutually exclusive with XSK. When LRO is enabled, it checks whether XSK is active. This commit moves this check to a more correct place at mlx5e_fix_features. Signed-off-by: Maxim Mikityanskiy <maximmi@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5e: Extend flower police validationVlad Buslov1-0/+6
Recent net commit 4d1e07d83ccc ("net/mlx5e: Fix matchall police parameters validation") removed notexceed action id validation from mlx5e_police_validate() and left it up to callers. However, since tc_act_can_offload_police() only exists in net-next its validation is extended in this dedicated followup patch. Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Reviewed-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5e: configure meter in flow actionJianbo Liu1-0/+18
After police action is parsed, set meter data in flow action, so they can be used when adding FTE. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5e: Removed useless code in functionRustam Subkhankulov1-4/+1
Comparison of eth_ft->ft with NULL is useless, because get_flow_table() returns either pointer 'eth_ft' such that eth_ft->ft != NULL, or an erroneous value that is handled on return, causing mlx5e_ethtool_flow_replace() to terminate before checking whether eth_ft->ft equals NULL. Found by Linux Verification Center (linuxtesting.org) with SVACE. Signed-off-by: Rustam Subkhankulov <subkhankulov@ispras.ru> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Bridge, implement QinQ supportVlad Buslov2-8/+111
Implement support for new 802.1ad VLAN protocol type. Create new flow groups that handle svlan tags. Create FDB flows with svlan tag match when bridge VLAN is set to QinQ. Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Bridge, implement infrastructure for VLAN protocol changeVlad Buslov3-42/+160
Current implementation only supports 802.1Q VLAN Ethernet protocol. That protocol type is assumed by default and SWITCHDEV_ATTR_ID_BRIDGE_VLAN_PROTOCOL notification is ignored. To prepare for supporting 802.1ad protocol in following patches implement the necessary infrastructure to allow the user to dynamically change the VLAN protocol: - Handle SWITCHDEV_ATTR_ID_BRIDGE_VLAN_PROTOCOL notification by flushing FDB and re-creating VLAN modify header actions with new protocol. In this patch the only allowed dynamic VLAN protocol value is ETH_P_8021Q. - Save current VLAN protocol in per-bridge instance variable. Use the dynamic variable instead of hardcoded values in mlx5 bridge code. Create VLAN flow groups and flows based on current mlx5_esw_bridge->vlan_proto value instead of assuming 802.1Q ethertype. - Extract common flow group creation code into dedicated functions in order to be reused for creating QinQ groups in following patches. Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Bridge, extract VLAN push/pop actions creationVlad Buslov1-16/+36
Following patches in series need to re-create VLAN actions when user changes VLAN protocol. Extract the code that creates VLAN push/pop actions into dedicated function in order to be reused in next patch. Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Bridge, rename filter fg to vlan_filterVlad Buslov2-20/+20
Following patches in series introduce new qinq filtering group. To improve readability rename the existing group in function, variable and definition names to include "vlan" in order to make it easy to distinguish from upcoming qinq group. Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Bridge, refactor groups sizes and indicesVlad Buslov1-11/+28
Following patches in the series introduce additional flow groups for QinQ support. With increased number of groups it becomes cumbersome to calculate groups sizes as fractions of the table size. Instead, manually define sizes of specific group types and ensure that totals are still correct by static assertions. Having specific table size is important for firmware resource management. This commit doesn't change functionality. Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: debugfs, Add num of in-use FW command interface slotsTariq Toukan1-0/+24
Expose the number of busy / in-use slots in the FW command interface via a read-only debugfs entry. This improves observability and helps in the performance bottleneck analysis. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Expose vnic diagnostic counters for eswitch managed vportsMichael Guralnik5-1/+197
Expose on vport group managers debug counters for their managed vports. Counters are exposed through debugfs, the directory will be present only for functions that are eswitch managers and only counters that are supported on their specific HW/FW will be exposed. Example: $ ls /sys/kernel/debug/mlx5/0000:08:00.0/esw/ pf sf_8 vf_0 vf_1 $ ls -l /sys/kernel/debug/mlx5/0000:08:00.0/esw/vf_0/vnic_diag/ cq_overrun quota_exceeded_command total_q_under_processor_handle invalid_command send_queue_priority_update_flow List of all counter added: total_q_under_processor_handle - number of queues in error state due to an async error or errored command. send_queue_priority_update_flow - number of QP/SQ priority/SL update events. cq_overrun - number of times CQ entered an error state due to an overflow. async_eq_overrun -number of time an EQ mapped to async events was overrun. comp_eq_overrun - number of time an EQ mapped to completion events was overrun. quota_exceeded_command - number of commands issued and failed due to quota exceeded. invalid_command - number of commands issued and failed dues to any reason other than quota exceeded. Signed-off-by: Michael Guralnik <michaelgur@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Use software VHCA id when it's supportedYishai Hadas4-3/+65
Use software VHCA id when it's supported by the firmware. A unique id is allocated upon mlx5_mdev_init() and freed upon mlx5_mdev_uninit(), as such it stays the same during the full life cycle of the device including upon health recovery if occurred. The conjunction of sw_vhca_id with sw_owner_id will be a global unique id per function which uses mlx5_core. The sw_vhca_id is set upon init_hca command and is used to specify the VHCA that the NIC vport is affiliated with. This functionality is needed upon migration of VM which is MPV based. (i.e. multi port device). Signed-off-by: Yishai Hadas <yishaih@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Introduce ifc bits for using software vhca idYishai Hadas1-4/+21
Introduce ifc related stuff to enable using software vhca id functionality. Signed-off-by: Yishai Hadas <yishaih@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-13net/mlx5: Use the bitmap API to allocate bitmapsChristophe JAILLET1-11/+8
Use bitmap_zalloc()/bitmap_free() instead of hand-writing them. It is less verbose and it improves the semantic. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-14netfilter: nf_nat: in nf_nat_initialized(), use const struct nf_conn *James Yonan1-1/+1
nf_nat_initialized() doesn't modify passed struct nf_conn, so declare as const. This is helpful for code readability and makes it possible to call nf_nat_initialized() with a const struct nf_conn *. Signed-off-by: James Yonan <james@openvpn.net> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-07-13NFSv4: Fix races in the legacy idmapper upcallTrond Myklebust1-22/+24
nfs_idmap_instantiate() will cause the process that is waiting in request_key_with_auxdata() to wake up and exit. If there is a second process waiting for the idmap->idmap_mutex, then it may wake up and start a new call to request_key_with_auxdata(). If the call to idmap_pipe_downcall() from the first process has not yet finished calling nfs_idmap_complete_pipe_upcall_locked(), then we may end up triggering the WARN_ON_ONCE() in nfs_idmap_prepare_pipe_upcall(). The fix is to ensure that we clear idmap->idmap_upcall_data before calling nfs_idmap_instantiate(). Fixes: e9ab41b620e4 ("NFSv4: Clean up the legacy idmapper upcall") Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
2022-07-13bpf: Tidy up verifier check_func_arg()Joanne Koong1-28/+38
This patch does two things: 1. For matching against the arg type, the match should be against the base type of the arg type, since the arg type can have different bpf_type_flags set on it. 2. Uses switch casing to improve readability + efficiency. Signed-off-by: Joanne Koong <joannelkoong@gmail.com> Acked-by: Hao Luo <haoluo@google.com> Link: https://lore.kernel.org/r/20220712210603.123791-1-joannelkoong@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2022-07-13ARM: dts: qcom: apq8064: create tsens device nodeDmitry Baryshkov1-8/+17
Create separate device node for thermal sensors on apq8064 platform. Move related properties to the newly created device tree node. This harmonizes apq8064 and ipq8064 device trees and allows gcc device to be probed earlier by removing dependency on QFPROM nodes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521151437.1489111-5-dmitry.baryshkov@linaro.org
2022-07-13arm64: defconfig: Enable Qualcomm SC8280XP providersBjorn Andersson1-0/+3
The Qualcomm SC8280XP need the global clock controller, interconnect provider and TLMM pinctrl in order to boot. Enable these as builtin, as they are needed in order to provide e.g. UART. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220707161014.3178798-1-bjorn.andersson@linaro.org
2022-07-13arm64: dts: qcom: sc8280xp: Add lost ranges for timerBjorn Andersson1-0/+1
The timer node needs ranges specified to map the 1-cell children to the 2-cell address range used in /soc. This addition never made it into the patch that was posted and merged, so add it now. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220707160858.3178771-1-bjorn.andersson@linaro.org
2022-07-13Merge tag 'qcom-dts-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dtArnd Bergmann34-309/+678
Qualcomm DTS updates for v5.20 This adds USB, NAND, QPIC BAM, CPUfreq, remoteprocs, SMEM, SCM, watchdog, interconnect providers to the SDX65 5G modem platform and enables relevant devices for the MTP. The BAM DMUX interface used to exchange Ethernet/IP data with the modem is described on the MSM8974 platform. It fixes up the PXO supply clock to L2CC on IPQ6084, as the platform is transitioned away from global clock lookup. SDX55 has it's debug UART interrupt level corrected. Lastly it contains a wide variety of fixes for DeviceTree validation issues across most of the platforms. * tag 'qcom-dts-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (48 commits) ARM: dts: qcom: msm8974: rename GPU's OPP table node ARM: dts: qcom: apq8064: disable DSI and DSI PHY by default ARM: dts: qcom: apq8064: rename DSI PHY iface clock ARM: dts: qcom: extend scm compatible to match dt-schema ARM: dts: qcom: Fix sdhci node names - use 'mmc@' ARM: dts: qcom: apq8064: drop phy-names from HDMI device node ARM: dts: qcom: apq8064-ifc6410: drop hdmi-mux-supply ARM: dts: qcom: pm8841: add required thermal-sensor-cells ARM: dts: qcom: msm8974: add required ranges to OCMEM ARM: dts: qcom: sdx55: add dedicated IMEM and syscon compatibles ARM: dts: qcom: msm8974: add dedicated IMEM compatible ARM: dts: qcom: apq8064-asus-nexus7: add dedicated IMEM compatible ARM: dts: qcom: use generic sram as name for imem and ocmem nodes ARM: dts: qcom: ipq8064: add function to LED nodes ARM: dts: qcom: ipq8064-rb3011: add color to LED node ARM: dts: qcom: ipq4018-ap120c-ac: add function and color to LED nodes ARM: dts: qcom: apq8060-ifc6410: add color to LED node ARM: dts: qcom: apq8060-dragonboard: add function and color to LED nodes ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART ARM: dts: qcom-msm8974: fix irq type on blsp2_uart1 ... Link: https://lore.kernel.org/r/20220713032024.1372427-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-13Merge tag 'at91-dt-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dtArnd Bergmann1-0/+13
AT91 DT for v5.20 #2 It contains only the enablement of USB device port. * tag 'at91-dt-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: kswitch-d10: enable the USB device port Link: https://lore.kernel.org/r/20220713070602.1652118-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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