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2022-06-20media: mediatek: vcodec: Add to support H264 inner racing modeYunfei Dong4-5/+69
In order to reduce decoder latency, enable H264 inner racing mode. Send lat trans buffer information to core when trigger lat to work, need not to wait until lat decode done. Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: mediatek: vcodec: prevent kernel crash when scp ipi timeoutYunfei Dong1-0/+5
When SCP timeout during playing video, kernel crashes with following message. It's caused by accessing NULL pointer in vpu_dec_ipi_handler. This patch doesn't solve the root cause of NULL pointer, but merely prevent kernel crashed when encounter the NULL pointer. After applied this patch, kernel keeps alive, only the video player turns to green screen. [67242.065474] pc : vpu_dec_ipi_handler+0xa0/0xb20 [mtk_vcodec_dec] [67242.065485] [MTK_V4L2] level=0 fops_vcodec_open(),334: 18000000.vcodec_dec decoder [135] [67242.065523] lr : scp_ipi_handler+0x11c/0x244 [mtk_scp] [67242.065540] sp : ffffffbb4207fb10 [67242.065557] x29: ffffffbb4207fb30 x28: ffffffd00a1d5000 [67242.065592] x27: 1ffffffa0143aa24 x26: 0000000000000000 [67242.065625] x25: dfffffd000000000 x24: ffffffd0168bfdb0 [67242.065659] x23: 1ffffff76840ff74 x22: ffffffbb41fa8a88 [67242.065692] x21: ffffffbb4207fb9c x20: ffffffbb4207fba0 [67242.065725] x19: ffffffbb4207fb98 x18: 0000000000000000 [67242.065758] x17: 0000000000000000 x16: ffffffd042022094 [67242.065791] x15: 1ffffff77ed4b71a x14: 1ffffff77ed4b719 [67242.065824] x13: 0000000000000000 x12: 0000000000000000 [67242.065857] x11: 0000000000000000 x10: dfffffd000000001 [67242.065890] x9 : 0000000000000000 x8 : 0000000000000002 [67242.065923] x7 : 0000000000000000 x6 : 000000000000003f [67242.065956] x5 : 0000000000000040 x4 : ffffffffffffffe0 [67242.065989] x3 : ffffffd043b841b8 x2 : 0000000000000000 [67242.066021] x1 : 0000000000000010 x0 : 0000000000000010 [67242.066055] Call trace: [67242.066092] vpu_dec_ipi_handler+0xa0/0xb20 [mtk_vcodec_dec 12220d230d83a7426fc38c56b3e7bc6066955bae] [67242.066119] scp_ipi_handler+0x11c/0x244 [mtk_scp 8fb69c2ef141dd3192518b952b65aba35627b8bf] [67242.066145] mt8192_scp_irq_handler+0x70/0x128 [mtk_scp 8fb69c2ef141dd3192518b952b65aba35627b8bf] [67242.066172] scp_irq_handler+0xa0/0x114 [mtk_scp 8fb69c2ef141dd3192518b952b65aba35627b8bf] [67242.066200] irq_thread_fn+0x84/0xf8 [67242.066220] irq_thread+0x170/0x1ec [67242.066242] kthread+0x2f8/0x3b8 [67242.066264] ret_from_fork+0x10/0x30 [67242.066292] Code: 38f96908 35003628 91004340 d343fc08 (38f96908) Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: mediatek: vcodec: Different codec using different capture formatYunfei Dong1-0/+41
Vp8 need to use MM21, but vp9 and h264 need to use HyFbc mode for mt8195. Vp8/vp9/h264 use the same MM21 format for mt8192. Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: mediatek: vcodec: Adds compatible for mt8195Yunfei Dong1-0/+4
Adds compatible for mt8195 platform. Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: dt-bindings: media: mediatek: vcodec: Adds decoder dt-bindings for mt8195Yunfei Dong1-0/+1
Adds decoder dt-bindings for mt8195. Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: mediatek: vcodec: Add to support lat soc hardwareYunfei Dong4-3/+28
Add lat soc compatible and to support lat soc power/clk helper. Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: dt-bindings: media: mediatek: vcodec: Adds decoder dt-bindings for lat socYunfei Dong1-16/+35
Adds decoder dt-bindings for compatible "mediatek,mtk-vcodec-lat-soc". Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: mediatek: vcodec: add vp9 decoder driver for mt8186Yunfei Dong2-4/+195
Add vp9 single core decode driver to support mt8186. [hverkuil: fix 3 small checkpatch warnings] Signed-off-by: Mingjia Zhang <mingjia.zhang@mediatek.com> Signed-off-by: Xiaoyong Lu <xiaoyong.lu@mediatek.com> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: vivid.rst: document HDMI Video Guard Band controlHans Verkuil1-0/+14
Document this new vivid test control. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: Add P010 video formatBenjamin Gaignard4-0/+57
P010 is a YUV format with 10-bits per component with interleaved UV. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: imx-jpeg: Encoder support to set jpeg qualityMing Qian4-3/+73
Implement V4L2_CID_JPEG_COMPRESSION_QUALITY to set jpeg quality Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: platform: samsung: s5p-jpeg: replace ternary operator with max()Guo Zhengkui1-1/+1
Fix the following coccicheck warning: drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c:1712:24-25: WARNING opportunity for max() max() macro is defined in include/linux/minmax.h. It avoids multiple evaluations of the arguments when non-constant and performs strict type-checking. Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: i2c: adv7180: fix reserved bit in Video Selection 2Benjamin Marty1-1/+4
This bit is marked as reserved in the ADV Hardware Reference Manual. Resetting this bit seems to cause increased video noise. Setting this bit according to the Hardware Reference Manual reduces the video noise immediately. Signed-off-by: Benjamin Marty <info@benjaminmarty.ch> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Tested-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: stkwebcam: deprecate driver, move to stagingHans Verkuil10-10/+27
This is a very old driver for very old hardware and it is one of the very few remaining that does not use the vb2 framework (or even the older videobuf framework), so deprecate this driver and move it to staging with the intent to removing it altogether by the end of 2022. If someone wants to keep this driver, then it has to be converted to use vb2. Reviewed-by: Ricardo Ribalda <ribalda@chromium.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: platform: exynos-gsc: remove redundant initializations of f_chk_len and f_chk_addrColin Ian King1-2/+1
The variables f_chk_len and f_chk_addr are being initialized to zero and then being re-assigned in the next statement. The initializations are redundant and can be removed. Also initialize s_chk_addr and s_chk_len at the declaration statement. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: amphion: support for reloading moduleMing Qian1-7/+4
As there is no interface to power off vpu core. So it need to boot from cold on first load. but on the second load, driver need to restore the status instead of booting. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: atmel: atmel-isc-base: remove unneeded semicolonYang Li1-1/+1
Eliminate the following coccicheck warning: ./drivers/media/platform/atmel/atmel-isc-base.c:1469:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: st-delta: Remove unneeded NULL check in delta-v4l2Wan Jiabing1-15/+9
clk_prepare_enable() already checks NULL by using !clk. clk_disable_unprepare() already checks NULL by using IS_ERR_OR_NULL. Remove unneeded NULL checks before them. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: usbtv: Add PAL-Nc standardJorge Maidana2-2/+6
Add PAL-Nc support to usbtv, the corresponding register value "0x00fe" comes from the Windows driver "Active Development Co., Ltd. v2.1.1.2". Signed-off-by: Jorge Maidana <jorgem.linux@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: cx88: Fix PAL-Nc standardJorge Maidana1-5/+17
* Fix PAL-Nc horizontal parameters according to DScaler: https://github.com/JohnAdders/DScaler/blob/f7d92b76678e/DScaler/TVFormats.cpp#L88-L94 * Add PAL-Nc TV audio support. * Tested with CVBS and RF on a Pinnacle PCTV HD 800i. Signed-off-by: Jorge Maidana <jorgem.linux@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: vivid: add HDMI Video Guard Band controlHans Verkuil1-0/+14
Add a vivid control to insert the HDMI Video Guard Band in the image. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: v4l2-tpg: add HDMI Video Guard Band test patternHans Verkuil2-0/+54
This inserts 4 pixels of the RGB color 0xab55ab at the left hand side of the image. This is only done for 3 or 4 byte RGB pixel formats. The HDMI TMDS encoding of this pixel value equals the Video Guard Band value as defined by HDMI (see section 5.2.2.1 in the HDMI 1.3 Specification) that preceeds the first actual pixel of a video line. If an HDMI receiver doesn't handle this correctly, then it might keep skipping these Video Guard Band patterns and end up with a shorter video line. So this is a nice pattern to test with. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: cec-adap.c: log when claiming LA fails unexpectedlyHans Verkuil1-1/+4
If there is a hardware problem such as someone pulling the CEC line low continuously, then the POLL message will fail with an error other than OK, NACK, ABORTED or TIMEOUT. Log the tx_status value in that case to help debug this. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: adv7604: try all infoframe typesHans Verkuil1-3/+2
When logging the infoframes the adv7604 driver stopped reading infoframes at the first missing infoframe type. Instead it should try all supported infoframe types. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: camss: Allocate power domain resources dynamicallyVladimir Zapolskiy2-21/+24
To simplify the driver's maintenance it makes sense to escape from hardcoded numbers of power domain resources per platform and statical allocation of the resources. For instance on a QCOM SM8450 platform the number of CAMSS power domains shall be bumped up to 6, also notably CAMSS on MSM8916 has only one power domain, however it expects to get 2, and thus it should result in a runtime error on driver probe. The change fixes an issue mentioned above and gives more flexibility to support more platforms in future. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: davinci: vpif: add missing of_node_put() in vpif_probe()Yang Yingliang1-0/+1
of_graph_get_next_endpoint() returns an 'endpoint' node pointer with refcount incremented. The refcount should be decremented before returning from vpif_probe(). Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: TDA1997x: Fix the error handling in tda1997x_probe()Zheyu Ma1-0/+1
The driver should disable the regulator when failing to probe. Signed-off-by: Zheyu Ma <zheyuma97@gmail.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: dt-bindings: qcom,sdm660-camss: document interconnectsKrzysztof Kozlowski1-0/+7
Document the interconnect properties used in the Qualcomm CAMSS on SDM660: sdm630-sony-xperia-nile-discovery.dtb: camss@ca00000: 'interconnect-names', 'interconnects' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: camss: csid: fix wrong size passed to devm_kmalloc_array()Yang Yingliang1-1/+1
'supplies' is a pointer, the real size of struct regulator_bulk_data should be pass to devm_kmalloc_array(). Fixes: 0d8140179715 ("media: camss: Add regulator_bulk support") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: staging: media: zoran: replace dprintk with new debugging macrosIan Cowan4-181/+170
This replaces all of the dprintk macro calls with the zrdev_dbg, zrdev_info, or zrdev_err calls as appropriate. This allows for the removal of the dprintk macro from each file it is defined in, along with the removal of module params that track the debugging level. In the case that the debugging level was used in a comparison, this has been replaced with checking the console level debugging and making a decision from there. If the console debugging level is at least the KERN_ debugging level equivalent, then the comparison will evaluate as true. There are a few instances where pr_debug must be used over the zrdev_dbg. These occur in the module cleanup functions because there should be no devices defined once we get here, so we don't have a device to pass to zrdev_dbg. Signed-off-by: Ian Cowan <ian@linux.cowan.aero> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: staging: media: zoran: replace all pr_err with zrdev_err as appropriateIan Cowan4-25/+51
This replaces all of the pr_err calls to the preferred zrdev_err macro that calls the dev_err macro. There are a few locations where the pr_err is left because a zoran struct cannot be created. This is the result of error handling for another struct's existence that is required to create a zoran struct. Signed-off-by: Ian Cowan <ian@linux.cowan.aero> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: staging: media: zoran: setup videocodec header for debugging macrosIan Cowan2-0/+16
This adds inline functions in the videocodec header file to convert the videocodec and videocodec_master structs to their respective contained zoran struct. This will be used to pass the zoran struct to the zrdev_XXX() macros defined in the zoran header. In the zoran header, the new include is added to ensure all variables can be completely defined with the zoran and videocodec includes where they are located. Signed-off-by: Ian Cowan <ian@linux.cowan.aero> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: staging: media: zoran: add logging macrosIan Cowan1-0/+13
This adds the zrdev_dbg() (pointing to pci_dbg()), zrdev_err() (pointing to pci_err()), and zrdev_info() (pointing to pci_info()) macros to the zoran drivers. These are the preferred method for debugging and this will allow to extract the device from the zoran struct to make the call. Signed-off-by: Ian Cowan <ian@linux.cowan.aero> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: atmel: atmel-sama7g5-isc: fix warning in configs without OFEugen Hristev1-0/+2
All warnings (new ones prefixed by >>): >> drivers/media/platform/atmel/atmel-sama7g5-isc.c:610:34: warning: unused variable 'microchip_xisc_of_match' [-Wunused-const-variable] static const struct of_device_id microchip_xisc_of_match[] = { ^ 13 warnings generated. vim +/microchip_xisc_of_match +610 drivers/media/platform/atmel/atmel-sama7g5-isc.c 609 > 610 static const struct of_device_id microchip_xisc_of_match[] = { 611 { .compatible = "microchip,sama7g5-isc" }, 612 { } 613 }; 614 MODULE_DEVICE_TABLE(of, microchip_xisc_of_match); 615 Fixed warning by guarding the atmel_isc_of_match by CONFIG_OF. Reported-by: kernel test robot <lkp@intel.com> Fixes: c9aa973884a1 ("media: atmel: atmel-isc: add microchip-xisc driver") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20media: imx-jpeg: Don't fill the description field in struct v4l2_fmtdescMing Qian1-2/+0
The core will fill this in v4l_fill_fmtdesc(), ensuring consistent format description names. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-06-20firmware: arm_scmi: Relax CLOCK_DESCRIBE_RATES out-of-spec checksCristian Marussi3-1/+29
A reply to CLOCK_DESCRIBE_RATES issued against a non rate-discrete clock should be composed of a triplet of rates descriptors (min/max/step) returned all in one reply message. This is not always the case when dealing with some SCMI server deployed in the wild: relax such constraint while maintaining memory safety by checking carefully the returned payload size. While at that cleanup a stale debug printout. Link: https://lore.kernel.org/r/20220616170347.2800771-1-cristian.marussi@arm.com Fixes: 7bc7caafe6b1 ("firmware: arm_scmi: Use common iterators in the clock protocol") Tested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-06-20random: update comment from copy_to_user() -> copy_to_iter()Jason A. Donenfeld1-1/+1
This comment wasn't updated when we moved from read() to read_iter(), so this patch makes the trivial fix. Fixes: 1b388e7765f2 ("random: convert to using fops->read_iter()") Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-06-20Merge branch 'mlxsw-unified-bridge-conversion-part-1'David S. Miller4-31/+335
Ido Schimmel says: ==================== mlxsw: Unified bridge conversion - part 1/6 This set starts converting mlxsw to the unified bridge model and mainly adds new device registers and extends existing ones that will be used in follow-up patchsets. High-level summary ================== The unified bridge model is a new way of managing low-level device objects such as filtering identifiers (FIDs). The conversion moves a lot of logic out of the device's firmware towards the driver, but its main selling point is that it allows to overcome various scalability issues related to the amount of entries that need to be programmed to the device. The only (intended) user visible changes of the conversion are improvement in resource utilization and ability to support more router interfaces (RIFs) in Spectrum-{2,3}. Details ======= Commit 50853808ff4a ("Merge branch 'mlxsw-Prepare-for-VLAN-aware-bridge-w-VxLAN'") converted mlxsw to emulate 802.1Q FIDs (represent VLANs in a VLAN-aware bridge) using 802.1D FIDs (represent VLAN-unaware bridges). This was necessary because at that time VNI could not be assigned to 802.1Q FIDs, which effectively meant that mlxsw could not support VXLAN with VLAN-aware bridges. The downside of this approach is that multiple {Port,VID}->FID entries are required in order to classify incoming traffic to a FID, as opposed to a single VID->FID entry that can be used with actual 802.1Q FIDs. For example, if 10 ports are members in the same VLAN-aware bridge and the same 100 VLANs are configured on each port, then only 100 VID->FID entries are required with 802.1Q FIDs, whereas 1000 {Port,VID}->FID entries are required with emulated 802.1Q FIDs. The above limitation is the result of various assumptions that were made in the design of the API that was exposed to software. In the unified bridge model the API is much more "raw" and therefore avoids these assumptions, allowing software to configure the device in a more efficient manner. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add support for VLAN RIF as part of RITR registerAmit Cohen1-3/+26
Router interfaces (RIFs) constructed on top of VLAN-aware bridges are of "VLAN" type, whereas RIFs constructed on top of VLAN-unaware bridges of "FID" type. In other words, the RIF type is derived from the underlying FID type. VLAN RIFs are used on top of 802.1Q FIDs, whereas FID RIFs are used on top of 802.1D FIDs. Currently 802.1Q FIDs are emulated using 802.1D FIDs, and therefore VLAN RIFs are emulated using FID RIFs. As part of converting the driver to use unified bridge, 802.1Q FIDs and VLAN RIFs will be used. Add the relevant fields to RITR register, add pack() function for VLAN RIF and rename one field to fit the internal name. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: Add support for egress FID classification after decapsulationAmit Cohen2-9/+44
As preparation for unified bridge model, add support for VNI->FID mapping via SVFA register. When performing VXLAN encapsulation, the VXLAN header needs to contain a VNI. This VNI is derived from the FID classification performed on ingress, through which the ingress RIF is also determined. Similarly, when performing VXLAN decapsulation, the FID of the packet needs to be determined. This FID is derived from VNI classification performed during decapsulation. In the old model, both entries (i.e., FID->VNI and VNI->FID) were configured via SFMR.vni. In the new model, where ingress is separated from egress, ingress configuration (VNI->FID) is performed via SVFA, while SFMR only configures egress (FID->VNI). Add 'vni' field to SVFA, add new mapping table - VNI to FID, add new pack() function for VNI mapping and edit the comment in SFMR. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add egress FID field to RITR registerAmit Cohen1-2/+14
RITR configures the router interface table. As preparation for unified bridge model, add egress FID field to RITR. After routing, a packet has to perform a layer-2 lookup using the destination MAC it got from the routing and a FID. In the new model, the egress FID is configured by RITR for both sub-port and FID RIFs. Add 'efid' field to sub-port router interface and update FID router interface related comment. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add Router Egress Interface to VID RegisterAmit Cohen1-0/+59
The REIV maps {egress router interface (eRIF), egress_port} -> {vlan ID}. As preparation for unified bridge model, add REIV register for future use. In the past, firmware would take care of the above mentioned mapping, but in the new model this should be done by software using REIV register. REIV register supports a simultaneous update of 256 ports using 'port_page' field. When 'port_page'=0 the records represent ports 0-255, when 'port_page'=1 the records represent ports 256-511 and so on. The register is reserved while using the legacy model. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Replace MID related fields in SFGC registerAmit Cohen2-10/+9
SFGC register maps {packet type, bridge type} -> {MID base, table type}. As preparation for unified bridge model, remove 'mid' field and add 'mid_base' field. The MID index (index to PGT table which maps MID to local port list and SMPE index) is a result of 'mid_base' + 'fid_offset'. Using the legacy bridge model, firmware configures 'mid_base'. However, using the new model, software is responsible to configure it via SFGC register. The 'mid_base' is configured per {packet type, bridge type}, for example, for {Unicast, .1Q}, {Broadcast, .1D}. Add the field 'mid_base' to SFGC register and increase the length of the register accordingly. Remove the field 'mid' as currently it is ignored by the device, its use is an old leftover. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add flood related field to SFMR registerAmit Cohen1-0/+10
SFMR register creates and configures FIDs. As preparation for unified bridge model, add a required field for future use. The PGT (Port Group) table maps multicast ID (MID) to {local port list, SMPE index} on Spectrum-1 and to {local port list} on the other ASICs. In the legacy model, software did not interact with this table directly. Instead, it was accessed by firmware in response to registers such as SFTR and SMID. In the new model, the SFTR register is deprecated and software has full control over the PGT table using the SMID register. The configuration of MDB entries (using SFD) is unchanged, but flooding configuration is completely different. SFGC register maps {packet type, bridge type} -> {MID base, table type}, then with FID and FID-offset which are configured via SFMR, the MID index is obtained. Add the field 'flood_bridge_type' to SFMR, software can separate between 802.1q FIDs and vFIDs using two types which are supported. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add VID related fields to SFD registerAmit Cohen1-1/+36
SFD register configures FDB table. As preparation for unified bridge model, add some required fields for future use. In the new model, firmware no longer configures the egress VID, this responsibility is moved to software. For layer 2 this means that software needs to determine the egress VID for both unicast and multicast. For unicast FDB records and unicast LAG FDB records, the VID needs to be set via new fields in SFD - 'set_vid' and 'vid'. Add the two mentioned fields for future use. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add SMPE related fields to SFMR registerAmit Cohen1-1/+20
SFMR register creates and configures FIDs. As preparation unified bridge model, add some required fields for future use. The device includes two main tables to support layer 2 multicast (i.e., MDB and flooding). These are the PGT (Port Group Table) and the MPE (Multicast Port Egress) table. - PGT is {MID -> (bitmap of local_port, SPME index)} - MPE is {(Local port, SMPE index) -> eVID} In Spectrum-2 and later ASICs, the SMPE index is an attribute of the FID and programmed via new fields in SFMR register - 'smpe_valid' and 'smpe'. Add the two mentioned fields for future use and increase the length of the register accordingly. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: Add SMPE related fields to SMID2 registerAmit Cohen2-4/+24
SMID register maps multicast ID (MID) into a list of local ports. As preparation for unified bridge model, add some required fields for future use. The device includes two main tables to support layer 2 multicast (i.e., MDB and flooding). These are the PGT (Port Group Table) and the MPE (Multicast Port Egress) table. - PGT is {MID -> (bitmap of local_port, SPME index)} - MPE is {(Local port, SMPE index) -> eVID} In Spectrum-1, both indexes into the MPE table (local port and SMPE) are derived from the PGT table. Therefore, the SMPE index needs to be programmed as part of the PGT entry via new fields in SMID - 'smpe_valid' and 'smpe'. Add the two mentioned fields for future use and align the callers of mlxsw_reg_smid2_pack() to pass zeros for SMPE fields. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add Switch Multicast Port to Egress VID RegisterAmit Cohen1-0/+40
The SMPE register maps {egress_port, SMPE index} -> VID. The device includes two main tables to support layer 2 multicast (i.e., MDB and flooding). These are the PGT (Port Group Table) and the MPE (Multicast Port Egress) table. - PGT is {MID -> (bitmap of local_port, SPME index)} - MPE is {(Local port, SMPE index) -> eVID} In Spectrum-1, the index into the MPE table - called switch multicast to port egress VID (SMPE) - is derived from the PGT entry, whereas in Spectrum-2 and later ASICs it is derived from the FID. In the legacy model, software did not interact with this table as it was completely hidden in firmware. In the new model, software needs to populate the table itself in order to map from {Local port, SMPE index} to an egress VID. This is done using the SMPE register. Add the register for future use. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add ingress RIF related fields to SVFA registerAmit Cohen1-1/+21
SVFA register controls the VID to FID mapping and {Port, VID} to FID mapping for virtualized ports. As preparation for unified bridge model, add some required fields for future use. On ingress, after ingress ACL, a packet needs to be classified to a FID. The key for this lookup can be one of: 1. VID. When port is not in virtual mode. 2. {RQ, VID}. When port is in virtual mode. 3. FID. When FID was set by ingress ACL. Since RITR no longer performs ingress configuration, the ingress RIF for the first two entry types needs to be set via new fields in SVFA - 'irif_v' and 'irif'. Add the two mentioned fields for future use and increase the length of the register accordingly. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-20mlxsw: reg: Add ingress RIF related fields to SFMR registerAmit Cohen1-0/+20
SFMR register creates and configures FIDs. As preparation for unified bridge model, add some required fields for future use. On ingress, after ingress ACL, a packet needs to be classified to a FID. The key for this lookup can be one of: 1. VID. When port is not in virtual mode. 2. {RQ, VID}. When port is in virtual mode. 3. FID. When FID was set by ingress ACL. For example, via VR_AND_FID_ACTION. Since RITR no longer performs ingress configuration, the ingress RIF for the last entry type needs to be set via new fields in SFMR - 'irif_v' and 'irif'. Add the two mentioned fields for future use. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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