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2022-06-07arm64: dts: rockchip: Add rk3568 PCIe2x1 controllerPeter Geis1-0/+50
The PCIe2x1 controller is common between the rk3568 and rk3566. It is a single lane PCIe2 compliant controller. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220429123832.2376381-5-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-07net: altera: Replace kernel.h with the necessary inclusionsChristophe JAILLET1-2/+3
When kernel.h is used in the headers it adds a lot into dependency hell, especially when there are circular dependencies are involved. Replace kernel.h inclusion with the list of what is really being used. While at it, move these includes below the include guard. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/18731e4f6430100d6500d6c4732ee028a729c085.1654325651.git.christophe.jaillet@wanadoo.fr Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-06-07RDMA/hfi1: Fix typo in commentXiang wangx1-1/+1
Delete the redundant word 'and'. Link: https://lore.kernel.org/r/20220606123419.29109-1-wangxiang@cdjrlc.com Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
2022-06-07RDMA/qedr: Fix reporting QP timeout attributeKamal Heib2-1/+4
Make sure to save the passed QP timeout attribute when the QP gets modified, so when calling query QP the right value is reported and not the converted value that is required by the firmware. This issue was found while running the pyverbs tests. Fixes: cecbcddf6461 ("qedr: Add support for QP verbs") Link: https://lore.kernel.org/r/20220525132029.84813-1-kamalheib1@gmail.com Signed-off-by: Kamal Heib <kamalheib1@gmail.com> Acked-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
2022-06-07WAN: Fix syntax errors in commentsXiang wangx1-1/+1
Delete the redundant word 'the'. Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com> Link: https://lore.kernel.org/r/20220604040917.8926-1-wangxiang@cdjrlc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-06-07arm64: dts: rockchip: enable sfc controller on Quartz64 Model APeter Geis1-0/+16
Add the sfc controller binding for the Quartz64 Model A. This is not populated by default, so leave it disabled. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220511150117.113070-7-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-07arm64: dts: rockchip: enable sdr-104 for sdmmc on Quartz APeter Geis1-0/+1
Now that we have working io-domain support, we can enable higher date rates on the sdmmc card. Before: Timing buffered disk reads: 68 MB in 3.08 seconds = 22.07 MB/sec After: Timing buffered disk reads: 188 MB in 3.02 seconds = 62.29 MB/sec Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220511150117.113070-6-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-07arm64: dts: rockchip: add Quartz64-A fan pinctrlPeter Geis1-0/+8
The Quartz64 Model A fan is bound to a single gpio. Prevent pinctrl issues in the future by binding the pinctrl assignment for the gpio. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220511150117.113070-5-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-07crc-itu-t: fix typo in CRC ITU-T polynomial commentRoger Knecht2-2/+2
The code comment says that the polynomial is x^16 + x^12 + x^15 + 1, but the correct polynomial is x^16 + x^12 + x^5 + 1. Quoting from page 2 in the ITU-T V.41 specification [1]: 2 Encoding and checking process The service bits and information bits, taken in conjunction, correspond to the coefficients of a message polynomial having terms from x^(n-1) (n = total number of bits in a block or sequence) down to x^16. This polynomial is divided, modulo 2, by the generating polynomial x^16 + x^12 + x^5 + 1. The hex (truncated) polynomial 0x1021 and CRC code implementation are correct, however. [1] https://www.itu.int/rec/T-REC-V.41-198811-I/en Signed-off-by: Roger Knecht <roger@norberthealth.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-06-07drm/mgag200: Store positions of I2C data and clock bits in device infoThomas Zimmermann10-38/+27
The bits for accessing I2C data and clock channels varies among models. Store them in the device-info structure for consumption by the DDC code. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-11-tzimmermann@suse.de
2022-06-07drm/mgag200: Store vidrst flag in device infoThomas Zimmermann11-17/+24
Set new vidrst flag in device info for models that synchronize with external sources (i.e., BMCs). In modesetting, set the corresponding bits from the device-info flag. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-10-tzimmermann@suse.de
2022-06-07drm/mgag200: Store maximum resolution and memory bandwidth in device infoThomas Zimmermann10-63/+75
The maximum resolution and memory bandwidth are model-specific limits. Both are used during display-mode validation. Store the values in struct mgag200_device_info and simplify the validation code. v2: * 'bandwith' -> 'bandwidth' in commit message Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-9-tzimmermann@suse.de
2022-06-07drm/mgag200: Store HW_BUG_NO_STARTADD flag in device infoThomas Zimmermann11-69/+69
Flag devices with broken handling of the startadd field in struct mgag200_device_info, instead of PCI driver data. This reduces the driver data to a simple type constant. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-8-tzimmermann@suse.de
2022-06-07drm/mgag200: Add struct mgag200_device_infoThomas Zimmermann10-10/+46
While currently empty, struct mgag200_device_info, will provide static, constant information on each device model. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-7-tzimmermann@suse.de
2022-06-07drm/mgag200: Implement new init logicThomas Zimmermann13-148/+88
Rework mgag200_regs_init() and mgag200_mm_init() into device preinit and init functions. The preinit function, mgag200_device_preinit(), requests and maps a device's I/O and video memory. The init function, mgag200_device_init() initializes the state of struct mga_device. Splitting the initialization between the two functions is necessary to perform per-model operations between the two calls, such as reading the unique revision ID on G200SEs. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-6-tzimmermann@suse.de
2022-06-07drm/mgag200: Call mgag200_device_probe_vram() from per-model initThomas Zimmermann12-58/+94
Call mgag200_device_probe_vram() from each model's initializer. The G200EW3 uses a special helper with additional instructions. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-5-tzimmermann@suse.de
2022-06-07drm/mgag200: Move PCI-option setup into model-specific codeThomas Zimmermann9-55/+100
Split the PCI code into a single call for each model. G200 and G200SE each contain a dedicated helper with additional instructions. Noteably, the G200ER has no code for PCI setup. In a later patch, the magic numbers should be replaced by descriptive constants. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-4-tzimmermann@suse.de
2022-06-07drm/mgag200: Initialize each model in separate functionThomas Zimmermann13-202/+603
Add a separate initializer function for each model. Add separate devic structures for G200 and G200SE, which require additional information. Also move G200's and G200SE's helpers for reading the BIOS and version id into model-specific code. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-3-tzimmermann@suse.de
2022-06-07drm/mgag200: Remove special case for G200SE with <2 MiBThomas Zimmermann1-12/+1
Remove old test for 32-bit vs 16-bit colors. Prefer 24-bit color depth on all devices. 32-bit color depth doesn't exist, it should have always been 24-bit. G200SE with less than 2 MiB of video memory have defaulted to 16-bit color depth, as the original revision of the G200SE had only 1.75 MiB of video memory. Using 16-bit colors enabled XGA resolution. But we now already limit these devices to VGA resolutions as the memory-bandwith test assumes 32-bit pixel size. So drop the special case from color-depth selection. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112522.5774-2-tzimmermann@suse.de
2022-06-07clk: renesas: rzg2l: Fix reset status functionBiju Das1-1/+1
As per RZ/G2L HW(Rev.1.10) manual, reset monitor register value 0 means reset signal is not applied (deassert state) and 1 means reset signal is applied (assert state). reset_control_status() expects a positive value if the reset line is asserted. But rzg2l_cpg_status function returns zero for asserted state. This patch fixes the issue by adding double inverted logic, so that reset_control_status returns a positive value if the reset line is asserted. Fixes: ef3c613ccd68 ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220531071657.104121-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-07arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADKChanho Park1-0/+18
Enable ufs_1_phy and ufs_1 devices with ufs_1_fixed_vcc_reg regulator. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220607070251.15795-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07arm64: dts: exynos: add secondary ufs devices in ExynosAutov9Chanho Park1-0/+32
Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy device. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220607070251.15795-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07arm64: dts: fsd: use local header for pinctrl register valuesKrzysztof Kozlowski2-52/+85
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-7-krzysztof.kozlowski@linaro.org
2022-06-07arm64: dts: exynos: use local header for pinctrl register valuesKrzysztof Kozlowski7-43/+122
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Tested-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-6-krzysztof.kozlowski@linaro.org
2022-06-07ARM: dts: exynos: use local header for pinctrl register valuesKrzysztof Kozlowski10-9/+65
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-5-krzysztof.kozlowski@linaro.org
2022-06-07ARM: dts: s5pv210: use local header for pinctrl register valuesKrzysztof Kozlowski6-337/+376
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-4-krzysztof.kozlowski@linaro.org
2022-06-07ARM: dts: s3c64xx: use local header for pinctrl register valuesKrzysztof Kozlowski2-89/+116
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-3-krzysztof.kozlowski@linaro.org
2022-06-07ARM: dts: s3c2410: use local header for pinctrl register valuesKrzysztof Kozlowski2-19/+38
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-2-krzysztof.kozlowski@linaro.org
2022-06-07ARM: dts: exynos: align MMC node name with dtschemaKrzysztof Kozlowski1-3/+3
The node names should be generic and MMC controller dtschema expects "mmc". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220605163710.144210-2-krzysztof.kozlowski@linaro.org
2022-06-07arm64: dts: exynos: align MMC node name with dtschemaKrzysztof Kozlowski1-3/+3
The node names should be generic and MMC controller dtschema expects "mmc". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220605163710.144210-3-krzysztof.kozlowski@linaro.org
2022-06-07arm64: dts: exynos: adjust DT style of ufs nodes in ExynosAutov9Chanho Park1-6/+6
Drop "ufs0-" label name usage of ufs phy and hci nodes. Regarding the comments of reg properties, we don't need to illustrate here because we can find the description from the dt-binding doc. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220602053250.62593-5-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07ARM: dts: exynos: adjust whitespace around '='Krzysztof Kozlowski4-4/+4
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220526204323.832243-2-krzysztof.kozlowski@linaro.org
2022-06-07arm64: dts: exynos: adjust whitespace around '='Krzysztof Kozlowski1-1/+1
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220526204323.832243-1-krzysztof.kozlowski@linaro.org
2022-06-07xen: unexport __init-annotated xen_xlate_map_ballooned_pages()Masahiro Yamada1-1/+0
EXPORT_SYMBOL and __init is a bad combination because the .init.text section is freed up after the initialization. Hence, modules cannot use symbols annotated __init. The access to a freed symbol may end up with kernel panic. modpost used to detect it, but it has been broken for a decade. Recently, I fixed modpost so it started to warn it again, then this showed up in linux-next builds. There are two ways to fix it: - Remove __init - Remove EXPORT_SYMBOL I chose the latter for this case because none of the in-tree call-sites (arch/arm/xen/enlighten.c, arch/x86/xen/grant-table.c) is compiled as modular. Fixes: 243848fc018c ("xen/grant-table: Move xlated_setup_gnttab_pages to common place") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Acked-by: Stefano Stabellini <sstabellini@kernel.org> Link: https://lore.kernel.org/r/20220606045920.4161881-1-masahiroy@kernel.org Signed-off-by: Juergen Gross <jgross@suse.com>
2022-06-07ALSA: hda: MTL: add HD Audio PCI ID and HDMI codec vendor IDYong Zhi2-0/+4
Add HD Audio PCI ID for Intel Meteorlake platform. [ corrected the hex number to lower letters by tiwai ] Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Signed-off-by: Yong Zhi <yong.zhi@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220606204232.144296-1-pierre-louis.bossart@linux.intel.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2022-06-07MAINTAINERS: add a new reviewer for S32GChester Lin1-0/+1
Add the NXP S32 Linux team as a designated review group of s32g. Signed-off-by: Chester Lin <clin@suse.com> Link: https://lore.kernel.org/r/20220525161422.14156-1-clin@suse.com
2022-06-07arm64: s32g2: Pass unit name to soc nodeFabio Estevam1-1/+1
Pass unit name to soc node to fix the following W=1 build warning: arch/arm64/boot/dts/freescale/s32g2.dtsi:82.6-123.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Chester Lin <clin@suse.com> Signed-off-by: Chester Lin <clin@suse.com> Link: https://lore.kernel.org/r/20220514143505.1554813-1-festevam@gmail.com
2022-06-06Merge tag 'dma-mapping-5.19-2022-06-06' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds2-9/+7
Pull dma-mapping fixes from Christoph Hellwig: - fix a regressin in setting swiotlb ->force_bounce (me) - make dma-debug less chatty (Rob Clark) * tag 'dma-mapping-5.19-2022-06-06' of git://git.infradead.org/users/hch/dma-mapping: swiotlb: fix setting ->force_bounce dma-debug: make things less spammy under memory pressure
2022-06-07drm/mediatek: Add pull-down MIPI operation in mtk_dsi_poweroff functionXinlei Lee1-0/+2
In the dsi_enable function, mtk_dsi_rxtx_control is to pull up the MIPI signal operation. Before dsi_disable, MIPI should also be pulled down by writing a register instead of disabling dsi. If disable dsi without pulling the mipi signal low, the value of the register will still maintain the setting of the mipi signal being pulled high. After resume, even if the mipi signal is not pulled high, it will still be in the high state. Fixes: 2e54c14e310f ("drm/mediatek: Add DSI sub driver") Link: https://patchwork.kernel.org/project/linux-mediatek/patch/1653012007-11854-5-git-send-email-xinlei.lee@mediatek.com/ Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-07drm/mediatek: Keep dsi as LP00 before dcs cmds transferJitao Shi1-7/+21
To comply with the panel sequence, hold the mipi signal to LP00 before the dcs cmds transmission, and pull the mipi signal high from LP00 to LP11 until the start of the dcs cmds transmission. The normal panel timing is : (1) pp1800 DC pull up (2) avdd & avee AC pull high (3) lcm_reset pull high -> pull low -> pull high (4) Pull MIPI signal high (LP11) -> initial code -> send video data (HS mode) The power-off sequence is reversed. If dsi is not in cmd mode, then dsi will pull the mipi signal high in the mtk_output_dsi_enable function. The delay in lane_ready func is the reaction time of dsi_rx after pulling up the mipi signal. Fixes: 2dd8075d2185 ("drm/mediatek: mtk_dsi: Use the drm_panel_bridge API") Link: https://patchwork.kernel.org/project/linux-mediatek/patch/1653012007-11854-4-git-send-email-xinlei.lee@mediatek.com/ Cc: <stable@vger.kernel.org> # 5.10.x: 7f6335c6a258: drm/mediatek: Modify dsi funcs to atomic operations Cc: <stable@vger.kernel.org> # 5.10.x: cde7e2e35c28: drm/mediatek: Separate poweron/poweroff from enable/disable and define new funcs Cc: <stable@vger.kernel.org> # 5.10.x Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-06cifs: return errors during session setup during reconnectsShyam Prasad N1-0/+3
During reconnects, we check the return value from cifs_negotiate_protocol, and have handlers for both success and failures. But if that passes, and cifs_setup_session returns any errors other than -EACCES, we do not handle that. This fix adds a handler for that, so that we don't go ahead and try a tree_connect on a failed session. Signed-off-by: Shyam Prasad N <sprasad@microsoft.com> Reviewed-by: Enzo Matsumiya <ematsumiya@suse.de> Cc: stable@vger.kernel.org Signed-off-by: Steve French <stfrench@microsoft.com>
2022-06-07drm/mediatek: Separate poweron/poweroff from enable/disable and define new funcsJitao Shi1-19/+34
In order to match the changes of "Use the drm_panel_bridge API", the poweron/poweroff of dsi is extracted from enable/disable and defined as new funcs (atomic_pre_enable/atomic_post_disable). Since dsi_poweron is moved from dsi_enable to pre_enable function, in order to avoid poweron failure, the operation of dsi register fails to cause bus hang. Therefore, the protection mechanism is added to the dsi_enable function. Fixes: 2dd8075d2185 ("drm/mediatek: mtk_dsi: Use the drm_panel_bridge API") Link: https://patchwork.kernel.org/project/linux-mediatek/patch/1653012007-11854-3-git-send-email-xinlei.lee@mediatek.com/ Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-07drm/mediatek: Modify dsi funcs to atomic operationsXinlei Lee1-4/+6
Because .enable & .disable are deprecated. Use .atomic_enable & .atomic_disable instead. Link: https://patchwork.kernel.org/project/linux-mediatek/patch/1653012007-11854-2-git-send-email-xinlei.lee@mediatek.com/ Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-06net: ethernet: bgmac: Fix refcount leak in bcma_mdio_mii_registerMiaoqian Lin1-0/+1
of_get_child_by_name() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. Add missing of_node_put() to avoid refcount leak. Fixes: 55954f3bfdac ("net: ethernet: bgmac: move BCMA MDIO Phy code into a separate file") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220603133238.44114-1-linmq006@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-06Merge branch 'amt-fix-several-bugs-in-amt_rcv'Jakub Kicinski1-19/+40
Taehee Yoo says: ==================== amt: fix several bugs in amt_rcv() This series fixes bugs in amt_rcv(). First patch fixes pskb_may_pull() issue. Some functions missed to call pskb_may_pull() and uses wrong parameter of pskb_may_pull(). Second patch fixes possible null-ptr-deref in amt_rcv(). If there is no amt private data in sock, skb will be freed. And it increases stats. But in order to increase stats, amt private data is needed. So, uninitialised pointer will be used at that point. Third patch fixes wrong definition of type_str[] in amt.c ==================== Link: https://lore.kernel.org/r/20220602140108.18329-1-ap420073@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-06amt: fix wrong type string definitionTaehee Yoo1-0/+1
amt message type definition starts from 1, not 0. But type_str[] starts from 0. So, it prints wrong type information. Fixes: cbc21dc1cfe9 ("amt: add data plane of amt interface") Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-06amt: fix possible null-ptr-deref in amt_rcv()Taehee Yoo1-1/+2
When amt interface receives amt message, it tries to obtain amt private data from sock. If there is no amt private data, it frees an skb immediately. After kfree_skb(), it increases the rx_dropped stats. But in order to use rx_dropped, amt private data is needed. So, it makes amt_rcv() to do not increase rx_dropped stats when it can not obtain amt private data. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Fixes: 1a1a0e80e005 ("amt: fix possible memory leak in amt_rcv()") Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-06amt: fix wrong usage of pskb_may_pull()Taehee Yoo1-18/+37
It adds missing pskb_may_pull() in amt_update_handler() and amt_multicast_data_handler(). And it fixes wrong parameter of pskb_may_pull() in amt_advertisement_handler() and amt_membership_query_handler(). Reported-by: Jakub Kicinski <kuba@kernel.org> Fixes: cbc21dc1cfe9 ("amt: add data plane of amt interface") Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-06ARM: dts: sun5i: adjust whitespace around '='Krzysztof Kozlowski1-3/+3
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220526203547.830848-1-krzysztof.kozlowski@linaro.org
2022-06-06clk: sunxi-ng: Deduplicate ccu_clks arraysSamuel Holland5-289/+37
The ccu_clks arrays are used to link ccu_common objects to a platform device during probe. There is no requirement that the clk_hw inside the ccu_common object ever gets registered with the clock framework. So the drivers do not need a separate ccu_clks array for each CCU variant. A single array per driver, containing the union of the CCU clocks from all variants, is sufficient. Let's save some space by combining the ccu_clks arrays in each driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531043539.41549-1-samuel@sholland.org
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