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2022-05-05pinctrl: renesas: Add shorthand for reserved register fieldsGeert Uytterhoeven2-19/+28
Currently, reserved register fields must be fully described using dummy enum IDs (zeroes), one for each possible state (2^bits states). Add support for describing reserved fields using negative field width values as shorthands, thus removing the need for dummy values. Apart from the obvious size reduction due to the removal of the dummy values, this will also enable merging adjacent reserved fields into a single field, reducing the number of fields to describe, and thus kernel size. Update the checker accordingly. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/cad7c92ef039d9a4d039807efc15886a7aa862be.1649865241.git.geert+renesas@glider.be
2022-05-05pinctrl: renesas: r8a77470: Use fixed-width description for IPSR regsGeert Uytterhoeven1-54/+18
All fields in the IPSR registers on RZ/G1C have the same width, but the driver describes them using the PINMUX_CFG_REG_VAR() macro, which is intended for fields with different widths. Convert the description to use the PINMUX_CFG_REG() macro for fixed-width fields instead. This reduces kernel size by 162 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f6f26a0dfd16050ead83daf2b9fabeb8b26821a6.1649865241.git.geert+renesas@glider.be
2022-05-05dt-bindings: soc: renesas: Move renesas,rzg2l-sysc from arm to socGeert Uytterhoeven1-1/+1
The Renesas RZ/{G2L,V2L} System Controller (SYSC) DT binding is not really a power-related DT binding, hence it does not belong under Documentation/devicetree/bindings/power/. Move it to Documentation/devicetree/bindings/soc/renesas/. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/a47015888f99476a5206a556dce93503494d9a73.1651495078.git.geert+renesas@glider.be
2022-05-05dt-bindings: memory: renesas,rpc-if: Document RZ/G2UL SoCBiju Das1-0/+1
Document RZ/G2UL RPC-IF bindings. RZ/G2UL RPC-IF is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-rpc-if" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220501082508.25511-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-05genirq: Synchronize interrupt thread startupThomas Pfaff3-10/+33
A kernel hang can be observed when running setserial in a loop on a kernel with force threaded interrupts. The sequence of events is: setserial open("/dev/ttyXXX") request_irq() do_stuff() -> serial interrupt -> wake(irq_thread) desc->threads_active++; close() free_irq() kthread_stop(irq_thread) synchronize_irq() <- hangs because desc->threads_active != 0 The thread is created in request_irq() and woken up, but does not get on a CPU to reach the actual thread function, which would handle the pending wake-up. kthread_stop() sets the should stop condition which makes the thread immediately exit, which in turn leaves the stale threads_active count around. This problem was introduced with commit 519cc8652b3a, which addressed a interrupt sharing issue in the PCIe code. Before that commit free_irq() invoked synchronize_irq(), which waits for the hard interrupt handler and also for associated threads to complete. To address the PCIe issue synchronize_irq() was replaced with __synchronize_hardirq(), which only waits for the hard interrupt handler to complete, but not for threaded handlers. This was done under the assumption, that the interrupt thread already reached the thread function and waits for a wake-up, which is guaranteed to be handled before acting on the stop condition. The problematic case, that the thread would not reach the thread function, was obviously overlooked. Make sure that the interrupt thread is really started and reaches thread_fn() before returning from __setup_irq(). This utilizes the existing wait queue in the interrupt descriptor. The wait queue is unused for non-shared interrupts. For shared interrupts the usage might cause a spurious wake-up of a waiter in synchronize_irq() or the completion of a threaded handler might cause a spurious wake-up of the waiter for the ready flag. Both are harmless and have no functional impact. [ tglx: Amended changelog ] Fixes: 519cc8652b3a ("genirq: Synchronize only with single thread on free_irq()") Signed-off-by: Thomas Pfaff <tpfaff@pcs.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/552fe7b4-9224-b183-bb87-a8f36d335690@pcs.com
2022-05-05MAINTAINERS: update the GPIO git tree entryBartosz Golaszewski1-1/+1
My git tree has become the de facto main GPIO tree. Update the MAINTAINERS file to reflect that. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reported-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-05NFC: netlink: fix sleep in atomic bug when firmware download timeoutDuoming Zhou1-2/+2
There are sleep in atomic bug that could cause kernel panic during firmware download process. The root cause is that nlmsg_new with GFP_KERNEL parameter is called in fw_dnld_timeout which is a timer handler. The call trace is shown below: BUG: sleeping function called from invalid context at include/linux/sched/mm.h:265 Call Trace: kmem_cache_alloc_node __alloc_skb nfc_genl_fw_download_done call_timer_fn __run_timers.part.0 run_timer_softirq __do_softirq ... The nlmsg_new with GFP_KERNEL parameter may sleep during memory allocation process, and the timer handler is run as the result of a "software interrupt" that should not call any other function that could sleep. This patch changes allocation mode of netlink message from GFP_KERNEL to GFP_ATOMIC in order to prevent sleep in atomic bug. The GFP_ATOMIC flag makes memory allocation operation could be used in atomic context. Fixes: 9674da8759df ("NFC: Add firmware upload netlink command") Fixes: 9ea7187c53f6 ("NFC: netlink: Rename CMD_FW_UPLOAD to CMD_FW_DOWNLOAD") Signed-off-by: Duoming Zhou <duoming@zju.edu.cn> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504055847.38026-1-duoming@zju.edu.cn Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-05-05drm/todo: Add entry for using kunit in the subsystemJavier Martinez Canillas1-0/+14
The Kernel Unit Testing (KUnit) framework provides a common framework for unit tests within the Linux kernel. Having a test suite would allow to identify regressions earlier. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220504080212.713275-1-javierm@redhat.com
2022-05-05leds: Add PWM multicolor driverSven Schwermer3-0/+198
By allowing to group multiple monochrome PWM LEDs into multicolor LEDs, all involved LEDs can be controlled in-sync. This enables using effects using triggers, etc. Signed-off-by: Sven Schwermer <sven.schwermer@disruptive-technologies.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05dt-bindings: leds: Add multicolor PWM LED bindingsSven Schwermer1-0/+79
This allows to group multiple PWM-connected monochrome LEDs into multicolor LEDs, e.g. RGB LEDs. Signed-off-by: Sven Schwermer <sven.schwermer@disruptive-technologies.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05dt-bindings: leds: Optional multi-led unit addressSven Schwermer1-1/+1
The unit address does not make sense in all cases the multi-led node is used, e.g. for the upcoming PWM multi-color LED driver. Signed-off-by: Sven Schwermer <sven.schwermer@disruptive-technologies.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05leds: regulator: Make probeable from device treeLinus Walleij1-19/+23
The regulator LED can easily be adapted to probe from the device tree. We switch led_classdev_register() to led_classdev_register_ext() passing some struct led_init_data init_data that we leave NULL save the fwnode if platform data isn't present so that it will be populated from the device tree. If we have platform data we set up the name from the platform data but using init_data instead. Cc: Antonio Ospite <ao2@ao2.it> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05leds: regulator: Add dev helper variableLinus Walleij1-6/+7
Instead of repeating the hard to read &pdev->dev just create a local struct device *dev in probe(). Cc: Antonio Ospite <ao2@ao2.it> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05dt-bindings: leds: Add regulator-led bindingLinus Walleij1-0/+55
The regulator is a LED connected directly to a regulator and with its brightness controlled by the voltage of the regulator. Cc: devicetree@vger.kernel.org Cc: Antonio Ospite <ao2@ao2.it> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05arm64: mm: Cleanup useless parameters in zone_sizes_init()Kefeng Wang1-3/+3
Directly use max_pfn for max and no one use min, kill them. Reviewed-by: Vijay Balakrishna <vijayb@linux.microsoft.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Link: https://lore.kernel.org/r/20220411092455.1461-4-wangkefeng.wang@huawei.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2022-05-05arm64: dt: imx8mp: support pwm polarity inversionMarkus Niebel1-4/+4
The i.MX8M Plus has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells. Tested on MBa8MPxL mainboard. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mn: support pwm polarity inversionMarkus Niebel1-4/+4
The i.MX8M Nano has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mm: support pwm polarity inversionMarkus Niebel3-6/+6
The i.MX8M Mini has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells and correct board device trees. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mq: support pwm polarity inversionMarkus Niebel3-6/+6
The i.MX8MQ has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells and correct board device trees. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7901: remove unnecessary cpu temp overrideTim Harvey1-12/+0
Remove the unnecessary cpu_alert0 and cpu_crit0 TMU node overrides as these are added dynamically by boot firmware based on CPU temperature grade. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7902: add vdd_5p0 ADC channelTim Harvey2-0/+14
Add missing vdd_5p0 ADC channel for the GW7902 boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8m*venice: add missing clock-names to pcie_phyTim Harvey5-0/+5
Define the missing clock-names property for the pcie_phy required by the fsl,imx8-pcie-phy dt bindings. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05drm: simplify the return expression of ast_drm_resume()Minghao Chi1-6/+1
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220505022208.57157-1-chi.minghao@zte.com.cn
2022-05-05drm/mgag200: Protect concurrent access to I/O registers with lockThomas Zimmermann3-0/+21
Add a mutex lock to protect concurrent access to I/O registers against each other. This happens between invocation of commit- tail functions and get-mode operations. Both with use the CRTC index registers MGA1064_GEN_IO_DATA and MGA1064_GEN_IO_CTL. Concurrent access can lead to failed mode-setting operations. v2: * fix typo in commit description (Jocelyn) * add comment to explain rmmio_lock Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220502142514.2174-4-tzimmermann@suse.de
2022-05-05drm/ast: Protect concurrent access to I/O registers with lockThomas Zimmermann3-3/+50
Add a mutex lock to protect concurrent access to I/O registers against each other. This happens between invocation of commit- tail functions and get-mode operations. Both with use the CRTC index register AST_IO_CRTC_PORT. Concurrent access can lead to failed mode-setting operations. v2: * fix typo in commit description (Jocelyn) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reported-by: KuoHsiang Chou <kuohsiang_chou@aspeedtech.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220502142514.2174-3-tzimmermann@suse.de
2022-05-05arm64: dts: exynos: switch UFS clock node in ExynosAutov9Chanho Park1-12/+2
Use cmu_fsys's clock node instead of dummy UFS clock node. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-13-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05arm64: dts: exynos: switch USI clocks in ExynosAutov9Chanho Park1-13/+4
Use CMU clock nodes instead of dummy fixed-rate-clock. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-12-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9Chanho Park1-0/+84
Add cmu_top, cmu_busmc, cmu_core, cmu_fsys and peric0/c1/s clock nodes. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-11-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05drm: Add DRM-managed mutex_init()Thomas Zimmermann2-0/+30
Add drmm_mutex_init(), a helper that provides managed mutex cleanup. The mutex will be destroyed with the final reference of the DRM device. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220502142514.2174-2-tzimmermann@suse.de
2022-05-05Merge tag 'samsung-dt-bindings-clk-exynosautov9-5.19' into next/dt64Krzysztof Kozlowski2-0/+518
dt-bindings for Samsung ExynosAutov9 clock controllers for v5.19 The Devicetree bindings for Samsung ExynosAutov9 clock controllers.
2022-05-05arm64: dts: imx8mm-venice-gw7902: fix pcie bindingsTim Harvey1-3/+4
Update the pcie bindings to the correct dt bindings: pcie_phy: - use pcie0_refclk - add required clock-names pcie: - remove pcie_phy clock as it comes from phy driver Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: clock: add Exynos Auto v9 SoC CMU bindingsChanho Park1-0/+219
Add dt-schema for Exynos Auto v9 SoC clock controller. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504075154.58819-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05dt-bindings: clock: add clock binding definitions for Exynos Auto v9Chanho Park1-0/+299
Add device tree clock binding definitions for below CMU blocks. - CMU_TOP - CMU_BUSMC - CMU_CORE - CMU_FYS2 - CMU_PERIC0 / C1 - CMU_PERIS Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05drm/format-helper: Share implementation among conversion helpersThomas Zimmermann1-246/+123
Provide format-independent conversion helpers for system and I/O memory. Implement most existing helpers on top of it. The source and destination formats of each conversion is handled by a per-line helper that is given to the generic implementation. v2: * remove a blank line Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220427141409.22842-5-tzimmermann@suse.de
2022-05-05drm/format-helper: Unify the parameters of all per-line conversion helpersThomas Zimmermann1-37/+50
Give each per-line conversion helper pointers of type void and the number of pixels in the line. Remove the unused swab parameters. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220427141409.22842-4-tzimmermann@suse.de
2022-05-05drm/format-helper: Remove optional byte-swap from line convertionThomas Zimmermann1-8/+24
Implement per-pixel byte swapping in a separate conversion helper for the single function that requires it. Select the correct helper for each conversion. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220427141409.22842-3-tzimmermann@suse.de
2022-05-05drm/format-helper: Implement drm_fb_swab() with per-line helpersThomas Zimmermann1-25/+35
Replace the inner loop of drm_fb_swab() with helper functions that swap the bytes in each pixel. This will allow to share the outer loop with other conversion helpers. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220427141409.22842-2-tzimmermann@suse.de
2022-05-05thunderbolt: Add support for XDomain lane bondingMika Westerberg5-83/+595
The USB4 Inter-Domain Service specification defines a protocol that can be used to establish lane bonding between two USB4 domains (hosts). So far we have not implemented it because the host controller DMA was not fast enough to be able to go over 20 Gbits/s even if lanes were bonded. However, starting from Intel Alder Lake CPUs the DMA can go over 20 Gbits/s so now it makes more sense to add this support to the driver. Because both ends need to negotiate the bonding we add a simple state machine that tracks the connection state and does the necessary steps described by the USB4 Inter-Domain Service specification. We only establish lane bonding when both sides of the link support it. Otherwise we default to use the single lane. Also this is only done when software connection manager is used. On systems with firmware based connection manager, it handles the high-speed tunneling so bonding lanes is specific to the implementation (Intel firmware based connection manager does not support lane bonding). Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-05-05thunderbolt: Ignore port locked error in tb_port_wait_for_link_width()Mika Westerberg1-3/+10
Sometimes when polling for the port after target link width is changed we get back port locked notification (because the link actually was reset and then re-trained). Instead of bailing out we can ignore these when polling for the width change as this is expected. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-05-05thunderbolt: Split setting link width and lane bonding into own functionsMika Westerberg2-14/+74
When bonding lanes over XDomain the host that has "higher" UUID triggers link re-train for bonding, and the host that has "lower" UUID just waits for this to happen. To support this split setting the link width and triggering the actual bonding a separate functions that can be called as needed. While there remove duplicated empty line in the kernel-doc comment of tb_port_lane_bonding_disable(). Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-05-05thunderbolt: Move tb_port_state() prototype to correct placeMika Westerberg1-1/+1
This should be before tb_wait_for_port() following how the functions in switch.c are organized. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-05-05thunderbolt: Add debug logging when lane is enabled/disabledMika Westerberg1-2/+8
This is useful when debugging possible issues. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-05-05ARM: dts: imx6qdl-udoo: Disable USB host to work around boot issuesMark Brown1-1/+1
Attempting to boot my Udoo Dual and Quad with mainline hangs during boot after printing: [ 3.270471] imx_usb 2184000.usb: No over current polarity defined [ 3.922502] mxs_phy 20c9000.usbphy: Data pin can't make good contact. [ 3.940097] imx_usb 2184200.usb: No over current polarity defined where imx_usb 2184200.usb is usbh1 in the DT. Adding debug prints to the code seems to show that we lock up at the first read in usbmisc_imx6q_init() which in combination with the above logging about the USB controllers suggests that we lock up on the first read in usbmisc_imx6q_init(). Looking at some of the other i.MX6 boards and the warning messages that are being printed suggests that there is bitrot in the DTS for the device so disable it for now, with it disabled the board boots successfully. Clearly this is not a real fix, but it does allow some use of the board with mainline. Similar behaviour is seen all the way back as far as v4.19, I tried going back to when the board was added but had toolchain issues. Vendor provided binaries seem fine on the boards so it seems likely that the hardware is fine and the issue is with some combination of the DT and kernel. This should obviously be resolved properly but for now this at least allows the kernel to boot with reduced functionality on these systems. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05ARM: dts: imx27: use new 'dma-channels' propertyKrzysztof Kozlowski1-1/+1
The '#dma-channels' property was deprecated in favor of one defined by generic dma-common DT bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: dmaengine: fsl-imx: deprecate '#dma-channels' and '#dma-requests'Krzysztof Kozlowski1-3/+5
The generic properties, used in most of the drivers and defined in generic dma-common DT bindings, are 'dma-channels' and 'dma-requests'. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05ARM: dts: imx6qdl-phytec: Add LED labelsAlexander Shiyan1-2/+2
This allows boards the option of adding properties or disabling the LEDs entirely. Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05mm/readahead: Fix readahead with large foliosMatthew Wilcox (Oracle)1-6/+9
Reading 100KB chunks from a big file (eg dd bs=100K) leads to poor readahead behaviour. Studying the traces in detail, I noticed two problems. The first is that we were setting the readahead flag on the folio which contains the last byte read from the block. This is wrong because we will trigger readahead at the end of the read without waiting to see if a subsequent read is going to use the pages we just read. Instead, we need to set the readahead flag on the first folio _after_ the one which contains the last byte that we're reading. The second is that we were looking for the index of the folio with the readahead flag set to exactly match the start + size - async_size. If we've rounded this, either down (as previously) or up (as now), we'll think we hit a folio marked as readahead by a different read, and try to read the wrong pages. So round the expected index to the order of the folio we hit. Reported-by: Guo Xuenan <guoxuenan@huawei.com> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
2022-05-05block: Do not call folio_next() on an unreferenced folioMatthew Wilcox (Oracle)1-1/+4
It is unsafe to call folio_next() on a folio unless you hold a reference on it that prevents it from being split or freed. After returning from the iterator, iomap calls folio_end_writeback() which may drop the last reference to the page, or allow the page to be split. If that happens, the iterator will not advance far enough through the bio_vec, leading to assertion failures like the BUG() in folio_end_writeback() that checks we're not trying to end writeback on a page not currently under writeback. Other assertion failures were also seen, but they're all explained by this one bug. Fix the bug by remembering where the next folio starts before returning from the iterator. There are other ways of fixing this bug, but this seems the simplest. Reported-by: Darrick J. Wong <djwong@kernel.org> Tested-by: Darrick J. Wong <djwong@kernel.org> Reported-by: Brian Foster <bfoster@redhat.com> Tested-by: Brian Foster <bfoster@redhat.com> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
2022-05-05arm64: dts: freescale: reduce the interrup-map-maskMichael Walle5-5/+5
Reduce the interrupt-map-mask of the external interrupt controller to 0xf to align with the devicetree schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05ARM: dts: ls1021a: reduce the interrupt-map-maskMichael Walle1-1/+1
Reduce the interrupt-map-mask of the external interrupt controller to 7 to align with the devicetree schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>