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2022-04-27x86/pm: Fix false positive kmemleak report in msr_build_context()Matthieu Baerts2-5/+9
Since e2a1256b17b1 ("x86/speculation: Restore speculation related MSRs during S3 resume") kmemleak reports this issue: unreferenced object 0xffff888009cedc00 (size 256): comm "swapper/0", pid 1, jiffies 4294693823 (age 73.764s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 ........H....... 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ backtrace: msr_build_context (include/linux/slab.h:621) pm_check_save_msr (arch/x86/power/cpu.c:520) do_one_initcall (init/main.c:1298) kernel_init_freeable (init/main.c:1370) kernel_init (init/main.c:1504) ret_from_fork (arch/x86/entry/entry_64.S:304) Reproducer: - boot the VM with a debug kernel config (see https://github.com/multipath-tcp/mptcp_net-next/issues/268) - wait ~1 minute - start a kmemleak scan The root cause here is alignment within the packed struct saved_context (from suspend_64.h). Kmemleak only searches for pointers that are aligned (see how pointers are scanned in kmemleak.c), but pahole shows that the saved_msrs struct member and all members after it in the structure are unaligned: struct saved_context { struct pt_regs regs; /* 0 168 */ /* --- cacheline 2 boundary (128 bytes) was 40 bytes ago --- */ u16 ds; /* 168 2 */ ... u64 misc_enable; /* 232 8 */ bool misc_enable_saved; /* 240 1 */ /* Note below odd offset values for the remainder of this struct */ struct saved_msrs saved_msrs; /* 241 16 */ /* --- cacheline 4 boundary (256 bytes) was 1 bytes ago --- */ long unsigned int efer; /* 257 8 */ u16 gdt_pad; /* 265 2 */ struct desc_ptr gdt_desc; /* 267 10 */ u16 idt_pad; /* 277 2 */ struct desc_ptr idt; /* 279 10 */ u16 ldt; /* 289 2 */ u16 tss; /* 291 2 */ long unsigned int tr; /* 293 8 */ long unsigned int safety; /* 301 8 */ long unsigned int return_address; /* 309 8 */ /* size: 317, cachelines: 5, members: 25 */ /* last cacheline: 61 bytes */ } __attribute__((__packed__)); Move misc_enable_saved to the end of the struct declaration so that saved_msrs fits in before the cacheline 4 boundary. The comment above the saved_context declaration says to fix wakeup_64.S file and __save/__restore_processor_state() if the struct is modified: it looks like all the accesses in wakeup_64.S are done through offsets which are computed at build-time. Update that comment accordingly. At the end, the false positive kmemleak report is due to a limitation from kmemleak but it is always good to avoid unaligned members for optimisation purposes. Please note that it looks like this issue is not new, e.g. https://lore.kernel.org/all/9f1bb619-c4ee-21c4-a251-870bd4db04fa@lwfinger.net/ https://lore.kernel.org/all/94e48fcd-1dbd-ebd2-4c91-f39941735909@molgen.mpg.de/ [ bp: Massage + cleanup commit message. ] Fixes: 7a9c2dd08ead ("x86/pm: Introduce quirk framework to save/restore extra MSR registers around suspend/resume") Suggested-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: Matthieu Baerts <matthieu.baerts@tessares.net> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://lore.kernel.org/r/20220426202138.498310-1-matthieu.baerts@tessares.net
2022-04-27hwmon: (pmbus) delta-ahe50dc-fan: work around hardware quirkZev Weiss1-0/+16
CLEAR_FAULTS commands can apparently sometimes trigger catastrophic power output glitches on the ahe-50dc, so block them from being sent at all. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220427035109.3819-1-zev@bewilderbeest.net Fixes: d387d88ed045 ("hwmon: (pmbus) Add Delta AHE-50DC fan control module driver") Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2022-04-27x86/sev: Get the AP jump table address from secrets pageBrijesh Singh3-59/+87
The GHCB specification section 2.7 states that when SEV-SNP is enabled, a guest should not rely on the hypervisor to provide the address of the AP jump table. Instead, if a guest BIOS wants to provide an AP jump table, it should record the address in the SNP secrets page so the guest operating system can obtain it directly from there. Fix this on the guest kernel side by having SNP guests use the AP jump table address published in the secrets page rather than issuing a GHCB request to get it. [ mroth: - Improve error handling when ioremap()/memremap() return NULL - Don't mix function calls with declarations - Add missing __init - Tweak commit message ] Fixes: 0afb6b660a6b ("x86/sev: Use SEV-SNP AP creation to start secondary CPUs") Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Michael Roth <michael.roth@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20220422135624.114172-3-michael.roth@amd.com
2022-04-27x86/sev: Add missing __init annotations to SEV init routinesMichael Roth2-4/+4
Currently, get_secrets_page() is only reachable from the following call chain: __init snp_init_platform_device(): get_secrets_page() so mark it as __init as well. This is also needed since it calls early_memremap(), which is also an __init routine. Similarly, get_jump_table_addr() is only reachable from the following call chain: __init setup_real_mode(): sme_sev_setup_real_mode(): sev_es_setup_ap_jump_table(): get_jump_table_addr() so mark get_jump_table_addr() and everything up that call chain as __init as well. This is also needed since future patches will add a call to get_secrets_page(), which needs to be __init due to the reasons stated above. Suggested-by: Borislav Petkov <bp@suse.de> Signed-off-by: Michael Roth <michael.roth@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20220422135624.114172-2-michael.roth@amd.com
2022-04-27virt: sevguest: Rename the sevguest dir and files to sev-guestTom Lendacky8-9/+9
Rename the drivers/virt/coco/sevguest directory and files to sev-guest so as to match the driver name. [ bp: Rename Documentation/virt/coco/sevguest.rst too, as reported by sfr: https://lore.kernel.org/r/20220427101059.3bf55262@canb.auug.org.au ] Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/2f5c9cb16e3a67599c8e3170f6c72c8712c47d53.1650464054.git.thomas.lendacky@amd.com
2022-04-27Merge branch 'remove-virt_to_bus-drivers'David S. Miller30-15143/+1
Jakub Kicinski says: ==================== net: remove non-Ethernet drivers using virt_to_bus() Networking is currently the main offender in using virt_to_bus(). Frankly all the drivers which use it are super old and unlikely to be used today. They are just an ongoing maintenance burden. In other words this series is using virt_to_bus() as an excuse to shed some old stuff. Having done the tree-wide dev_addr_set() conversion recently I have limited sympathy for carrying dead code. Obviously please scream if any of these drivers _is_ in fact still being used. Otherwise let's take the chance, we can always apologize and revert if users show up later. Also I should say thanks to everyone who contributed to this code! The work continues to be appreciated although realistically in more of a "history book" fashion... ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: hamradio: remove support for DMA SCC devicesJakub Kicinski4-1486/+0
Another incarnation of Z8530, looks like? Again, no real changes in the git history, and it needs VIRT_TO_BUS. Unlikely to have users, let's spend less time refactoring dead code... Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: wan: remove support for Z85230-based devicesJakub Kicinski9-3035/+0
Looks like all the changes to this driver had been automated churn since git era begun. The driver is using virt_to_bus(), it's just a maintenance burden unlikely to have any users. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: wan: remove support for COSA and SRP synchronous serial boardsJakub Kicinski6-2186/+1
Looks like all the changes to this driver had been automated churn since git era begun. The driver is using virt_to_bus() so it should be updated to a proper DMA API or removed. Given the latest "news" entry on the website is from 1999 I'm opting for the latter. I'm marking the allocated char device major number as [REMOVED], I reckon we can't reuse it in case some SW out there assumes its COSA? Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: atm: remove support for ZeitNet ZN122x ATM devicesJakub Kicinski10-2492/+0
This driver received nothing but automated fixes in the last 15 years. Since it's using virt_to_bus it's unlikely to be used on any modern platform. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: atm: remove support for Madge Horizon ATM devicesJakub Kicinski6-3372/+0
This driver received nothing but automated fixes since git era begun. Since it's using virt_to_bus it's unlikely to be used on any modern platform. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: atm: remove support for Fujitsu FireStream ATM devicesJakub Kicinski6-2572/+0
This driver received nothing but automated fixes (mostly spelling and compiler warnings) since git era begun. Since it's using virt_to_bus it's unlikely to be used on any modern platform. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27Merge branch 'lan966x-ptp-programmable-pins'David S. Miller5-1/+338
Horatiu Vultur says: ==================== net: lan966x: Add support for PTP programmable pins Lan966x has 8 PTP programmable pins. The last pin is hardcoded to be used by PHC0 and all the rest are shareable between the PHCs. The PTP pins can implement both extts and perout functions. v1->v2: - use ptp_find_pin_unlocked instead of ptp_find_pin inside the irq handler. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: lan966x: Add support for PTP_PF_EXTTSHoratiu Vultur3-1/+127
Extend the PTP programmable pins to implement also PTP_PF_EXTTS function. The PTP pin can be configured to capture only on the rising edge of the PPS signal. And once an event is seen then an interrupt is generated and the local time counter is saved. The interrupt is shared between all the pins. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: lan966x: Add support for PTP_PF_PEROUTHoratiu Vultur2-0/+169
Lan966x has 8 PTP programmable pins, where the last pins is hardcoded to be used by PHC0, which does the frame timestamping. All the rest of the PTP pins can be shared between the PHCs and can have different functions like perout or extts. For now add support for PTP_FS_PEROUT. The HW is not able to support absolute start time but can use the nsec for phase adjustment when generating PPS. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: lan966x: Add registers used to configure the PTP pinHoratiu Vultur1-0/+40
Add registers that are used to configure the PTP pins. These registers are used to enable the interrupts per PTP pin and to set the waveform generated by the pin. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27net: lan966x: Change the PTP pin used to read/write the PHC.Horatiu Vultur1-1/+1
To read/write a value to a PHC, it is required to use a PTP pin. Currently it is used pin 5, but change to pin 7 as is the last pin. All the other pins will have different functions. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27dt-bindings: net: lan966x: Extend with the ptp external interrupt.Horatiu Vultur1-0/+2
Extend dt-bindings for lan966x with ptp external interrupt. This is generated when an external 1pps signal is received on the ptp pin. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27s390/irq: utilize RCU instead of irq_lock_sparse() in show_msi_interrupt()Pingfan Liu1-2/+2
As demonstrated by commit 74bdf7815dfb ("genirq: Speedup show_interrupts()"), irq_desc can be accessed safely in RCU read section. Hence here resorting to rcu read lock to get rid of irq_lock_sparse(). Signed-off-by: Pingfan Liu <kernelfans@gmail.com> Link: https://lore.kernel.org/r/20220422100212.22666-1-kernelfans@gmail.com Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2022-04-27s390: disable -Warray-boundsSven Schnelle1-0/+10
gcc-12 shows a lot of array bound warnings on s390. This is caused by the S390_lowcore macro which uses a hardcoded address of 0. Wrapping that with absolute_pointer() works, but gcc no longer knows that a 12 bit displacement is sufficient to access lowcore. So it emits instructions like 'lghi %r1,0; l %rx,xxx(%r1)' instead of a single load/store instruction. As s390 stores variables often read/written in lowcore, this is considered problematic. Therefore disable -Warray-bounds on s390 for gcc-12 for the time being, until there is a better solution. Signed-off-by: Sven Schnelle <svens@linux.ibm.com> Link: https://lore.kernel.org/r/yt9dzgkelelc.fsf@linux.ibm.com Link: https://lore.kernel.org/r/20220422134308.1613610-1-svens@linux.ibm.com Link: https://lore.kernel.org/r/20220425121742.3222133-1-svens@linux.ibm.com Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2022-04-27arm64: dts: ti: k3-am625-sk: Enable on board peripheralsVignesh Raghavendra1-0/+273
Add nodes for I2C IO expander, OSPI Flash, Eth PHYs, SD and eMMC that are present on AM625 SK board. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220427072954.8821-3-vigneshr@ti.com
2022-04-27arm64: dts: ti: k3-am62: Add more peripheral nodesVignesh Raghavendra2-0/+286
Add nodes for McSPI, OSPI, DMA, CPSW, MMC and On Chip SRAM nodes. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220427072954.8821-2-vigneshr@ti.com
2022-04-27arm64: dts: ti: k3-am642-sk: Enable WLAN connected to SDHCI0Kishon Vijay Abraham I1-0/+62
WL1837 module is connected to SDHCI0 in AM642 SK. Enable it here. This will enable the WiFi functionaliy on the board. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com> Signed-off-by: Aparna M <a-m1@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220414133612.13365-1-a-m1@ti.com
2022-04-27arm64: dts: ti: k3-am64-mcu: remove incorrect UART base clock ratesMatthias Schiffer1-2/+0
We found that (at least some versions of) the sci-fw set the base clock rate for UARTs in the MCU domain to 96 MHz instead of the expected 48 MHz, leading to incorrect baud rates when used from Linux. As the 8250_omap driver will query the actual clock rate from the clk driver when clock-frequency is unset, removing the incorrect property is sufficient to fix the baud rate. Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20220419075157.189347-1-matthias.schiffer@ew.tq-group.com
2022-04-27Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/netDavid S. Miller3-19/+13
-queue Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2022-04-26 This series contains updates to ice driver only. Ivan Vecera removes races related to VF message processing by changing mutex_trylock() call to mutex_lock() and moving additional operations to occur under mutex. Petr Oros increases wait time after firmware flash as current time is not sufficient. Jake resolves a use-after-free issue for mailbox snapshot. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27Merge branch 'mptcp-MP_FAIL-timeout'David S. Miller6-8/+216
Mat Martineau says: ==================== mptcp: Timeout for MP_FAIL response When one peer sends an infinite mapping to coordinate fallback from MPTCP to regular TCP, the other peer is expected to send a packet with the MPTCP MP_FAIL option to acknowledge the infinite mapping. Rather than leave the connection in some half-fallback state, this series adds a timeout after which the infinite mapping sender will reset the connection. Patch 1 adds a fallback self test. Patches 2-5 make use of the MPTCP socket's retransmit timer to reset the MPTCP connection if no MP_FAIL was received. Patches 6 and 7 extends the self test to check MP_FAIL-related MIBs. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27selftests: mptcp: print extra msg in chk_csum_nrGeliang Tang1-1/+10
When the multiple checksum errors occur in chk_csum_nr(), print the numbers of the errors as an extra message. Signed-off-by: Geliang Tang <geliang.tang@suse.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27selftests: mptcp: check MP_FAIL response mibsGeliang Tang1-3/+35
This patch extends chk_fail_nr to check the MP_FAIL response mibs. Add a new argument invert for chk_fail_nr to allow it can check the MP_FAIL TX and RX mibs from the opposite direction. When the infinite map is received before the MP_FAIL response, the response will be lost. A '-' can be added into fail_tx or fail_rx to represent that MP_FAIL response TX or RX can be lost when doing the checks. Signed-off-by: Geliang Tang <geliang.tang@suse.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27mptcp: reset subflow when MP_FAIL doesn't respondGeliang Tang4-0/+68
This patch adds a new msk->flags bit MPTCP_FAIL_NO_RESPONSE, then reuses sk_timer to trigger a check if we have not received a response from the peer after sending MP_FAIL. If the peer doesn't respond properly, reset the subflow. Signed-off-by: Geliang Tang <geliang.tang@suse.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27mptcp: add MP_FAIL response supportGeliang Tang3-1/+12
This patch adds a new struct member mp_fail_response_expect in struct mptcp_subflow_context to support MP_FAIL response. In the single subflow with checksum error and contiguous data special case, a MP_FAIL is sent in response to another MP_FAIL. Signed-off-by: Geliang Tang <geliang.tang@suse.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27mptcp: add data lock for sk timersGeliang Tang1-0/+12
mptcp_data_lock() needs to be held when manipulating the msk retransmit_timer or the sk sk_timer. This patch adds the data lock for the both timers. Signed-off-by: Geliang Tang <geliang.tang@suse.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27mptcp: use mptcp_stop_timerGeliang Tang1-2/+2
Use the helper mptcp_stop_timer() instead of using sk_stop_timer() to stop icsk_retransmit_timer directly. Signed-off-by: Geliang Tang <geliang.tang@suse.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27selftests: mptcp: add infinite map testcaseGeliang Tang2-1/+77
Add the single subflow test case for MP_FAIL, to test the infinite mapping case. Use the test_linkfail value to make 128KB test files. Add a new function reset_with_fail(), in it use 'iptables' and 'tc action pedit' rules to produce the bit flips to trigger the checksum failures. Set validate_checksum to enable checksums for the MP_FAIL tests without passing the '-C' argument. Set check_invert flag to enable the invert bytes check for the output data in check_transfer(). Instead of the file mismatch error, this test prints out the inverted bytes. Add a new function pedit_action_pkts() to get the numbers of the packets edited by the tc pedit actions. Print this numbers to the output. Also add the needed kernel configures in the selftests config file. Suggested-by: Davide Caratti <dcaratti@redhat.com> Co-developed-by: Matthieu Baerts <matthieu.baerts@tessares.net> Signed-off-by: Matthieu Baerts <matthieu.baerts@tessares.net> Signed-off-by: Geliang Tang <geliang.tang@suse.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-27mfd: sprd: Jugle {of,spi}_device_id tables into numerical orderCixi Geng1-2/+2
Ordered with the smallest number at the top. Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220427075212.3409407-1-gengcixi@gmail.com
2022-04-27mtd: spi-nor: micron-st: Remove status polling on volatile registers writeTudor Ambarus1-3/+0
Writing volatile registers are instant according to Micron and do not need any status polling. Remove status polling on volatile registers write. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-12-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: spansion: Remove status polling on volatile registers writeTudor Ambarus1-4/+0
Writing volatile registers are instant according to Cypress and do not need any status polling. Remove status polling on volatile registers write. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-11-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: Introduce templates for SPI NOR operationsTudor Ambarus5-107/+158
Clean the op declaration and hide the details of each op. With this it results a cleanner, easier to read code. No functional change expected. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Acked-by: Michael Walle <michael@walle.cc> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20220420103427.47867-10-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: spansion: Rework spi_nor_cypress_octal_dtr_enable()Tudor Ambarus1-59/+69
Introduce template operation to remove code duplication. Split spi_nor_cypress_octal_dtr_enable() in spi_nor_cypress_octal_dtr_ena() spi_nor_cypress_octal_dtr_dis() as it no longer made sense to try to keep everything alltogether: too many "if (enable)" throughout the code, which made the code difficult to read. Add debug messages in case spi_nor_read_id() fails. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-9-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: micron-st: Rework spi_nor_micron_octal_dtr_enable()Tudor Ambarus1-51/+60
Introduce template operation to remove code duplication. Split spi_nor_micron_octal_dtr_enable() in spi_nor_micron_octal_dtr_en() and spi_nor_micron_octal_dtr_dis() as it no longer made sense to try to keep everything alltogether: too many "if (enable)" throughout the code, which made the code difficult to follow. Add dev_dbg messages in case spi_nor_read_id() fails. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-8-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: core: Add helpers to read/write any registerTudor Ambarus2-0/+50
There are manufacturers that use registers indexed by address. Some of them support "read/write any register" opcodes. Provide core methods that can be used by all manufacturers. SPI NOR controller ops are intentionally not supported as we intend to move all the SPI NOR controller drivers under the SPI subsystem. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Tested-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-7-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: manufacturers: Use spi_nor_read_id() core methodTudor Ambarus2-20/+6
Use spi_nor_read_id() core method to avoid duplication of code. Now the ID is read on the full SPI_NOR_MAX_ID_LEN instead of round_up(nor->info->id_len, 2), but it doesn't harm to read more ID bytes, so the change comes with no secondary effects. dev_dbg messages in case spi_nor_read_id() fails, will be added in a further patch after we split the octal DTR enable/disable methods. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-6-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: core: Introduce method for RDID opTudor Ambarus2-15/+44
RDID is used in the core to auto detect the flash, but also by some manufacturer drivers that contain flashes that support Octal DTR mode, so that they can read the flash ID after the switch to Octal DTR was made to test if the switch was successful. Introduce a core method for RDID op to avoid code duplication. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-5-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: core: Use auto-detection only onceTudor Ambarus1-3/+1
In case spi_nor_match_name() returned NULL, the auto detection was issued twice. There's no reason to try to detect the same chip twice, do the auto detection only once. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-4-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: Introduce spi_nor_match_id()Tudor Ambarus1-21/+19
Similar to spi_nor_match_name() extend the search of flash_info through all the manufacturers, this time doing the match by ID. There's no reason to limit the search per manufacturer yet, do it globally, search the flash in all the parts of all manufacturers in a single method. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-3-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: Rename method, s/spi_nor_match_id/spi_nor_match_nameTudor Ambarus1-3/+3
The method is matching a flash_info entry by searching by name. Rename the method for better clarity. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220420103427.47867-2-tudor.ambarus@microchip.com
2022-04-27mtd: spi-nor: core: Check written SR value in spi_nor_write_16bit_sr_and_check()Chen-Tsung Hsieh1-0/+9
Read back Status Register 1 to ensure that the written byte match the received value and return -EIO if read back test failed. Without this patch, spi_nor_write_16bit_sr_and_check() only check the second half of the 16bit. It causes errors like spi_nor_sr_unlock() return success incorrectly when spi_nor_write_16bit_sr_and_check() doesn't write SR successfully. Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()") Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20220126073227.3401275-1-chentsung@chromium.org
2022-04-27mips: dts: ingenic: x1000: Add PWM device tree nodeAidan MacDonald1-0/+12
Copied from the jz4740 devicetree and trimmed to 5 timers, which is what the hardware supports. Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Tested-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-04-27MIPS: mscc: serval: rename pinctrl nodesMichael Walle1-7/+7
The pinctrl device tree binding will be converted to YAML format. Rename the pin nodes so they end with "-pins" to match the schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-04-27MIPS: mscc: ocelot: rename pinctrl nodesMichael Walle2-5/+5
The pinctrl device tree binding will be converted to YAML format. Rename the pin nodes so they end with "-pins" to match the schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-04-27MIPS: mscc: jaguar2: rename pinctrl nodesMichael Walle3-13/+13
The pinctrl device tree binding will be converted to YAML format. Rename the pin nodes so they end with "-pins" to match the schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>