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2022-04-25RDMA/mlx5: Move umr checks to umr.hAharon Landau5-70/+72
Move mlx5_ib_can_load_pas_with_umr() and mlx5_ib_can_reconfig_with_umr() to umr.h and rename them accordingly. Link: https://lore.kernel.org/r/1b799b0142534a63dfd5bacc5f8ad2256d7777ad.1649747695.git.leonro@nvidia.com Signed-off-by: Aharon Landau <aharonl@nvidia.com> Reviewed-by: Michael Guralnik <michaelgur@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-04-25RDMA/mlx5: Move init and cleanup of UMR to umr.cAharon Landau4-103/+125
The first patch in a series to split UMR logic to a dedicated file. As a start, move the init and cleanup of UMR resources to umr.c. Link: https://lore.kernel.org/r/849e632dd1945a2534712a320cc5779f2149ba96.1649747695.git.leonro@nvidia.com Signed-off-by: Aharon Landau <aharonl@nvidia.com> Reviewed-by: Michael Guralnik <michaelgur@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-04-25arm64: dts: fvp: Align virtio device node names with dtschemaSudeep Holla3-5/+5
Align the virtio mmio device tree node names with the schema to avoid any schema warnings. Link: https://lore.kernel.org/r/20220425135524.1077986-1-sudeep.holla@arm.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-25of: overlay: do not break notify on NOTIFY_{OK|STOP}Nuno Sá1-3/+1
We should not break overlay notifications on NOTIFY_{OK|STOP} otherwise we might break on the first fragment. We should only stop notifications if a *real* errno is returned by one of the listeners. Fixes: a1d19bd4cf1fe ("of: overlay: pr_err from return NOTIFY_OK to overlay apply/remove") Signed-off-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220420130205.89435-1-nuno.sa@analog.com
2022-04-25arm64: dts: fvp: Add virtio-rng supportDiego Sueiro3-2/+10
The virtio-rng is available from FVP_Base_RevC-2xAEMvA version 11.17, so add the devicetree node to support it. It is disabled by default to avoid any issues with models that doesn't support it. Link: https://lore.kernel.org/r/ac3be672c636091ee1e079cadce776b1fb7e0b2e.1650543392.git.diego.sueiro@arm.com Signed-off-by: Diego Sueiro <diego.sueiro@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-25arm64: dts: Add Arm corstone1000 platform supportRui Miguel Silva4-0/+248
Corstone1000 is a platform from arm, which includes pre verified Corstone SSE710 sub-system that combines Cortex-A and Cortex-M processors [0]. These device trees contains the necessary bits to support the Corstone 1000 FVP (Fixed Virtual Platform) [1] and the FPGA MPS3 board Cortex-A35 implementation at Cortex-A35 host side of this platform. [2] 0: https://developer.arm.com/documentation/102360/0000 1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps 2: https://developer.arm.com/documentation/dai0550/c/ Link: https://lore.kernel.org/r/20220408131922.3864348-3-rui.silva@linaro.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-25dt-bindings: Add Arm corstone1000 platformRui Miguel Silva1-0/+45
Add bindings to describe the FPGA in a prototyping board (MPS3) implementation and the Fixed Virtual Platform implementation of the ARM Corstone1000 platform. Link: https://lore.kernel.org/r/20220408131922.3864348-2-rui.silva@linaro.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-25x86/fpu/xsave: Support XSAVEC in the kernelThomas Gleixner3-26/+48
XSAVEC is the user space counterpart of XSAVES which cannot save supervisor state. In virtualization scenarios the hypervisor does not expose XSAVES but XSAVEC to the guest, though the kernel does not make use of it. That's unfortunate because XSAVEC uses the compacted format of saving the XSTATE. This is more efficient in terms of storage space vs. XSAVE[OPT] as it does not create holes for XSTATE components which are not supported or enabled by the kernel but are available in hardware. There is room for further optimizations when XSAVEC/S and XGETBV1 are supported. In order to support XSAVEC: - Define the XSAVEC ASM macro as it's not yet supported by the required minimal toolchain. - Create a software defined X86_FEATURE_XCOMPACTED to select the compacted XSTATE buffer format for both XSAVEC and XSAVES. - Make XSAVEC an option in the 'XSAVE' ASM alternatives Requested-by: Andrew Cooper <Andrew.Cooper3@citrix.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20220404104820.598704095@linutronix.de
2022-04-25ASoC: SOF: mediatek: Add DSP system PM callback for mt8186Tinghan Shen1-0/+28
Add DSP system PM callback for suspend and resume Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Yaochun Hung <yc.hung@mediatek.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220422055659.8738-5-tinghan.shen@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: SOF: mediatek: Add mt8186 dsp clock supportTinghan Shen4-1/+141
Add adsp clock on/off support on mt8186 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Yaochun Hung <yc.hung@mediatek.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220422055659.8738-4-tinghan.shen@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: SOF: mediatek: Add mt8186 sof fw loader and dsp opsTinghan Shen4-1/+75
Add mt8186-loader module with ops callback to load and run firmware on mt8186 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Yaochun Hung <yc.hung@mediatek.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220422055659.8738-3-tinghan.shen@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: SOF: mediatek: Add mt8186 hardware supportTinghan Shen6-0/+451
Add support of SOF on Mediatek mt8186 SoC. MT8186 has 2 Cortex A76 cores paired with 6 Cortex A55 cores. It also has Cadence HiFi-5 DSP single core. The IPC communication between AP and DSP is based on shared DRAM and mailbox interrupt. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Yaochun Hung <yc.hung@mediatek.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220422055659.8738-2-tinghan.shen@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25genirq/matrix: Remove redundant assignment to variable 'end'Colin Ian King1-1/+1
Variable end is being initialized with a value that is never read, it is being re-assigned later with the same value. The initialization is redundant and can be removed. Cleans up clang scan build warning: kernel/irq/matrix.c:289:25: warning: Value stored to 'end' during its initialization is never read [deadcode.DeadStores] Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20220422110418.1264778-1-colin.i.king@gmail.com
2022-04-25spi: clps711x: Use syscon_regmap_lookup_by_phandleAlexander Shiyan1-2/+3
Since version 5.13, the standard syscon bindings have been added to all clps711x DT nodes, so we can now use the more general syscon_regmap_lookup_by_phandle function to get the syscon pointer. Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.kernel.org/r/20220420061038.22570-1-eagle.alexander923@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: stm32: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-2/+1
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220420090452.2588930-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: spi-cadence-quadspi: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220414085637.2541805-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: spi-tegra20-slink: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-4/+2
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220418110141.2559019-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: cadence-quadspi: allow operations with cmd/addr buswidth >1Matthias Schiffer1-7/+1
With the removal of the incorrect logic of cqspi_set_protocol(), ops with cmd/addr buswidth >1 are now working correctly. Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash using 1-4-4 operations. DTR operations are currently untested, so we leave them disabled for now (except for the previously allowed 8-8-8 ops). Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/20220420155616.281730-2-matthias.schiffer@ew.tq-group.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: cadence-quadspi: drop cqspi_set_protocol()Matthias Schiffer1-103/+27
As suggested, this removes the whole cqspi_set_protocol() function, as it is not actually needed: - Checks for unsupported operations are already handled by supports_op(), removing the need to distinguish DTR and non-DTR modes in the buswidth setup - supports_op() ensures that the DTR flags match for all relevant parts of an operation, so op->cmd.dtr can be used instead of copying the flag to the cqspi_flash_pdata - The logic in cqspi_set_protocol() is moved to cqspi_calc_rdreg() and cqspi_write_setup() (with a helper macro CQSPI_OP_WIDTH()) The helper macro checks nbytes instead of buswidth for 0, for consistency with supports_op() etc. Suggested-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/20220420155616.281730-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: spi-tegra20-sflash: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-4/+2
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220418110103.2558955-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: rockchip: fix missing error on unsupported SPI_CS_HIGHLuca Ceresoli1-0/+8
The hardware (except for the ROCKCHIP_SPI_VER2_TYPE2 version) does not support active-high native chip selects. However if such a CS is configured the core does not error as it normally should, because the 'ctlr->use_gpio_descriptors = true' line in rockchip_spi_probe() makes the core set SPI_CS_HIGH in ctlr->mode_bits. In such a case the spi-rockchip driver operates normally but produces an active-low chip select signal without notice. There is no provision in the current core code to handle this situation. Fix by adding a check in the ctlr->setup function (similarly to what spi-atmel.c does). This cannot be done reading the SPI_CS_HIGH but in ctlr->mode_bits because that bit gets always set by the core for master mode (see above). Fixes: eb1262e3cc8b ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods") Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Link: https://lore.kernel.org/r/20220421213251.1077899-1-luca.ceresoli@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: spi-omap2-mcspi: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-9/+4
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220414085433.2541670-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: mxs: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-2/+1
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220420090420.2588868-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: spi-imx: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220414085343.2541608-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: spi-sprd: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-2/+1
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220414085506.2541732-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: ingenic: Add support for new Ingenic SoCs.周琰杰 (Zhou Yanjie)2-7/+39
1.Since it would be dangerous to specify a newer SoC's compatible string as the fallback of an older SoC's compatible string, we add support for the "ingenic,jz4775-spi" compatible string in the driver. This will permit to support the JZ4775 by having: compatible = "ingenic,jz4775-spi"; Instead of doing: compatible = "ingenic,jz4775-spi", "ingenic,jz4780-spi"; 2.Add support for probing the spi-ingenic driver on the X1000 SoC from Ingenic. From the X1000 SoC onwards, the maximum frequency allowed by the SSI module of Ingenic SoCs has been changed from 54MHz to 50MHz. So "max_speed_hz" is introduced in "jz_soc_info" to set different maximum frequency values. 3.Add support for probing the spi-ingenic driver on the X2000 SoC from Ingenic. The X2000 SoC has only one native chip select line, so "max_native_cs" is introduced in "jz_soc_info" to set different maximum number of native chip select lines. 4.Because of the introduction of support for the X-series SoCs, the current driver is not only applicable to the JZ-series SoCs, so the description texts has been modified to avoid misunderstanding. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/1650724725-93758-4-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25spi: Add bindings for new Ingenic SoCs.周琰杰 (Zhou Yanjie)1-0/+3
Add the SPI bindings for the JZ4775 SoC, the X1000 SoC, and the X2000 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/1650724725-93758-3-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25PCI: microchip: Add a missing semicolonUwe Kleine-König1-1/+1
If the driver is configured as a module (after allowing this by changing PCIE_MICROCHIP_HOST from bool to tristate) the missing semicolon makes the compiler very unhappy. While there isn't a real problem as MODULE_DEVICE_TABLE always evaluates to nothing for a built-in driver, do it right for consistency with other drivers. Link: https://lore.kernel.org/r/20220420065832.14173-1-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Daire McNamara <daire.mcnamara@microchip.com>
2022-04-25spi: ingenic: Add support for use GPIO as chip select line.周琰杰 (Zhou Yanjie)1-2/+7
Add support for using GPIOs as chip select lines on Ingenic SoCs. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/1650724725-93758-2-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25regulator: richtek,rt4801: parse GPIOs per regulatorKrzysztof Kozlowski1-11/+38
Having one enable-gpios property for all regulators is discouraged and instead, similarly to regulator core ena_gpiod feature, each GPIO should be present in each regulator node. Add support for parsing such GPIOs, keeping backwards compatibility. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://lore.kernel.org/r/20220425072455.27356-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25regulator: dt-bindings: richtek,rt4801: use existing ena_gpiod featureKrzysztof Kozlowski1-1/+13
The binding and driver duplicated regulator core feature of controlling regulators with GPIOs (of_parse_cb + ena_gpiod) and created its own enable-gpios property with multiple GPIOs. This is a less preferred way, because enable-gpios should enable only one element, not multiple. It also duplicates existing solution. Deprecate the original 'enable-gpios' and add per-regulator property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220425072455.27356-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25regmap: cache: set max_register with reg_strideJeongtae Park1-2/+2
Current logic does not consider multi-stride cases, the max_register have to calculate with reg_stride because it is a kind of address range. Signed-off-by: Jeongtae Park <jtp.park@samsung.com> Link: https://lore.kernel.org/r/20220425114613.15934-1-jtp.park@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: img-i2s-in: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220414085310.2541546-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: img-parallel-out: using pm_runtime_resume_and_getMinghao Chi1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220420030246.2575629-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: qcom: Use MCLK as RT5682I-VS sysclk sourceJudy Hsiao1-5/+5
Both MCLK and BCLK can be the clock source of sysclk via PLL according to its datasheet. This patch sets MCLK as the clock source as we use MCLK in the previous projects. Fixes: c5198db82d4c ("ASoC: qcom: Add driver support for ALC5682I-VS") Signed-off-by: Judy Hsiao <judyhsiao@chromium.org> Link: https://lore.kernel.org/r/20220419062952.356017-1-judyhsiao@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: imx-hdmi: remove useless null check before call of_node_put()Haowen Bai1-2/+1
No need to add null check before call of_node_put(), since the implementation of of_node_put() has done it. Signed-off-by: Haowen Bai <baihaowen@meizu.com> Link: https://lore.kernel.org/r/1650509120-25377-1-git-send-email-baihaowen@meizu.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: Intel: avs: Depend on SND_INTEL_DSP_CONFIGAmadeusz Sławiński1-1/+1
In order to enable NHLT support one must select SND_INTEL_DSP_CONFIG, which will select SND_INTEL_NHLT. Otherwise the file containing NHLT code doesn't get build leading to errors when linking. Fixes: 274d79e51875 ("ASoC: Intel: avs: Configure modules according to their type") Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://lore.kernel.org/r/20220425091646.545216-2-amadeuszx.slawinski@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: Intel: avs: Enable AVS driver only on x86 platformsAmadeusz Sławiński1-1/+2
Only supported platform for AVS are x86 machines, so there is no reason for it to be enabled on other architectures. Allow exception for compile tests. Fixes: 274d79e51875 ("ASoC: Intel: avs: Configure modules according to their type") Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://lore.kernel.org/r/20220425091646.545216-1-amadeuszx.slawinski@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: img-spdif-out: using pm_runtime_resume_and_get to simplify the codeMinghao Chi1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220420030439.2575817-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: img-spdif-in: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220419110718.2574674-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25firmware: cirrus: cs_dsp: Avoid padding bytes in cs_dsp_coeff_ctlRichard Fitzgerald1-14/+14
Change the order of members in struct cs_dsp_coeff_ctl to avoid the compiler having to insert alignment padding bytes. On a x86_64 build this saves 16 bytes per control. - Pointers are collected to the top of the struct (with the exception of priv, as noted below), so that they are inherently aligned. - The set and enable bitflags are placed together so they can be merged. - priv is placed at the end of the struct - it is for use by the client so it is helpful to make it stand out, and since the compiler will always pad the struct size to an alignment multiple putting a pointer last won't introduce any more padding. - struct cs_dsp_alg_region is placed at the end, right before priv, for the same reasoning as priv. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220425095159.3044527-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: sh: Make SND_SOC_RZ depend on ARCH_RZG2LBiju Das1-1/+1
The SSI block is identical on Renesas RZ/G2L, RZ/G2UL and RZ/V2L SoC's, so instead of adding dependency for each SoC's add dependency on ARCH_RZG2L. The ARCH_RZG2L config option is already selected by ARCH_R9A07G043, ARCH_R9A07G044 and ARCH_R9A07G054. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220423164443.146299-1-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: fsl_asrc: using pm_runtime_resume_and_get to simplify the codeMinghao Chi1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220420030402.2575755-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: tlv320*: use i2c_match_id and simple i2c probeStephen Kitt4-42/+47
As part of the ongoing i2c transition to the simple probe ("probe_new"), this patch uses i2c_match_id to retrieve the driver_data for the probed device. The id parameter is thus no longer necessary and the simple probe can be used instead. In the context of an i2c probe, i2c_match_id with the module id table and the probed client never returns null, so removing the null check on the i2c_device_id pointer is safe. The i2c id tables are moved up before the probe function, as suggested by Wolfram Sang, except where the existing code already had a declaration for the of_device_id table. Signed-off-by: Stephen Kitt <steve@sk2.org> Link: https://lore.kernel.org/r/20220415160613.148882-7-steve@sk2.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: tas*: use i2c_match_id and simple i2c probeStephen Kitt3-26/+31
As part of the ongoing i2c transition to the simple probe ("probe_new"), this patch uses i2c_match_id to retrieve the driver_data for the probed device. The id parameter is thus no longer necessary and the simple probe can be used instead. The i2c id tables are moved up before the probe function, as suggested by Wolfram Sang, except where the existing code already had a declaration for the of_device_id table. Signed-off-by: Stephen Kitt <steve@sk2.org> Link: https://lore.kernel.org/r/20220415160613.148882-6-steve@sk2.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: pcm186x: use i2c_match_id and simple i2c probeStephen Kitt1-12/+12
As part of the ongoing i2c transition to the simple probe ("probe_new"), this patch uses i2c_match_id to retrieve the driver_data for the probed device. The id parameter is thus no longer necessary and the simple probe can be used instead. The i2c id table is moved up before the probe function, as suggested by Wolfram Sang. Signed-off-by: Stephen Kitt <steve@sk2.org> Link: https://lore.kernel.org/r/20220415160613.148882-5-steve@sk2.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: max980*: use i2c_match_id and simple i2c probeStephen Kitt3-30/+33
As part of the ongoing i2c transition to the simple probe ("probe_new"), this patch uses i2c_match_id to retrieve the driver_data for the probed device. The id parameter is thus no longer necessary and the simple probe can be used instead. In the context of an i2c probe, i2c_match_id with the module id table and the probed client never returns null, so removing the null check on the i2c_device_id pointer is safe. The i2c id tables are moved up before the probe function, as suggested by Wolfram Sang. Signed-off-by: Stephen Kitt <steve@sk2.org> Link: https://lore.kernel.org/r/20220415160613.148882-4-steve@sk2.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: alc56*: use i2c_match_id and simple i2c probeStephen Kitt2-20/+24
As part of the ongoing i2c transition to the simple probe ("probe_new"), this patch uses i2c_match_id to retrieve the driver_data for the probed device. The id parameter is thus no longer necessary and the simple probe can be used instead. The i2c id tables are moved up before the probe function, as suggested by Wolfram Sang. Signed-off-by: Stephen Kitt <steve@sk2.org> Link: https://lore.kernel.org/r/20220415160613.148882-3-steve@sk2.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: ak*: use i2c_match_id and simple i2c probeStephen Kitt2-7/+11
As part of the ongoing i2c transition to the simple probe ("probe_new"), this patch uses i2c_match_id to retrieve the driver_data for the probed device. The id parameter is thus no longer necessary and the simple probe can be used instead. Signed-off-by: Stephen Kitt <steve@sk2.org> Link: https://lore.kernel.org/r/20220415160613.148882-2-steve@sk2.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-25ASoC: SOF: loader: Remove the old fw_ready related codePeter Ujfalusi3-250/+1
The fw_ready is handled internally to ipc3, we can remove the old code from the loader.c along with the functions only used by the fw_ready() Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Ajit Pandey <ajitkumar.pandey@amd.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Link: https://lore.kernel.org/r/20220421080735.31698-7-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>