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2022-03-11zh_CN: Add translation for admin-guide/mm/index.rstxu xin2-1/+50
Translate Documentation/admin-guide/mm/index.rst into Chinese. Update Documentation/admin-guide/index.rst. Reviewed-by: Yang Yang <yang.yang29@zte.com.cn> Reviewed-by: Alex Shi <alexs@kernel.org> Reviewed-by: Yanteng Si <siyanteng@loongson.cn> Signed-off-by: xu xin <xu.xin16@zte.com.cn> Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Link: https://lore.kernel.org/r/2d695dac05efc012b99fbc7525be65a421c7de03.1646899056.git.siyanteng@loongson.cn Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-03-11zh_CN: Add translations for admin-guide/mm/ksm.rstxu xin1-0/+148
Translate Documentation/admin-guide/mm/ksm.rst into Chinese. Reviewed-by: Yang Yang <yang.yang29@zte.com.cn> Reviewed-by: Alex Shi <alexs@kernel.org> Reviewed-by: Yanteng Si <siyanteng@loongson.cn> Signed-off-by: xu xin <xu.xin16@zte.com.cn> Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Link: https://lore.kernel.org/r/f987a3a2cbffaad64f6e2377a5e393d9afbb099c.1646899056.git.siyanteng@loongson.cn Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-03-11Add Chinese translation for vm/ksm.rstxu xin2-0/+71
Translate Documentation/vm/ksm.rst into Chinese. Update Documentation/translations/zh_CN/vm/index.rst. Reviewed-by: Yang Yang <yang.yang29@zte.com.cn> Reviewed-by: Alex Shi <alexs@kernel.org> Reviewed-by: Yanteng Si <siyanteng@loongson.cn> Signed-off-by: xu xin <xu.xin16@zte.com.cn> Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Link: https://lore.kernel.org/r/ceb82d6458cd79bc3b7060199db0c3518adc3b8b.1646899056.git.siyanteng@loongson.cn Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-03-11i2c: i801: Drop two outdated commentsJean Delvare1-5/+0
* Timeouts are reported even in interrupt mode since commit b3b8df97723d ("i2c: i801: Use wait_event_timeout to wait for interrupts") so drop the comment which claims this only happens in polled mode. * xact does not include the PEC bit, as the driver does not support software PEC. Signed-off-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-03-11remoteproc: k3-dsp: Add support for IPC-only mode for all K3 DSPsSuman Anna1-17/+124
Add support to the K3 DSP remoteproc driver to configure all the C66x and C71x cores on J721E SoCs to be either in IPC-only mode or the traditional remoteproc mode. The IPC-only mode expects that the remote processors are already booted by the bootloader, and only perform the minimum steps required to initialize and deinitialize the virtio IPC transports. The remoteproc mode allows the kernel remoteproc driver to do the regular load and boot and other device management operations for a DSP. The IPC-only mode for a DSP is detected and configured at driver probe time by querying the System Firmware for the DSP power and reset state and/or status and making sure that the DSP is indeed started by the bootloaders, otherwise the device is configured for remoteproc mode. Support for IPC-only mode is achieved through .attach(), .detach() and .get_loaded_rsc_table() callback ops and zeroing out the regular rproc ops .prepare(), .unprepare(), .start() and .stop(). The resource table follows a design-by-contract approach and is expected to be at the base of the DDR firmware region reserved for each remoteproc, it is mostly expected to contain only the virtio device and trace resource entries. NOTE: The driver cannot configure a DSP core for remoteproc mode by any means without rebooting the kernel if that DSP core has been started by a bootloader. This is the current desired behavior and can be enhanced in the future if the feature is needed. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220213201246.25952-6-s-anna@ti.com
2022-03-11remoteproc: k3-dsp: Refactor mbox request code in startSuman Anna1-27/+40
Refactor out the mailbox request and associated ping logic code from k3_dsp_rproc_start() function into its own separate function so that it can be re-used in the soon to be added .attach() ops callback. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220213201246.25952-5-s-anna@ti.com
2022-03-11remoteproc: k3-r5: Add support for IPC-only mode for all R5FsSuman Anna1-4/+215
Add support to the K3 R5F remoteproc driver to configure all the R5F cores to be either in IPC-only mode or the traditional remoteproc mode. The IPC-only mode expects that the remote processors are already booted by the bootloader, and only performs the minimum steps required to initialize and deinitialize the virtio IPC transports. The remoteproc mode allows the kernel remoteproc driver to do the regular load and boot and other device management operations for a R5F core. The IPC-only mode for a R5F core is detected and configured at driver probe time by querying the System Firmware for the R5F power and reset state and/or status and making sure that the R5F core is indeed started by the bootloaders, otherwise the device is configured for remoteproc mode. Support for IPC-only mode is achieved through .attach(), .detach() and .get_loaded_rsc_table() callback ops and zeroing out the regular rproc ops .prepare(), .unprepare(), .start() and .stop(). The resource table follows a design-by-contract approach and is expected to be at the base of the DDR firmware region reserved for each remoteproc, it is mostly expected to contain only the virtio device and trace resource entries. NOTE: The driver cannot configure a R5F core for remoteproc mode by any means without rebooting the kernel if that R5F core has been started by a bootloader. This is the current desired behavior and can be enhanced in the future if the feature is needed. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220213201246.25952-4-s-anna@ti.com
2022-03-11remoteproc: k3-r5: Refactor mbox request code in startSuman Anna1-27/+41
Refactor out the mailbox request and associated ping logic code from k3_r5_rproc_start() function into its own separate function so that it can be re-used in the soon to be added .attach() ops callback. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220213201246.25952-3-s-anna@ti.com
2022-03-11remoteproc: Change rproc_shutdown() to return a statusSuman Anna5-7/+11
The rproc_shutdown() function is currently not returning any error code, and any failures within rproc_stop() are not passed back to the users. Change the signature to return a success value back to the callers. The remoteproc sysfs and cdev interfaces are also updated to return back this status to userspace. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220213201246.25952-2-s-anna@ti.com
2022-03-11Merge tag 'riscv-for-linus-5.17-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxLinus Torvalds3-7/+19
Pull RISC-V fixes from Palmer Dabbelt: - prevent users from enabling the alternatives framework (and thus errata handling) on XIP kernels, where runtime code patching does not function correctly. - properly detect offset overflow for AUIPC-based relocations in modules. This may manifest as modules calling arbitrary invalid addresses, depending on the address allocated when a module is loaded. * tag 'riscv-for-linus-5.17-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fix auipc+jalr relocation range checks riscv: alternative only works on !XIP_KERNEL
2022-03-11rpmsg: use struct_size over open coded arithmeticMinghao Chi (CGEL ZTE)1-1/+1
Replace zero-length array with flexible-array member and make use of the struct_size() helper in kzalloc(). For example: struct glink_defer_cmd { struct list_head node; struct glink_msg msg; u8 data[]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220216030720.1839503-1-chi.minghao@zte.com.cn
2022-03-11rpmsg: smd: allow opening rpm_requests even if already openedLuca Weiss1-1/+6
On msm8953 the channel seems to be already opened when booting Linux but we still need to open it for communication with regulators etc. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220220201909.445468-6-luca@z3ntu.xyz
2022-03-11remoteproc: qcom: q6v5: Add interconnect path proxy voteBjorn Andersson2-1/+23
Many remoteproc instances requires that Linux casts a proxy vote for an interconnect path during boot, until they can do it themselves. Add support for voting for a single path. As this is a shared problem between both PAS and MSS drivers, the path is acquired and votes casted from the common helper code. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Georgi Djakov <djakov@kernel.org> Link: https://lore.kernel.org/r/20220225033224.2238425-1-bjorn.andersson@linaro.org
2022-03-11remoteproc: mediatek: Support mt8186 scpAllen-KH Cheng2-0/+38
Add SCP support for mt8186 Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220225132747.31808-3-allen-kh.cheng@mediatek.com
2022-03-11dt-bindings: remoteproc: mediatek: Add binding for mt8186 scpAllen-KH Cheng1-0/+1
Add mt8186 compatible to binding document. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220225132747.31808-2-allen-kh.cheng@mediatek.com
2022-03-11Make the SOF pcm_hw_params DSP op IPC agnosticMark Brown19-83/+95
Merge series from Ranjani Sridharan <ranjani.sridharan@linux.intel.com>: In preparation for supporting the newly introduced IPC version in the SOF firmware, this patchset adds the changes required to make the pcm_hw_params DSP op IPC agnostic.
2022-03-11ASoC: SOF/Intel: small fixes and updates for 5.18Mark Brown5-4/+38
Merge series from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>: One important fix from Kai to restore DM1 L1 functionality, one important update from Peter to use DMA trace buffers as capture-only and sync them and a couple of minor updates for Intel/SOF platforms.
2022-03-11ASoC: mediatek: Add mt8195 reset control supportMark Brown2-0/+26
Merge series from Trevor Wu <trevor.wu@mediatek.com>: Add reset controller support for MT8195.
2022-03-11ASoC: Intel: AVS - Audio DSP for cAVSMark Brown19-0/+3857
Merge series from Cezary Rojewski <cezary.rojewski@intel.com>: A continuation of cleanup work of Intel SST solutions found in sound/soc/intel/. With two major chapters released last year catpt [1] and removal of haswell solution [2], time has come for Skylake-driver. Througout 2019, 2020 and 2021 Skylake-driver has had many fixes applied and even attempts of refactors as seen in fundamental overhaul [3], IPC flow adjustments [4] and LARGE_CONFIG overhaul [5] series. Unfortunately, story repeats itself - problems are found within the core of a driver. Painting it with different colors does not change the fact that is it still a house of cards. As changes needed to address those issues would make Skylake solution incompatible with its previous revisions, a decision has been made to provide a new solution instead. In time it would deprecate and replace Skylake-driver. That solution has been called AVS - from AudioDSP architecture name: Audio-Voice-Speech. It is meant to provide support for the exact same range of platforms as its predecessor: SKL, KBL, AML and APL. Note: this series is dependent upon HDA-series [6] which exposes several codec-organization functions allowing for reduced code size on avs-driver side. Note: this series does not add fully functional driver as its size would get out of control. Here, focus is put on adding IPC protocol and code loading code.
2022-03-11remoteproc: qcom_q6v5_mss: Fix some leaks in q6v5_alloc_memory_regionMiaoqian Lin1-4/+7
The device_node pointer is returned by of_parse_phandle() or of_get_child_by_name() with refcount incremented. We should use of_node_put() on it when done. This function only call of_node_put(node) when of_address_to_resource succeeds, missing error cases. Fixes: 278d744c46fd ("remoteproc: qcom: Fix potential device node leaks") Fixes: 051fb70fd4ea ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220308064522.13804-1-linmq006@gmail.com
2022-03-11remoteproc: qcom_wcnss: Add missing of_node_put() in wcnss_alloc_memory_regionMiaoqian Lin1-0/+1
The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: aed361adca9f ("remoteproc: qcom: Introduce WCNSS peripheral image loader") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220308063102.10049-1-linmq006@gmail.com
2022-03-11remoteproc: qcom: Fix missing of_node_put in adsp_alloc_memory_regionMiaoqian Lin1-0/+1
The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: dc160e449122 ("remoteproc: qcom: Introduce Non-PAS ADSP PIL driver") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220308031219.4718-1-linmq006@gmail.com
2022-03-11Merge tag 'powerpc-5.17-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linuxLinus Torvalds1-1/+1
Pull powerpc fix from Michael Ellerman: "Fix STACKTRACE=n build, in particular for skiroot_defconfig" * tag 'powerpc-5.17-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc: Fix STACKTRACE=n build
2022-03-11ARM: fix Thumb2 regression with Spectre BHBRussell King (Oracle)1-2/+2
When building for Thumb2, the vectors make use of a local label. Sadly, the Spectre BHB code also uses a local label with the same number which results in the Thumb2 reference pointing at the wrong place. Fix this by changing the number used for the Spectre BHB local label. Fixes: b9baf5c8c5c3 ("ARM: Spectre-BHB workaround") Tested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-03-11Merge tag 'mmc-v5.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmcLinus Torvalds6-15/+22
Pull MMC fixes from Ulf Hansson: "MMC core: - Restore (mostly) the busy polling for MMC_SEND_OP_COND MMC host: - meson-gx: Fix DMA usage of meson_mmc_post_req()" * tag 'mmc-v5.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: core: Restore (almost) the busy polling for MMC_SEND_OP_COND mmc: meson: Fix usage of meson_mmc_post_req()
2022-03-11Merge branch irq/qcom-mpm into irq/irqchip-nextMarc Zyngier4-0/+566
* irq/qcom-mpm: : . : Add support for Qualcomm's MPM wakeup controller, courtesy : of Shawn Guo. : . irqchip: Add Qualcomm MPM controller driver dt-bindings: interrupt-controller: Add Qualcomm MPM support Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-03-11irqchip: Add Qualcomm MPM controller driverShawn Guo3-0/+470
Qualcomm SoCs based on the RPM architecture have a MSM Power Manager (MPM) in always-on domain. In addition to managing resources during sleep, the hardware also has an interrupt controller that monitors the interrupts when the system is asleep, wakes up the APSS when one of these interrupts occur and replays it to GIC after it becomes operational. It adds an irqchip driver for this interrupt controller, and here are some notes about it. - For given SoC, a fixed number of MPM pins are supported, e.g. 96 pins on QCM2290. Each of these MPM pins can be either a MPM_GIC pin or a MPM_GPIO pin. The mapping between MPM_GIC pin and GIC interrupt is defined by SoC, as well as the mapping between MPM_GPIO pin and GPIO number. The former mapping is retrieved from device tree, while the latter is defined in TLMM pinctrl driver. - The power domain (PD) .power_off hook is used to notify RPM that APSS is about to power collapse. This requires MPM PD be the parent PD of CPU cluster. - When SoC gets awake from sleep mode, the driver will receive an interrupt from RPM, so that it can replay interrupt for particular polarity. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220308080534.3384532-3-shawn.guo@linaro.org
2022-03-11dt-bindings: interrupt-controller: Add Qualcomm MPM supportShawn Guo1-0/+96
It adds DT binding support for Qualcomm MPM interrupt controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220308080534.3384532-2-shawn.guo@linaro.org
2022-03-11parisc: Increase parisc_cache_flush_threshold settingJohn David Anglin1-3/+15
In testing the "Fix non-access data TLB cache flush faults" change, I noticed a significant improvement in glibc build and check times. This led me to investigate the parisc_cache_flush_threshold setting. It determines when we switch from line flushing to whole cache flushing. It turned out that the parisc_cache_flush_threshold setting on mako and mako2 machines (PA8800 and PA8900 processors) was way too small. Adjusting this setting provided almost a factor two improvement in the glibc build and check time. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11dm: update email address in MAINTAINERSMike Snitzer1-1/+1
Update my email address to kernel.org to allow distinction between my "upstream" and "Red" Hats. Signed-off-by: Mike Snitzer <snitzer@redhat.com> Signed-off-by: Mike Snitzer <snitzer@kernel.org>
2022-03-11parisc/unaligned: Enhance user-space visible outputHelge Deller1-26/+10
Userspace is up to now limited to 32-bit, so it's sufficient to print only 32-bit values when showing pointer addresses. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc/unaligned: Rewrite 32-bit inline assembly of emulate_sth()Helge Deller1-8/+7
Convert to use real temp variables instead of clobbering processor registers. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc/unaligned: Rewrite 32-bit inline assembly of emulate_ldd()Helge Deller1-15/+13
Convert to use real temp variables instead of clobbering processor registers. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc/unaligned: Rewrite inline assembly of emulate_ldw()Helge Deller1-12/+11
Convert to use real temp variables instead of clobbering processor registers. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc/unaligned: Rewrite inline assembly of emulate_ldh()Helge Deller1-6/+5
Convert to use real temp variables instead of clobbering processor registers. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc/unaligned: Use EFAULT fixup handler in unaligned handlersHelge Deller1-105/+55
Convert the inline assembly code to use the automatic EFAULT exception handler. With that the fixup code can be dropped. The other change is to allow double-word only when a 64-bit kernel is used instead of depending on CONFIG_PA20. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Reduce code size by optimizing get_current() function callsHelge Deller1-3/+5
The get_current() code uses the mfctl() macro to get the pointer to the current task struct from %cr30. The problem with the mfctl() macro is, that it is marked volatile which is basically correct, because mfctl() is used to get e.g. the current internal timer or interrupt flags as well. But specifically the task struct pointer (%cr30) doesn't change over time when the kernel executes code for a task. So, by dropping the volatile when retrieving %cr30 the compiler is now able to get this value only once and optimize the generated code a lot. A bloat-o-meter comparism shows that this patch saves ~5kB kernel code on a 32-bit kernel and ~6kB kernel code on a 64-bit kernel. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Use constants to encode the space registers like SR_KERNELHelge Deller7-27/+24
Use the provided space register constants instead of hardcoded values. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Use SR_USER and SR_KERNEL in get_user() and put_user()Helge Deller1-14/+14
Instead of hardcoding the space registers as strings, use the SR_USER and SR_KERNEL constants to form the space register in the access functions. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Add defines for various space registerHelge Deller1-0/+6
Provide defines for space registers (SR_KERNEL, SR_USER, ...) which should be used instead of hardcoding the values. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Always use the self-extracting kernel featureHelge Deller2-21/+0
This patch drops the CONFIG_PARISC_SELF_EXTRACT option. The palo boot loader is able to decompress a kernel which was compressed with gzip. That possibility was useful when the Linux kernel self-extracting feature wasn't implemented yet. Beside the fact that the self-extracting feature offers much better compression rates, we do support self-extracting kernels already since kernel v4.14, so now it's really time to get rid of that old option and always use the self-extractor. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11video/fbdev/stifb: Implement the stifb_fillrect() functionHelge Deller1-2/+43
The stifb driver (for Artist/HCRX graphics on PA-RISC) was missing the fillrect function. Tested on a 715/64 PA-RISC machine and in qemu. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Add vDSO supportHelge Deller32-165/+1149
Add minimal vDSO support, which provides the signal trampoline helpers, but none of the userspace syscall helpers like time wrappers. The big benefit of this vDSO implementation is, that we now don't need an executeable stack any longer. PA-RISC is one of the last architectures where an executeable stack was needed in oder to implement the signal trampolines by putting assembly instructions on the stack which then gets executed. Instead the kernel will provide the relevant code in the vDSO page and only put the pointers to the signal information on the stack. By dropping the need for executable stacks we avoid running into issues with applications which want non executable stacks for security reasons. Additionally, alternative stacks on memory areas without exec permissions are supported too. This code is based on an initial implementation by Randolph Chung from 2006: https://lore.kernel.org/linux-parisc/4544A34A.6080700@tausq.org/ I did the porting and lifted the code to current code base. Dave fixed the unwind code so that gdb and glibc are able to backtrace through the code. An additional patch to gdb will be pushed upstream by Dave. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Dave Anglin <dave.anglin@bell.net> Cc: Randolph Chung <randolph@tausq.org> Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Simplify fast path for non-access data TLB faultsJohn David Anglin1-67/+5
With the latest cache fix for non-access faults and the support for non-access faults (code 17) in handle_interruption, we can remove the fast path emulation for fdc, fic, pdc, lpa, probe and probei instructions. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Fix handling off probe non-access faultsJohn David Anglin3-0/+92
Currently, the parisc kernel does not fully support non-access TLB fault handling for probe instructions. In the fast path, we set the target register to zero if it is not a shadowed register. The slow path is not implemented, so we call do_page_fault. The architecture indicates that non-access faults should not cause a page fault from disk. This change adds to code to provide non-access fault support for probe instructions. It also modifies the handling of faults on userspace so that if the address lies in a valid VMA and the access type matches that for the VMA, the probe target register is set to one. Otherwise, the target register is set to zero. This was done to make probe instructions more useful for userspace. Probe instructions are not very useful if they set the target register to zero whenever a page is not present in memory. Nominally, the purpose of the probe instruction is determine whether read or write access to a given address is allowed. This fixes a problem in function pointer comparison noticed in the glibc testsuite (stdio-common/tst-vfprintf-user-type). The same problem is likely in glibc (_dl_lookup_address). V2 adds flush and lpa instruction support to handle_nadtlb_fault. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11parisc: Fix non-access data TLB cache flush faultsJohn David Anglin1-27/+1
When a page is not present, we get non-access data TLB faults from the fdc and fic instructions in flush_user_dcache_range_asm and flush_user_icache_range_asm. When these occur, the cache line is not invalidated and potentially we get memory corruption. The problem was hidden by the nullification of the flush instructions. These faults also affect performance. With pa8800/pa8900 processors, there will be 32 faults per 4 KB page since the cache line is 128 bytes. There will be more faults with earlier processors. The problem is fixed by using flush_cache_pages(). It does the flush using a tmp alias mapping. The flush_cache_pages() call in flush_cache_range() flushed too large a range. V2: Remove unnecessary preempt_disable() and preempt_enable() calls. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-11x86/sgx: Free backing memory after faulting the enclave pageJarkko Sakkinen1-9/+48
There is a limited amount of SGX memory (EPC) on each system. When that memory is used up, SGX has its own swapping mechanism which is similar in concept but totally separate from the core mm/* code. Instead of swapping to disk, SGX swaps from EPC to normal RAM. That normal RAM comes from a shared memory pseudo-file and can itself be swapped by the core mm code. There is a hierarchy like this: EPC <-> shmem <-> disk After data is swapped back in from shmem to EPC, the shmem backing storage needs to be freed. Currently, the backing shmem is not freed. This effectively wastes the shmem while the enclave is running. The memory is recovered when the enclave is destroyed and the backing storage freed. Sort this out by freeing memory with shmem_truncate_range(), as soon as a page is faulted back to the EPC. In addition, free the memory for PCMD pages as soon as all PCMD's in a page have been marked as unused by zeroing its contents. Cc: stable@vger.kernel.org Fixes: 1728ab54b4be ("x86/sgx: Add a page reclaimer") Reported-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Link: https://lkml.kernel.org/r/20220303223859.273187-1-jarkko@kernel.org
2022-03-11drm/vmwgfx: Stop using surface dma commands on most configurationsZack Rusin1-3/+8
Initial version of guest backed objects in the host had some performance issues that made using surface-dma's instead of direct copies faster. Surface dma's force a migration to vram which at best is slow and at worst is impossible (e.g. on svga3 where there's not enough vram to migrate fb's to it). Slowly migrate away from surface dma's to direct copies by limiting their usage to systems with more than 32MB of vram. Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Maaz Mombasawala <mombasawalam@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220302152426.885214-9-zack@kde.org
2022-03-11drm/vmwgfx: Implement MSI/MSI-X support for IRQsZack Rusin3-8/+58
SVGAv3 deprecates legacy interrupts and adds support for MSI/MSI-X. With MSI the driver visible side remains largely unchanged but with MSI-X each interrupt gets delivered on its own vector. Add support for MSI/MSI-X while preserving the old functionality for SVGAv2. Code between the SVGAv2 and SVGAv3 is exactly the same, only the number of available vectors changes, in particular between legacy and MSI-X interrupts. Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Reviewed-by: Maaz Mombasawala <mombasawalam@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220307162412.1183049-1-zack@kde.org
2022-03-11drm/vmwgfx: Initialize drm_mode_fb_cmd2Zack Rusin1-1/+1
Transition to drm_mode_fb_cmd2 from drm_mode_fb_cmd left the structure unitialized. drm_mode_fb_cmd2 adds a few additional members, e.g. flags and modifiers which were never initialized. Garbage in those members can cause random failures during the bringup of the fbcon. Initializing the structure fixes random blank screens after bootup due to flags/modifiers mismatches during the fbcon bring up. Fixes: dabdcdc9822a ("drm/vmwgfx: Switch to mode_cmd2") Signed-off-by: Zack Rusin <zackr@vmware.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: <stable@vger.kernel.org> # v4.10+ Reviewed-by: Martin Krastev <krastevm@vmware.com> Reviewed-by: Maaz Mombasawala <mombasawalam@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220302152426.885214-7-zack@kde.org