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2022-02-25ARM: dts: stm32: keep uart4 behavior on stm32mp157c-odysseyErwan Le Ray1-0/+2
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp157c-odyssey board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart4 behavior on stm32mp157c-lxa-mc1Erwan Le Ray1-0/+2
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp157c-lxa-mc1 board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart nodes behavior on stm32mp157a-stinger96Erwan Le Ray1-0/+6
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp157a-stinger96 board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Delete also usart2 and uart7 DMA property to keep current behavior. Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0Erwan Le Ray1-0/+4
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp1-microdev2.0 board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Delete also uart8 DMA property to keep current behavior. Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0-of7Erwan Le Ray1-0/+4
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp1-microdev2.0-of7 board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Delete also uart8 DMA property to keep current behavior. Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart4 behavior on stm32mp157a-iot-boxErwan Le Ray1-0/+2
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp157a-iot-box board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-edimm2.2Erwan Le Ray1-0/+2
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in icore-stm32mp1-edimm2.2 board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-ctouch2Erwan Le Ray1-0/+2
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in icore-stm32mp1-ctouch2 board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart4 and uart7 behavior on stm32mp15xx-dkxErwan Le Ray1-0/+4
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp15xx-dkx board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Delete also uart7 DMA property to keep current behavior. Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: keep uart4 behavior on stm32mp157c-ed1Erwan Le Ray1-0/+2
DMA configuration is added to uart nodes in stm32mp15x device tree. Delete uart4 DMA property in stm32mp157c-ed1 board device tree to keep console in irq mode, as DMA support for console has been removed from the driver by commit e359b4411c28 ("serial: stm32: fix threaded interrupt handling"). Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: add DMA configuration to UART nodes on stm32mp151Erwan Le Ray1-0/+21
Add DMA configuration in stm32mp15x uart nodes by selecting dma direct mode and alternate REQ/ACK dma protocol for uart. DMA direct mode allows to bypass DMA FIFO. Each DMA request immediately initiates a transfer from/to the memory. This allows USART to get data transferred, even when the transfer ends before the DMA FIFO completion. Default REQ/ACK DMA protocol consists in maintaining ACK signal up to the removal of REQuest and the transfer completion. In case of alternative REQ/ACK protocol, ACK de-assertion does not wait the removal of the REQuest, but only the transfer completion. Due to a possible DMA stream lock when transferring data to/from STM32 USART/UART, select this alternative protocol in STM32 USART/UART nodes. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: use exti 19 as main interrupt to support RTC wakeup on stm32mp157Alexandre Torgue1-1/+1
Link between GIC and exti line is now done inside EXTI driver. So in order to be wake up source exti irqchip has to be used. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: Add CM4 reserved memory, rproc and IPCC on DHCOR SoMMarek Vasut1-0/+56
Add reserved memory nodes for CortexM4 on the STM32MP1 DHCOR SoM, enable rproc to control the CM4 and IPCC mailbox to interact with it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: add MDMA on STM32MP13x SoC familyAmelie Delaunay1-0/+10
MDMA on STM32MP13x SoCs is the same than on STM32MP15x SoCs: it offers up to 32 channels and supports 48 requests. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25ARM: dts: stm32: add DMA1, DMA2 and DMAMUX1 on STM32MP13x SoC familyAmelie Delaunay1-0/+44
DMA1 and DMA2 on STM32MP13x SoCs are the same than on STM32MP15x SoCs: they offer up to 8 channels and request lines are routed through DMAMUX1. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-25rtw89: get channel parameters of 160MHz bandwidthPing-Ke Shih2-15/+36
Calculate the offset of center and primary frequencies to get hardware indices of center channel and primary channel, and then use them to configure hardware to a specific channel. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220222032103.29392-1-pkshih@realtek.com
2022-02-25tty: serial: amba-pl010: use more uart_port pointersJiri Slaby1-90/+84
The code uses uart_amba_port::port on many places. Sometimes it even needs not uart_amba_port itself. So simplify the code on many places and remove the need of uart_amba_port on some places completely. No functional changes intended. The objdump -d output shows only a code move in pl010_rx_chars(). Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: Russell King <linux@armlinux.org.uk> Link: https://lore.kernel.org/r/20220224111028.20917-5-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25tty: serial: lpc32xx_hs: use serial_lpc32xx_stop_tx() helperJiri Slaby1-6/+4
Instead of open-coding what serial_lpc32xx_stop_tx() already does, call it in __serial_lpc32xx_tx() directly. Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220224111028.20917-6-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25tty: serial: serial_txx9: remove info print from initJiri Slaby1-5/+0
Remove the hello print among with version and name definitions. Drivers should print nothing if they are successful. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220224111028.20917-3-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25tty: serial: mpc52xx_uart: make rx/tx hooks return unsignedJiri Slaby1-11/+11
All these return bitmasks, so it makes more sense to return unsigned -- this is what a reader and also all the callers expect. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220224111028.20917-2-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.gitKalle Valo37-203/+2014
ath.git patches for v5.18. Major changes: ath11k * debugfs interface to configure firmware debug log level * debugfs interface to test Target Wake Time (TWT) * provide 802.11ax High Efficiency (HE) data via radiotap ath9k * use hw_random API instead of directly dumping into random.c wcn36xx * fix wcn3660 to work on 5 GHz band
2022-02-25serial: 8250_lpss: Balance reference count for PCI DMA deviceAndy Shevchenko1-6/+22
The pci_get_slot() increases its reference count, the caller must decrement the reference count by calling pci_dev_put(). Fixes: 9a1870ce812e ("serial: 8250: don't use slave_id of dma_slave_config") Depends-on: a13e19cf3dc1 ("serial: 8250_lpss: split LPSS driver to separate module") Reported-by: Qing Wang <wangqing@vivo.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220223151240.70248-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25serial: 8250_mid: Balance reference count for PCI DMA deviceAndy Shevchenko1-4/+15
The pci_get_slot() increases its reference count, the caller must decrement the reference count by calling pci_dev_put(). Fixes: 90b9aacf912a ("serial: 8250_pci: add Intel Tangier support") Fixes: f549e94effa1 ("serial: 8250_pci: add Intel Penwell ports") Reported-by: Qing Wang <wangqing@vivo.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Depends-on: d9eda9bab237 ("serial: 8250_pci: Intel MID UART support to its own driver") Link: https://lore.kernel.org/r/20220215100920.41984-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25serial: 8250_aspeed_vuart: replace snprintf with sysfs_emitYang Guang1-3/+3
coccinelle report: ./drivers/tty/serial/8250/8250_aspeed_vuart.c:85:8-16: WARNING: use scnprintf or sprintf ./drivers/tty/serial/8250/8250_aspeed_vuart.c:174:8-16: WARNING: use scnprintf or sprintf ./drivers/tty/serial/8250/8250_aspeed_vuart.c:127:8-16: WARNING: use scnprintf or sprintf Use sysfs_emit instead of scnprintf or sprintf makes more sense. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Yang Guang <yang.guang5@zte.com.cn> Signed-off-by: David Yang <davidcomponentone@gmail.com> Link: https://lore.kernel.org/r/fed40753603dac4d14b17970c88e6f5f936348c1.1644541843.git.yang.guang5@zte.com.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25serial: 8250: Correct Kconfig help text for blacklisted PCI devicesMaciej W. Rozycki1-7/+9
Correct the Kconfig help text for SERIAL_8250_LPSS, SERIAL_8250_MID and SERIAL_8250_PERICOM configuration options for dedicated PCI UART drivers that have been blacklisted in the generic PCI 8250 UART driver and as from commit a13e19cf3dc10 ("serial: 8250_lpss: split LPSS driver to separate module"), commit d9eda9bab2372 ("serial: 8250_pci: Intel MID UART support to its own driver"), and commit fcfd3c09f4078 ("serial: 8250_pci: Split out Pericom driver") respectively are not handled by said driver anymore (rather than for extra features only, as the current text indicates), and therefore require the respective dedicated drivers to work at all. Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2202121704560.34636@angie.orcam.me.uk Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25arm64: dts: marvell: armada-37xx: add device node for UART clock and use itPali Rohár1-2/+12
Define DT node for UART clock "marvell,armada-3700-uart-clock" and use this UART clock as a base clock for all UART devices. Reviewed-by: Marek Behún <kabel@kernel.org> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-7-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25serial: mvebu-uart: implement support for baudrates higher than 230400 BdPali Rohár1-18/+65
Implement simple usage of fractional divisor. When main divisor D is too large to represent requested baudrate then use divisor M from the fractional divisor feature. All the M prescalers are set to the same and maximal value 63, so the fractional part of the fractional divisor is not used at all. We also determine upper limit for possible baudrates. Experiments show that UART at baudrate 1500000 Bd with this configuration is stable. So there is no need to implement complicated calculation of fractional coefficients yet. To use this feature with higher baudrates, it is required to use UART clock provided by UART clock driver. Default boot xtal clock is not capable of higher baudrates. Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-6-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25dt-bindings: mvebu-uart: update information about UART clockPali Rohár1-3/+6
Device "marvell,armada-3700-uart" should use "marvell,armada-3700-uart-clock" compatible clock. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-5-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25serial: mvebu-uart: implement UART clock driver for configuring UART base clockPali Rohár2-2/+520
Implement a new device driver for controlling UART clocks on Marvell Armada 3700 SoC. This device driver is loaded for devices which match the compatible string "marvell,armada-3700-uart-clock". There are more pitfalls related to UART clocks: - both UARTs use same parent clock source (which can be xtal or one of the TBG clocks), - if a TBG clock is used as the parent clock, there are two additional divisors that can both be configured to divide the rate by 1, 2, ... 6, but these divisors are again shared between the two UART controllers on the SOC, - the configuration of the parent clock source and divisors is done in the address space of the first UART controller, UART1. Clocks can be gated separately for UART1 and UART2, but this setting also lives in the address space of UART1, - Marvell's Functional Specification for Armada 3720 document has the clock gating bits swapped, so the one described to gate UART1 clock actually gates UART2 and vice versa, - each UART has it's own "special divisor", and this uses the parent clock described above. These divisors are configure in each UART's address space separately. Thus the driver for UART2 controller needs to have access to UART1 address space, since UART1 address space contains some bits exclusive for UART2 and also some bits which are shared between UART1 and UART2. Also, during boot, when early console is active on one of the UARTs, and we want to switch parent clock from xtal (default) to TBG (to be more flexible with baudrates), the driver changing UART clocks also needs to be able to change the "special divisor", so that the baudrate of earlycon is not changed when swtiching to normal console. Thus the clock driver also needs to be able to access UART2 register space, for UART2's "special divisor". For these reasons, this new UART clock driver does not use ioremap_resource(), but only ioremap() to prevent resource conflicts between UART clock driver and UART driver. We need to share only two 32-bit registers between the UART driver and the UART clock driver: - UART Clock Control - UART 2 Baud Rate Divisor Access to these two registers are protected by one spinlock to prevent any conflicts. Access is required only during probing, when changing baudrate or during suspend/resume. Hardware can be configured to use one of following clocks as UART parent clock: TBG-A-P, TBG-B-P, TBG-A-S, TBG-B-S, xtal. Not every clock is usable for higher buadrates. Any subset can be specified in the device-tree and the driver will choose the best one which also still supports the mandatory baudrate of 9600 Bd. For smooth boot log output it is needed to specify clock used by early console, otherwise garbage would be printed on UART during probe of UART clock driver and transitioning from early console to normal console. We are implementing this to be able to configure TBG clock as UART parent clock, which is required to be able to achieve higher baudrates than 230400 Bd. We achieve this by referencing this new UART clock device node in UART's device node. UART clock device driver automatically chooses the best clock source for UART driver. Until now, UART's device-tree node needed to reference one of the static clocks (xtal or one of the TBGs) as parent clock in the `clocks` phandle - the parent clock which was configured before booting the kernel. If bootloader changed UART's parent clock, it needed to change the `clocks` phandle in DTB correspondingly before booting. From now on both the old mechanism (xtal or TBG referenced as parent clock in `clocks` phandle) and the new one (UART clock referenced in the `clocks` phandle) are supported, to provide full backward compatibility with existing DTS files, full backward compatibility with existing boot loaders, and to provide new features (runtime clock configuration to allow higher baudrates than 230400 Bd). New features are available only with new DTS files. There was also a discussion about how the UART node and the clock-controller node could be wrapped together in a new binding [1, 2]. As explained there, this is not possible if we want to keep backwards compatibility with existing bootloaders, and thus we are doing this by putting the UART clock-controller node inside the UART1 node. [1] https://lore.kernel.org/linux-serial/20220120000651.in7s6nazif5qjkme@pali/ [2] https://lore.kernel.org/linux-serial/20220125204006.A6D09C340E0@smtp.kernel.org/ Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-4-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25dt-bindings: mvebu-uart: document DT bindings for marvell,armada-3700-uart-clockPali Rohár1-0/+59
Add DT bindings documentation for device nodes with compatible string "marvell,armada-3700-uart-clock". Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-3-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25math64: New DIV_U64_ROUND_CLOSEST helperPali Rohár1-0/+13
Provide DIV_U64_ROUND_CLOSEST helper which uses div_u64 to perform division rounded to the closest integer using unsigned 64bit dividend and unsigned 32bit divisor. Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-2-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25Merge tag 'mt76-for-kvalo-2022-02-24' of https://github.com/nbd168/wirelessKalle Valo31-376/+2271
mt76 patches for 5.18 - bugfixes - mt7915 thermal management improvements - SAR support for more mt76 drivers - mt7986 wmac support on mt7915
2022-02-25sc16is7xx: Separate GPIOs from modem control linesLech Perczak1-4/+10
Export only the GPIOs that are not shared with hardware modem control lines. Introduce new device parameter indicating whether modem control lines are available. Signed-off-by: Lech Perczak <l.perczak@camlintechnologies.com> Signed-off-by: Tomasz Moń <tomasz.mon@camlingroup.com> Link: https://lore.kernel.org/r/20220221105618.3503470-4-tomasz.mon@camlingroup.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25sc16is7xx: Update status lines in single callLech Perczak1-10/+15
RTS, DTR and LOOP bits can be updated in a single MCR register update. This reduces the number of (slow) SPI/I2C bus transactions. Signed-off-by: Lech Perczak <l.perczak@camlintechnologies.com> Signed-off-by: Tomasz Moń <tomasz.mon@camlingroup.com> Link: https://lore.kernel.org/r/20220221105618.3503470-3-tomasz.mon@camlingroup.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25sc16is7xx: Preserve EFR bits on updateLech Perczak1-5/+19
Preserve unaffected bits state when accessing EFR register. This prevents hardware flow control bits from being cleared on enhanced functions access. Signed-off-by: Lech Perczak <l.perczak@camlintechnologies.com> Signed-off-by: Tomasz Moń <tomasz.mon@camlingroup.com> Link: https://lore.kernel.org/r/20220221105618.3503470-2-tomasz.mon@camlingroup.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25drm/dp: Fix OOB read when handling Post Cursor2 registerKees Cook3-13/+10
The link_status array was not large enough to read the Adjust Request Post Cursor2 register, so remove the common helper function to avoid an OOB read, found with a -Warray-bounds build: drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_get_adjust_request_post_cursor': drivers/gpu/drm/drm_dp_helper.c:59:27: error: array subscript 10 is outside array bounds of 'const u8[6]' {aka 'const unsigned char[6]'} [-Werror=array-bounds] 59 | return link_status[r - DP_LANE0_1_STATUS]; | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/drm_dp_helper.c:147:51: note: while referencing 'link_status' 147 | u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE], | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Replace the only user of the helper with an open-coded fetch and decode, similar to drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c. Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Fixes: 79465e0ffeb9 ("drm/dp: Add helper to get post-cursor adjustments") Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20220105173507.2420910-1-keescook@chromium.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-25drm/dp: Fix off-by-one in register cache sizeKees Cook1-1/+1
The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the math to calculate the max size. Found from a -Warray-bounds build: drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr': drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside array bounds of 'const u8[12]' {aka 'const unsigned char[12]'} [-Werror=array-bounds] 3130 | buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER]; | ~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/drm_dp_helper.c:3126:39: note: while referencing 'pcon_dsc_dpcd' 3126 | int drm_dp_pcon_dsc_bpp_incr(const u8 pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE]) | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Fixes: e2e16da398d9 ("drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon") Cc: stable@vger.kernel.org Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/lkml/20211214001849.GA62559@embeddedor/ Signed-off-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20220105173310.2420598-1-keescook@chromium.org Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220225035610.2552144-2-keescook@chromium.org
2022-02-25serial: 8250: Return early in .start_tx() if there are no chars to sendSteffen Trumtrar1-0/+3
Don't start the whole chain for TX if there is no data to send. This is mostly relevant for rs485 mode as there might be rts-before-send and rts-after-send delays involved. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20220217211839.443039-1-u.kleine-koenig@pengutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25MAINTAINERS: Add Pali Rohár as mvebu-uart.c maintainerPali Rohár1-0/+7
Add Pali Rohár as mvebu-uart.c maintainer Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20220222105406.28894-1-pali@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25xtensa: termbits.h is identical to asm-generic oneIlpo Järvinen1-221/+0
Remove arch specific termbits.h as there are only trivial space differences between include/uapi/asm-generic/termbits.h and arch/xtensa/include/uapi/asm/termbits.h. $ diff -u0 -b -B include/uapi/asm-generic/termbits.h arch/xtensa/include/uapi/asm/termbits.h . --- include/uapi/asm-generic/termbits.h 2022-01-10 13:44:42.814107461 +0200 . +++ arch/xtensa/include/uapi/asm/termbits.h 2022-01-10 13:44:42.690106926 +0200 . @@ -2,2 +2,15 @@ . -#ifndef __ASM_GENERIC_TERMBITS_H . -#define __ASM_GENERIC_TERMBITS_H . +/* . + * include/asm-xtensa/termbits.h . + * . + * Copied from SH. . + * . + * This file is subject to the terms and conditions of the GNU General Public . + * License. See the file "COPYING" in the main directory of this archive . + * for more details. . + * . + * Copyright (C) 2001 - 2005 Tensilica Inc. . + */ . + . +#ifndef _XTENSA_TERMBITS_H . +#define _XTENSA_TERMBITS_H . + . @@ -200 +221 @@ . -#endif /* __ASM_GENERIC_TERMBITS_H */ . +#endif /* _XTENSA_TERMBITS_H */ Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20220222115604.7351-3-ilpo.jarvinen@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25ia64: termbits.h is identical to asm-generic oneIlpo Järvinen1-209/+0
Remove arch specific termbits.h as there are only trivial space differences between include/uapi/asm-generic/termbits.h and arch/ia64/include/uapi/asm/termbits.h: $ diff -u0 -b -B include/uapi/asm-generic/termbits.h arch/ia64/include/uapi/asm/termbits.h . --- include/uapi/asm-generic/termbits.h 2022-01-10 13:44:42.814107461 +0200 . +++ arch/ia64/include/uapi/asm/termbits.h 2022-01-10 13:44:42.678106874 +0200 . @@ -2,2 +2,11 @@ . -#ifndef __ASM_GENERIC_TERMBITS_H . -#define __ASM_GENERIC_TERMBITS_H . +#ifndef _ASM_IA64_TERMBITS_H . +#define _ASM_IA64_TERMBITS_H . + . +/* . + * Based on <asm-i386/termbits.h>. . + * . + * Modified 1999 . + * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co . + * . + * 99/01/28 Added new baudrates . + */ . @@ -200 +209 @@ . -#endif /* __ASM_GENERIC_TERMBITS_H */ . +#endif /* _ASM_IA64_TERMBITS_H */ Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20220222115604.7351-2-ilpo.jarvinen@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25dt-bindings: usb: qcom,dwc3: Add msm8953 compatibleLuca Weiss1-0/+1
Document the compatible string for the DWC3 controller in msm8953. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220220201909.445468-4-luca@z3ntu.xyz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: pi433: add index value to write dev_dbg statementPaulo Miguel Almeida1-1/+1
Add index value to the string that will be printed by dev_dbg for better easier visualisation when debugging. For instance, if I have a big message payload that will inevitably get split into chunks, it would be a hassle trying to debug if the offset of the original payload that got sent at that time. This patch adds index value to write dev_dbg statement. Signed-off-by: Paulo Miguel Almeida <paulo.miguel.almeida.rodenas@gmail.com> Link: https://lore.kernel.org/r/YhiNRSi7jijxJWCL@mail.google.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: rtl8192u: rework init and exit functionTong Zhang6-17/+38
The init and exit functions are not releasing resource properly. An error can be observed when we load/unload/load r8192u_usb module due to this issue. This patch rework init and exit functions to do proper resource release on init error and module unload. The __exit attribute is stripped from some functions since they are now being used by module init functions. [ 493.068012] proc_dir_entry 'net/ieee80211' already registered [ 493.271973] proc_mkdir+0x18/0x20 [ 493.272136] ieee80211_debug_init+0x28/0xde8 [r8192u_usb] [ 493.272404] rtl8192_usb_module_init+0x10/0x161 [r8192u_usb] [ 13.910616] proc_dir_entry 'net/rtl819xU' already registered [ 13.918931] proc_mkdir+0x18/0x20 [ 13.919098] rtl8192_usb_module_init+0x142/0x16d [r8192u_usb] Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tong Zhang <ztong0001@gmail.com> Link: https://lore.kernel.org/r/20220224064033.1530924-3-ztong0001@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: rtl8192u: add empty debug functionsTong Zhang1-0/+5
Add two empty functions to handle the case when CONFIG_IEEE80211_DEBUG is turned off. These two functions will be used by module init() and and exit(). Signed-off-by: Tong Zhang <ztong0001@gmail.com> Link: https://lore.kernel.org/r/20220224064033.1530924-2-ztong0001@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: rtl8192u: fix broken debug macroTong Zhang1-2/+2
There is an extra space in the debug macro, when CONFIG_IEEE80211_DEBUG is switched off, compiler will complain. drivers/staging/rtl8192u/ieee80211/ieee80211.h:470:42: error: expected ‘)’ before ‘...’ token 470 | #define IEEE80211_DEBUG (level, fmt, args...) do {} while (0) drivers/staging/rtl8192u/ieee80211/ieee80211.h:470:47: error: expected ‘;’ before ‘do’ 470 | #define IEEE80211_DEBUG (level, fmt, args...) do {} while (0) Signed-off-by: Tong Zhang <ztong0001@gmail.com> Link: https://lore.kernel.org/r/20220224064033.1530924-1-ztong0001@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: r8188eu: remove redundant variable reg_0x143Colin Ian King1-2/+1
Variable reg_0x143 is being assigned a value, however is not being read. The variable is redundant and can be removed. Reviewed-by: Phillip Potter <phil@philpotter.co.uk> Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20220224230658.151338-1-colin.i.king@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: r8188eu: clean up rtw_rf.cMichael Straube1-5/+0
Remove unnecessary includes and the unused define _RTW_RF_C_ from rtw_rf.c. Signed-off-by: Michael Straube <straube.linux@gmail.com> Link: https://lore.kernel.org/r/20220222082847.6687-4-straube.linux@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: r8188eu: refactor rtw_ch2freq()Michael Straube1-23/+18
Convert the array ch_freq_map to a simple integer array and use the indices as channel numbers. This simplifies the code and avoids looping through the array to get the frequency. To avoid out of bounds array access return a default value for invalid channel values, like the original code did. Signed-off-by: Michael Straube <straube.linux@gmail.com> Link: https://lore.kernel.org/r/20220222082847.6687-3-straube.linux@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25staging: r8188eu: remove 5 GHz channels from ch_freq_mapMichael Straube1-16/+0
According to the Realtek documentation the chips this driver supports are 2.4 GHz only chips. Frequencies for 5 GHz channels can be removed from the ch_freq_map array. Signed-off-by: Michael Straube <straube.linux@gmail.com> Link: https://lore.kernel.org/r/20220222082847.6687-2-straube.linux@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>