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2022-01-24clk: stm32mp1: Add parent_data to ETHRX clockMarek Vasut1-4/+32
Pass parent_data to ETHRX clock with new fw_name = "ETH_RX_CLK/ETH_REF_CLK". By default, this change has no impact on the operation of the clock driver. However, due to the fw_name, it permits DT to override ETHRX clock parent, which might be needed in case the ETHRX clock are supplied by external clock source. Example of MCO2 supplying clock to ETH_RX_CLK via external pad-to-pad wire: &rcc { clocks = <&rcc CK_MCO2>; clock-names = "ETH_RX_CLK/ETH_REF_CLK"; }; Note that while this patch permits to implement this rare usecase, the issue with ethernet RX and TX input clock modeling on MP1 is far more complex and requires more core plumbing. [1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral clock distribution for Ethernet https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: linux-clk@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Link: https://lore.kernel.org/r/20220118202958.1840431-2-marex@denx.de Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clockMarek Vasut1-3/+7
The ETHCK_K are modeled as composite clock of MUX and GATE, however per STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral clock distribution for Ethernet, ETHPTPDIV divider is attached past the ETHCK_K mux, and ETH_CLK/eth_clk_fb clock are output past ETHCKEN gate. Therefore, in case ETH_CLK/eth_clk_fb are not in use AND PTP clock are in use, ETHCKEN gate can be turned off. Current driver does not permit that, fix it. This patch converts ETHCK_K from composite clock into a ETHCKEN gate, ETHPTP_K from composite clock into ETHPTPDIV divider, and adds another NO_ID clock "ck_ker_eth" which models the ETHSRC mux and is parent clock to both ETHCK_K and ETHPTP_K. Therefore, all references to ETHCK_K and ETHPTP_K remain functional as before. [1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral clock distribution for Ethernet https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: linux-clk@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Link: https://lore.kernel.org/r/20220118202958.1840431-1-marex@denx.de Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24net: use bool values to pass bool param of phy_init_eee()Jisheng Zhang7-7/+7
The 2nd param of phy_init_eee(): clk_stop_enable is a bool param, use true or false instead of 1/0. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220123152241.1480-1-jszhang@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-01-24net: fec_ptp: remove redundant initialization of variable valColin Ian King1-1/+0
Variable val is being initialized with a value that is never read, it is being re-assigned later. The assignment is redundant and can be removed. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Joakim Zhang <qiangqing.zhang@nxp.com> Link: https://lore.kernel.org/r/20220123184936.113486-1-colin.i.king@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-01-24net: usb: asix: remove redundant assignment to variable regColin Ian King1-1/+0
Variable reg is being masked however the variable is never read after this. The assignment is redundant and can be removed. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20220123184035.112785-1-colin.i.king@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-01-24clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DTTudor Ambarus2-1/+8
MCK1 feeds the External Bus Interface (EBI). EBI's clock rate is used to translate EBI's timmings to SMC timings, thus we need to handle MCK1 in the EBI driver. Allow MCK1 to be referenced as a PMC_TYPE_CORE clock from phandle in DT. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220111125310.902856-1-tudor.ambarus@microchip.com Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24clk: at91: allow setting PMC_AUDIOPINCK clock parents via DTZixun LI2-1/+4
Make AUDIOPINCK accessible via phandle to select it as peripheral clock parent using assigned-clock-parents in DT where available. Signed-off-by: Zixun LI <admin@hifiphile.com> Reviewed-by: Claudiu Beznea <Claudiu.Beznea@microchip.com> Link: https://lore.kernel.org/r/20220111142051.37957-1-admin@hifiphile.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24clk: mediatek: Fix memory leaks on probeJosé Expósito1-6/+30
Handle the error branches to free memory where required. Addresses-Coverity-ID: 1491825 ("Resource leak") Signed-off-by: José Expósito <jose.exposito89@gmail.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220115183059.GA10809@elementary Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24clk-si5341: replace snprintf in show functions with sysfs_emitQing Wang1-4/+4
coccicheck complains about the use of snprintf() in sysfs show functions. Fix the following coccicheck warning: drivers/clk/clk-si5341.c:1471: WARNING: use scnprintf or sprintf. drivers/clk/clk-si5341.c:1486: WARNING: use scnprintf or sprintf. drivers/clk/clk-si5341.c:1501: WARNING: use scnprintf or sprintf. drivers/clk/clk-si5341.c:1516: WARNING: use scnprintf or sprintf. Use sysfs_emit instead of scnprintf or sprintf makes more sense. Signed-off-by: Qing Wang <wangqing@vivo.com> Link: https://lore.kernel.org/r/1634280331-4150-1-git-send-email-wangqing@vivo.com Reviewed-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24clk: si5341: fix reported clk_rate when output divider is 2Adam Wujek1-7/+9
SI5341_OUT_CFG_RDIV_FORCE2 shall be checked first to distinguish whether a divider for a given output is set to 2 (SI5341_OUT_CFG_RDIV_FORCE2 is set) or the output is disabled (SI5341_OUT_CFG_RDIV_FORCE2 not set, SI5341_OUT_R_REG is set 0). Before the change, divider set to 2 (SI5341_OUT_R_REG set to 0) was interpreted as output is disabled. Signed-off-by: Adam Wujek <dev_public@wujek.eu> Link: https://lore.kernel.org/r/20211203141125.2447520-1-dev_public@wujek.eu Reviewed-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-25pinctrl: bcm: add driver for BCM4908 pinmuxRafał Miłecki4-0/+579
BCM4908 has its own pins layout so it needs a custom binding and a Linux driver. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220124102243.14912-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-25dt-bindings: pinctrl: Add binding for BCM4908 pinctrlRafał Miłecki2-0/+79
It's hardware block that is part of every SoC from BCM4908 family. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220124102243.14912-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-24dt-bindings: clk: microchip: Add Microchip PolarFire host bindingDaire McNamara2-0/+103
Add device tree bindings for the Microchip PolarFire system clock controller Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211216140022.16146-2-conor.dooley@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24Merge https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextJakub Kicinski128-893/+4988
Daniel Borkmann says: ==================== pull-request: bpf-next 2022-01-24 We've added 80 non-merge commits during the last 14 day(s) which contain a total of 128 files changed, 4990 insertions(+), 895 deletions(-). The main changes are: 1) Add XDP multi-buffer support and implement it for the mvneta driver, from Lorenzo Bianconi, Eelco Chaudron and Toke Høiland-Jørgensen. 2) Add unstable conntrack lookup helpers for BPF by using the BPF kfunc infra, from Kumar Kartikeya Dwivedi. 3) Extend BPF cgroup programs to export custom ret value to userspace via two helpers bpf_get_retval() and bpf_set_retval(), from YiFei Zhu. 4) Add support for AF_UNIX iterator batching, from Kuniyuki Iwashima. 5) Complete missing UAPI BPF helper description and change bpf_doc.py script to enforce consistent & complete helper documentation, from Usama Arif. 6) Deprecate libbpf's legacy BPF map definitions and streamline XDP APIs to follow tc-based APIs, from Andrii Nakryiko. 7) Support BPF_PROG_QUERY for BPF programs attached to sockmap, from Di Zhu. 8) Deprecate libbpf's bpf_map__def() API and replace users with proper getters and setters, from Christy Lee. 9) Extend libbpf's btf__add_btf() with an additional hashmap for strings to reduce overhead, from Kui-Feng Lee. 10) Fix bpftool and libbpf error handling related to libbpf's hashmap__new() utility function, from Mauricio Vásquez. 11) Add support to BTF program names in bpftool's program dump, from Raman Shukhau. 12) Fix resolve_btfids build to pick up host flags, from Connor O'Brien. * https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next: (80 commits) selftests, bpf: Do not yet switch to new libbpf XDP APIs selftests, xsk: Fix rx_full stats test bpf: Fix flexible_array.cocci warnings xdp: disable XDP_REDIRECT for xdp frags bpf: selftests: add CPUMAP/DEVMAP selftests for xdp frags bpf: selftests: introduce bpf_xdp_{load,store}_bytes selftest net: xdp: introduce bpf_xdp_pointer utility routine bpf: generalise tail call map compatibility check libbpf: Add SEC name for xdp frags programs bpf: selftests: update xdp_adjust_tail selftest to include xdp frags bpf: test_run: add xdp_shared_info pointer in bpf_test_finish signature bpf: introduce frags support to bpf_prog_test_run_xdp() bpf: move user_size out of bpf_test_init bpf: add frags support to xdp copy helpers bpf: add frags support to the bpf_xdp_adjust_tail() API bpf: introduce bpf_xdp_get_buff_len helper net: mvneta: enable jumbo frames if the loaded XDP program support frags bpf: introduce BPF_F_XDP_HAS_FRAGS flag in prog_flags loading the ebpf program net: mvneta: add frags support to XDP_TX xdp: add frags support to xdp_return_{buff/frame} ... ==================== Link: https://lore.kernel.org/r/20220124221235.18993-1-daniel@iogearbox.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-01-24ima: fix reference leak in asymmetric_verify()Eric Biggers1-6/+9
Don't leak a reference to the key if its algorithm is unknown. Fixes: 947d70597236 ("ima: Support EC keys for signature verification") Cc: <stable@vger.kernel.org> # v5.13+ Signed-off-by: Eric Biggers <ebiggers@google.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com> Signed-off-by: Mimi Zohar <zohar@linux.ibm.com>
2022-01-24hwmon: (nct6775) Fix crash in clear_caseopenGuenter Roeck1-3/+3
Paweł Marciniak reports the following crash, observed when clearing the chassis intrusion alarm. BUG: kernel NULL pointer dereference, address: 0000000000000028 PGD 0 P4D 0 Oops: 0000 [#1] PREEMPT SMP PTI CPU: 3 PID: 4815 Comm: bash Tainted: G S 5.16.2-200.fc35.x86_64 #1 Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./Z97 Extreme4, BIOS P2.60A 05/03/2018 RIP: 0010:clear_caseopen+0x5a/0x120 [nct6775] Code: 68 70 e8 e9 32 b1 e3 85 c0 0f 85 d2 00 00 00 48 83 7c 24 ... RSP: 0018:ffffabcb02803dd8 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000002 RCX: 0000000000000000 RDX: ffff8e8808192880 RSI: 0000000000000000 RDI: ffff8e87c7509a68 RBP: 0000000000000000 R08: 0000000000000001 R09: 000000000000000a R10: 000000000000000a R11: f000000000000000 R12: 000000000000001f R13: ffff8e87c7509828 R14: ffff8e87c7509a68 R15: ffff8e88494527a0 FS: 00007f4db9151740(0000) GS:ffff8e8ebfec0000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000028 CR3: 0000000166b66001 CR4: 00000000001706e0 Call Trace: <TASK> kernfs_fop_write_iter+0x11c/0x1b0 new_sync_write+0x10b/0x180 vfs_write+0x209/0x2a0 ksys_write+0x4f/0xc0 do_syscall_64+0x3b/0x90 entry_SYSCALL_64_after_hwframe+0x44/0xae The problem is that the device passed to clear_caseopen() is the hwmon device, not the platform device, and the platform data is not set in the hwmon device. Store the pointer to sio_data in struct nct6775_data and get if from there if needed. Fixes: 2e7b9886968b ("hwmon: (nct6775) Use superio_*() function pointers in sio_data.") Cc: Denis Pauk <pauk.denis@gmail.com> Cc: Bernhard Seibold <mail@bernhard-seibold.de> Reported-by: Paweł Marciniak <pmarciniak@lodz.home.pl> Tested-by: Denis Pauk <pauk.denis@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2022-01-24selftests, bpf: Do not yet switch to new libbpf XDP APIsDaniel Borkmann7-47/+50
Revert commit 544356524dd6 ("selftests/bpf: switch to new libbpf XDP APIs") for now given this will heavily conflict with 4b27480dcaa7 ("bpf/selftests: convert xdp_link test to ASSERT_* macros") upon merge. Andrii agreed to redo the conversion cleanly after trees merged. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Andrii Nakryiko <andrii@kernel.org>
2022-01-24Merge tag 'linux-can-fixes-for-5.17-20220124' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-canJakub Kicinski6-3/+11
Marc Kleine-Budde says: ==================== pull-request: can 2022-01-24 The first patch updates the email address of Brian Silverman from his former employer to his private address. The next patch fixes DT bindings information for the tcan4x5x SPI CAN driver. The following patch targets the m_can driver and fixes the introduction of FIFO bulk read support. Another patch for the tcan4x5x driver, which fixes the max register value for the regmap config. The last patch for the flexcan driver marks the RX mailbox support for the MCF5441X as support. * tag 'linux-can-fixes-for-5.17-20220124' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can: can: flexcan: mark RX via mailboxes as supported on MCF5441X can: tcan4x5x: regmap: fix max register value can: m_can: m_can_fifo_{read,write}: don't read or write from/to FIFO if length is 0 dt-bindings: can: tcan4x5x: fix mram-cfg RX FIFO config mailmap: update email address of Brian Silverman ==================== Link: https://lore.kernel.org/r/20220124175955.3464134-1-mkl@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-01-24ARM: assembler: define a Kconfig symbol for group relocation supportArd Biesheuvel5-12/+28
Nathan reports the group relocations go out of range in pathological cases such as allyesconfig kernels, which have little chance of actually booting but are still used in validation. So add a Kconfig symbol for this feature, and make it depend on !COMPILE_TEST. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-24ASoC: simple-card-utils: Add new system-clock-fixed flagRobert Hancock2-11/+61
Add a new system-clock-fixed flag, which can be used to specify that the driver cannot or should not allow the clock frequency of the mapped clock to be modified. This behavior is also implied if the system-clock-frequency parameter is set explicitly - the flag is meant for cases where a clock is mapped to the DAI but which is, or should be treated as, fixed. When mclk-fs is also specified, this causes a PCM constraint to be added which enforces that only the corresponding valid sample rate can be used. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Link: https://lore.kernel.org/r/20220120195832.1742271-7-robert.hancock@calian.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24ASoC: dt-bindings: simple-card: document new system-clock-fixed flagRobert Hancock1-0/+11
Document the new system-clock-fixed flag, which can be used to specify that the driver cannot or should not allow the clock frequency of the mapped clock to be modified. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Link: https://lore.kernel.org/r/20220120195832.1742271-6-robert.hancock@calian.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24ASoC: simple-card-utils: Set sysclk on all componentsRobert Hancock1-0/+15
If an mclk-fs value was provided in the device tree configuration, the calculated MCLK was fed into the downstream codec DAI and CPU DAI, however set_sysclk was not being called on the platform device. Some platform devices such as the Xilinx Audio Formatter need to know the MCLK as well. Call snd_soc_component_set_sysclk on each component in the stream to set the proper sysclk value in addition to the existing call of snd_soc_dai_set_sysclk on the codec DAI and CPU DAI. This may end up resulting in redundant calls if one of the snd_soc_dai_set_sysclk calls ends up calling snd_soc_component_set_sysclk itself, but that isn't expected to cause any significant harm. Fixes: f48dcbb6d47d ("ASoC: simple-card-utils: share asoc_simple_hw_param()") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20220120195832.1742271-5-robert.hancock@calian.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24ASoC: xilinx: xlnx_i2s: Handle sysclk settingRobert Hancock1-10/+81
This driver previously only handled the set_clkdiv divider callback when setting the SCLK Out Divider field in the I2S Timing Control register. However, when using the simple-audio-card driver, the set_sysclk function is called but not set_clkdiv. This caused the divider not to be set, leaving it at an invalid value of 0 and resulting in a very low SCLK output rate. Handle set_clkdiv and store the sysclk (MCLK) value for later use in hw_params to set the SCLK Out Divider such that: MCLK/SCLK = divider * 2 Signed-off-by: Robert Hancock <robert.hancock@calian.com> Link: https://lore.kernel.org/r/20220120195832.1742271-4-robert.hancock@calian.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24ASoC: xilinx: xlnx_i2s: create drvdata structureRobert Hancock1-31/+35
An upcoming change will require storing additional driver data other than the memory base address. Create a drvdata structure and use that rather than storing the raw base address pointer. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Link: https://lore.kernel.org/r/20220120195832.1742271-3-robert.hancock@calian.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24ASoC: xilinx: xlnx_formatter_pcm: Handle sysclk settingRobert Hancock1-0/+25
This driver did not set the MM2S Fs Multiplier Register to the proper value for playback streams. This needs to be set to the sample rate to MCLK multiplier, or random stream underflows can occur on the downstream I2S transmitter. Store the sysclk value provided via the set_sysclk callback and use that in conjunction with the sample rate in the hw_params callback to calculate the proper value to set for this register. Fixes: 6f6c3c36f091 ("ASoC: xlnx: add pcm formatter platform driver") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Link: https://lore.kernel.org/r/20220120195832.1742271-2-robert.hancock@calian.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24arm64: dts: ti: k3-j721s2-common-proc-board: Alias console uart to serial2Aswath Govindraju1-3/+3
On J721s2 Linux console is on main_uart8 but to be consistent with other J7 family of devices, alias it to ttyS2 (serial2). This also eliminates need to have higher number of 8250 runtime UARTs. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20211223121650.26868-3-vigneshr@ti.com
2022-01-24arm64: dts: ti: k3-j721s2: Move aliases to board dtsAswath Govindraju2-22/+10
Aliases are board specific and should be in board dts files. So, move aliases to board dts and trim the list to interfaces that are actually enabled. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20211223121650.26868-2-vigneshr@ti.com
2022-01-24ARM: mm: switch to swapper_pg_dir early for vmap'ed stackArd Biesheuvel3-1/+15
When onlining a CPU, switch to swapper_pg_dir as soon as possible so that it is guaranteed that the vmap'ed stack is mapped before it is used. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-24x86/paravirt: Use %rip-relative addressing in hook callsJan Beulich1-2/+2
While using a plain (constant) address works, its use needlessly invokes a SIB addressing mode, making every call site one byte larger than necessary: ff 14 25 98 89 42 82 call *0xffffffff82428998 Instead of using an "i" constraint with address-of operator and a 'c' operand modifier, simply use an ordinary "m" constraint, which the 64-bit compiler will translate to %rip-relative addressing: ff 15 62 fb d2 00 call *0xd2fb62(%rip) # ffffffff82428998 <pv_ops+0x18> This way the compiler is also told the truth about operand usage - the memory location gets actually read, after all. 32-bit code generation is unaffected by the change. [ bp: Remove "we", add examples. ] Signed-off-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Juergen Gross <jgross@suse.com> Link: https://lore.kernel.org/r/b8192e8a-13ef-6ac6-6364-8ba58992cd1d@suse.com
2022-01-24objtool: Fix truncated string warningSergei Trofimovich1-1/+1
On GCC 12, the build fails due to a possible truncated string: check.c: In function 'validate_call': check.c:2865:58: error: '%d' directive output may be truncated writing between 1 and 10 bytes into a region of size 9 [-Werror=format-truncation=] 2865 | snprintf(pvname, sizeof(pvname), "pv_ops[%d]", idx); | ^~ In theory it's a valid bug: static char pvname[16]; int idx; ... idx = (rel->addend / sizeof(void *)); snprintf(pvname, sizeof(pvname), "pv_ops[%d]", idx); There are only 7 chars for %d while it could take up to 9, so the printed "pv_ops[%d]" string could get truncated. In reality the bug should never happen, because pv_ops only has ~80 entries, so 7 chars for the integer is more than enough. Still, it's worth fixing. Bump the buffer size by 2 bytes to silence the warning. [ jpoimboe: changed size to 19; massaged changelog ] Fixes: db2b0c5d7b6f ("objtool: Support pv_opsindirect calls for noinstr") Reported-by: Adam Borowski <kilobyte@angband.pl> Reported-by: Martin Liška <mliska@suse.cz> Signed-off-by: Sergei Trofimovich <slyich@gmail.com> Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com> Link: https://lore.kernel.org/r/20220120233748.2062559-1-slyich@gmail.com
2022-01-24drm/i915/dg2: Add Wa_18018781329Matt Roper2-0/+10
A few more MOD registers need to be programmed on DG2. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220120234147.1200574-1-matthew.d.roper@intel.com Reviewed-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
2022-01-24can: flexcan: mark RX via mailboxes as supported on MCF5441XMarc Kleine-Budde2-1/+2
Most flexcan IP cores support 2 RX modes: - FIFO - mailbox The flexcan IP core on the MCF5441X cannot receive CAN RTR messages via mailboxes. However the mailbox mode is more performant. The commit | 1c45f5778a3b ("can: flexcan: add ethtool support to change rx-rtr setting during runtime") added support to switch from FIFO to mailbox mode on these cores. After testing the mailbox mode on the MCF5441X by Angelo Dureghello, this patch marks it (without RTR capability) as supported. Further the IP core overview table is updated, that RTR reception via mailboxes is not supported. Link: https://lore.kernel.org/all/20220121084425.3141218-1-mkl@pengutronix.de Tested-by: Angelo Dureghello <angelo@kernel-space.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-01-24can: tcan4x5x: regmap: fix max register valueMarc Kleine-Budde1-1/+1
The MRAM of the tcan4x5x has a size of 2K and starts at 0x8000. There are no further registers in the tcan4x5x making 0x87fc the biggest addressable register. This patch fixes the max register value of the regmap config from 0x8ffc to 0x87fc. Fixes: 6e1caaf8ed22 ("can: tcan4x5x: fix max register value") Link: https://lore.kernel.org/all/20220119064011.2943292-1-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-01-24can: m_can: m_can_fifo_{read,write}: don't read or write from/to FIFO if length is 0Marc Kleine-Budde1-0/+6
In order to optimize FIFO access, especially on m_can cores attached to slow busses like SPI, in patch | e39381770ec9 ("can: m_can: Disable IRQs on FIFO bus errors") bulk read/write support has been added to the m_can_fifo_{read,write} functions. That change leads to the tcan driver to call regmap_bulk_{read,write}() with a length of 0 (for CAN frames with 0 data length). regmap treats this as an error: | tcan4x5x spi1.0 tcan4x5x0: FIFO write returned -22 This patch fixes the problem by not calling the cdev->ops->{read,write)_fifo() in case of a 0 length read/write. Fixes: e39381770ec9 ("can: m_can: Disable IRQs on FIFO bus errors") Link: https://lore.kernel.org/all/20220114155751.2651888-1-mkl@pengutronix.de Cc: stable@vger.kernel.org Cc: Matt Kline <matt@bitbashing.io> Cc: Chandrasekar Ramakrishnan <rcsekar@samsung.com> Reported-by: Michael Anochin <anochin@photo-meter.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-01-24dt-bindings: can: tcan4x5x: fix mram-cfg RX FIFO configMarc Kleine-Budde1-1/+1
This tcan4x5x only comes with 2K of MRAM, a RX FIFO with a dept of 32 doesn't fit into the MRAM. Use a depth of 16 instead. Fixes: 4edd396a1911 ("dt-bindings: can: tcan4x5x: Add DT bindings for TCAN4x5X driver") Link: https://lore.kernel.org/all/20220119062951.2939851-1-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-01-24mailmap: update email address of Brian SilvermanMarc Kleine-Budde1-0/+1
Brian Silverman's address at bluerivertech.com is not valid anymore, use Brian's private email address instead. Link: https://lore.kernel.org/all/20220110082359.2019735-1-mkl@pengutronix.de Cc: Brian Silverman <bsilver16384@gmail.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-01-24btrfs: update writeback index when starting defragFilipe Manana1-0/+9
When starting a defrag, we should update the writeback index of the inode's mapping in case it currently has a value beyond the start of the range we are defragging. This can help performance and often result in getting less extents after writeback - for e.g., if the current value of the writeback index sits somewhere in the middle of a range that gets dirty by the defrag, then after writeback we can get two smaller extents instead of a single, larger extent. We used to have this before the refactoring in 5.16, but it was removed without any reason to do so. Originally it was added in kernel 3.1, by commit 2a0f7f5769992b ("Btrfs: fix recursive auto-defrag"), in order to fix a loop with autodefrag resulting in dirtying and writing pages over and over, but some testing on current code did not show that happening, at least with the test described in that commit. So add back the behaviour, as at the very least it is a nice to have optimization. Fixes: 7b508037d4cac3 ("btrfs: defrag: use defrag_one_cluster() to implement btrfs_defrag_file()") CC: stable@vger.kernel.org # 5.16 Signed-off-by: Filipe Manana <fdmanana@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2022-01-24arm64: dts: mediatek: Correct system timer clock of MT8192Allen-KH Cheng1-1/+1
When the initial devicetree for mt8192 was added in 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the clock driver for mt8192 was not yet upstream, so the clock property nodes were set to the clk26m clock as a placeholder. Given that the clock driver has since been added through 710573dee31b ("clk: mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings through f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and devicetree nodes through 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers"), fix the systimer clock property to point to the actual clock. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113065822.11809-6-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24arm64: dts: mediatek: Correct I2C clock of MT8192Allen-KH Cheng1-10/+20
When the initial devicetree for mt8192 was added in 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the clock driver for mt8192 was not yet upstream, so the clock property nodes were set to the clk26m clock as a placeholder. Given that the clock driver has since been added through 710573dee31b ("clk: mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings through f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and devicetree nodes through 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers"), fix the I2C clock property to point to the actual clock. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113065822.11809-5-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24arm64: dts: mediatek: Correct Nor Flash clock of MT8192Allen-KH Cheng1-3/+5
When the initial devicetree for mt8192 was added in 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the clock driver for mt8192 was not yet upstream, so the clock property nodes were set to the clk26m clock as a placeholder. Given that the clock driver has since been added through 710573dee31b ("clk: mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings through f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and devicetree nodes through 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers"), fix the Nor Flash clock property to point to the actual clock. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113065822.11809-4-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24arm64: dts: mediatek: Correct SPI clock of MT8192Allen-KH Cheng1-24/+24
When the initial devicetree for mt8192 was added in 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the clock driver for mt8192 was not yet upstream, so the clock property nodes were set to the clk26m clock as a placeholder. Given that the clock driver has since been added through 710573dee31b ("clk: mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings through f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and devicetree nodes through 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers"), fix the SPI clock property to point to the actual clock. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113065822.11809-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24arm64: dts: mediatek: Correct uart clock of MT8192Allen-KH Cheng1-2/+2
When the initial devicetree for mt8192 was added in 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the clock driver for mt8192 was not yet upstream, so the clock property nodes were set to the clk26m clock as a placeholder. Given that the clock driver has since been added through 710573dee31b ("clk: mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings through f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and devicetree nodes through 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers"), fix the uart clock property to point to the actual clock. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113065822.11809-2-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24btrfs: add back missing dirty page rate limiting to defragFilipe Manana1-0/+5
A defrag operation can dirty a lot of pages, specially if operating on the entire file or a large file range. Any task dirtying pages should periodically call balance_dirty_pages_ratelimited(), as stated in that function's comments, otherwise they can leave too many dirty pages in the system. This is what we did before the refactoring in 5.16, and it should have remained, just like in the buffered write path and relocation. So restore that behaviour. Fixes: 7b508037d4cac3 ("btrfs: defrag: use defrag_one_cluster() to implement btrfs_defrag_file()") CC: stable@vger.kernel.org # 5.16 Reviewed-by: Qu Wenruo <wqu@suse.com> Signed-off-by: Filipe Manana <fdmanana@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2022-01-24btrfs: fix deadlock when reserving space during defragFilipe Manana1-1/+30
When defragging we can end up collecting a range for defrag that has already pages under delalloc (dirty), as long as the respective extent map for their range is not mapped to a hole, a prealloc extent or the extent map is from an old generation. Most of the time that is harmless from a functional perspective at least, however it can result in a deadlock: 1) At defrag_collect_targets() we find an extent map that meets all requirements but there's delalloc for the range it covers, and we add its range to list of ranges to defrag; 2) The defrag_collect_targets() function is called at defrag_one_range(), after it locked a range that overlaps the range of the extent map; 3) At defrag_one_range(), while the range is still locked, we call defrag_one_locked_target() for the range associated to the extent map we collected at step 1); 4) Then finally at defrag_one_locked_target() we do a call to btrfs_delalloc_reserve_space(), which will reserve data and metadata space. If the space reservations can not be satisfied right away, the flusher might be kicked in and start flushing delalloc and wait for the respective ordered extents to complete. If this happens we will deadlock, because both flushing delalloc and finishing an ordered extent, requires locking the range in the inode's io tree, which was already locked at defrag_collect_targets(). So fix this by skipping extent maps for which there's already delalloc. Fixes: eb793cf857828d ("btrfs: defrag: introduce helper to collect target file extents") CC: stable@vger.kernel.org # 5.16 Reviewed-by: Qu Wenruo <wqu@suse.com> Signed-off-by: Filipe Manana <fdmanana@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2022-01-24dt-bindings: arm: airoha: Add binding for EN7523 SoC and EVBJohn Crispin1-0/+28
Add devicetree binding for Airoha EN7523 SoC and evaluation board. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Felix Fietkau <nbd@nbd.name> Link: https://lore.kernel.org/r/20211220211854.89452-3-nbd@nbd.name Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24dt-bindings: Add vendor prefix for AirohaJohn Crispin1-0/+2
Add vendor prefix "airoha" for Airoha, a subsidiary of MediaTek Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Felix Fietkau <nbd@nbd.name> Link: https://lore.kernel.org/r/20211220211854.89452-2-nbd@nbd.name Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24dt-bindings: mediatek: Adds a DT binding documentation for the MT6582 SoCMaxim Kutnij3-0/+6
This adds a DT binding documentation for the MT6582 SoC. Signed-off-by: Maxim Kutnij <gtk3@inbox.ru> Link: https://lore.kernel.org/r/20211219183134.3849-3-gtk3@inbox.ru [mb: fix commit subject line and compatible order] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24ARM: dts: Add initial support for Prestigio PMT5008 3G tabletMaxim Kutnij1-0/+43
Add initial support for Prestigio PMT5008 3G tablet Signed-off-by: Maxim Kutnij <gtk3@inbox.ru> Link: https://lore.kernel.org/r/20211219183134.3849-2-gtk3@inbox.ru [mb: fix commit subject line] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24ARM: dts: Add initial support for Mediatek mt6582Maxim Kutnij1-0/+128
Add initial support for Mediatek mt6582 and Prestigio PMT5008 3G tablet, 4 uart, wdt work, init loads successfully. SMP doesn't work. Signed-off-by: Maxim Kutnij <gtk3@inbox.ru> Link: https://lore.kernel.org/r/20211219183134.3849-1-gtk3@inbox.ru [mb: fix commit subject line] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-01-24arm64: defconfig: Enable cpufreq for MediaTekNícolas F. R. A. Prado1-0/+1
The MediaTek CPUFreq driver provides control of CPU frequency/voltage on MediaTek SoCs. Since there's no device-tree node to bind it to, the driver needs to be enabled built-in. Enable it so. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20211217154452.868419-1-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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