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2021-12-17dt-bindings: mailbox: tegra: Document Tegra234 HSPThierry Reding1-0/+3
Add the compatible string for the HSP block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mailbox: tegra: Convert to json-schemaThierry Reding2-72/+111
Convert the NVIDIA Tegra HSP bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mmc: tegra: Convert to json-schemaThierry Reding2-143/+311
Convert the NVIDIA Tegra SDHCI bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17ARM: tegra: Add host1x hotflush reset on Tegra124Thierry Reding1-2/+2
Add the host1x memory client hotflush reset on Tegra124. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17ARM: tegra: Add memory client hotflush resets on Tegra114Thierry Reding1-6/+6
Add the host1x, gr2d and gr3d memory client hotflush resets on Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17KVM: s390: Clarify SIGP orders versus STOP/RESTARTEric Farman4-2/+43
With KVM_CAP_S390_USER_SIGP, there are only five Signal Processor orders (CONDITIONAL EMERGENCY SIGNAL, EMERGENCY SIGNAL, EXTERNAL CALL, SENSE, and SENSE RUNNING STATUS) which are intended for frequent use and thus are processed in-kernel. The remainder are sent to userspace with the KVM_CAP_S390_USER_SIGP capability. Of those, three orders (RESTART, STOP, and STOP AND STORE STATUS) have the potential to inject work back into the kernel, and thus are asynchronous. Let's look for those pending IRQs when processing one of the in-kernel SIGP orders, and return BUSY (CC2) if one is in process. This is in agreement with the Principles of Operation, which states that only one order can be "active" on a CPU at a time. Cc: stable@vger.kernel.org Suggested-by: David Hildenbrand <david@redhat.com> Signed-off-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com> Acked-by: David Hildenbrand <david@redhat.com> Link: https://lore.kernel.org/r/20211213210550.856213-2-farman@linux.ibm.com [borntraeger@linux.ibm.com: add stable tag] Signed-off-by: Christian Borntraeger <borntraeger@linux.ibm.com>
2021-12-17s390: uv: Add offset comments to UV query struct and fix namingJanosch Frank1-17/+17
Changes to the struct are easier to manage with offset comments so let's add some. And now that we know that the last struct member has the wrong name let's also fix this. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2021-12-17KVM: s390: gaccess: Cleanup access to guest pagesJanis Schoetterl-Glausch1-8/+16
Introduce a helper function for guest frame access. Signed-off-by: Janis Schoetterl-Glausch <scgl@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20211126164549.7046-4-scgl@linux.ibm.com> Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
2021-12-17KVM: s390: gaccess: Refactor access address range checkJanis Schoetterl-Glausch1-53/+69
Do not round down the first address to the page boundary, just translate it normally, which gives the value we care about in the first place. Given this, translating a single address is just the special case of translating a range spanning a single page. Make the output optional, so the function can be used to just check a range. Signed-off-by: Janis Schoetterl-Glausch <scgl@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20211126164549.7046-3-scgl@linux.ibm.com> Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
2021-12-17KVM: s390: gaccess: Refactor gpa and length calculationJanis Schoetterl-Glausch1-15/+17
Improve readability by renaming the length variable and not calculating the offset manually. Signed-off-by: Janis Schoetterl-Glausch <scgl@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20211126164549.7046-2-scgl@linux.ibm.com> Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
2021-12-17asm-generic/error-injection.h: fix a spelling mistake, and a coding style issueWasin Thonkaew1-2/+2
Fix a spelling mistake "ganerating" -> "generating". Remove trailing semicolon for a macro ALLOW_ERROR_INJECTION to fix a coding style issue. Signed-off-by: Wasin Thonkaew <wasin@wasin.io> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17arch: Remove leftovers from prism54 wireless driverAlexandre Ghiti5-5/+0
This driver was removed so remove all references to it. Fixes: d249ff28b1d8 ("intersil: remove obsolete prism54 wireless driver") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17arch: Remove leftovers from mandatory file lockingAlexandre Ghiti3-3/+0
This config was removed so remove all references to it. Fixes: f7e33bdbd6d1 ("fs: remove mandatory file locking support") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Reviewed-by: Jeff Layton <jlayton@kernel.org> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17Documentation, arch: Remove leftovers from CIFS_WEAK_PW_HASHAlexandre Ghiti14-17/+3
This config was removed so remove all references to it. Fixes: 76a3c92ec9e0 ("cifs: remove support for NTLM and weaker authentication algorithms") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Reviewed-by: Steve French <smfrench@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> [arch/arm/configs] Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17Documentation, arch: Remove leftovers from raw deviceAlexandre Ghiti5-11/+1
Raw device interface was removed so remove all references to configs related to it. Fixes: 603e4922f1c8 ("remove the raw driver") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Acked-by: Arnd Bergmann <arnd@arndb.de> [arch/arm/configs] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17ARM: dts: Fix timer regression for beagleboard revision cTony Lindgren5-34/+52
Commit e428e250fde6 ("ARM: dts: Configure system timers for omap3") caused a timer regression for beagleboard revision c where the system clockevent stops working if omap3isp module is unloaded. Turns out we still have beagleboard revisions a-b4 capacitor c70 quirks applied that limit the usable timers for no good reason. This also affects the power management as we use the system clock instead of the 32k clock source. Let's fix the issue by adding a new omap3-beagle-ab4.dts for the old timer quirks. This allows us to remove the timer quirks for later beagleboard revisions. We also need to update the related timer quirk check for the correct compatible property. Fixes: e428e250fde6 ("ARM: dts: Configure system timers for omap3") Cc: linux-kernel@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <robh+dt@kernel.org> Reported-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Tested-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-17ARM: dts: am335x-wega: Fix typo in mcasp property rx-num-evtJayesh Choudhary1-1/+1
Fix the property name 'rx-num-evt'. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-17ARM: OMAP2+: adjust the location of put_device() call in omapdss_init_ofYe Guojin1-1/+1
This was found by coccicheck: ./arch/arm/mach-omap2/display.c, 272, 1-7, ERROR missing put_device; call of_find_device_by_node on line 258, but without a corresponding object release within this function. Move the put_device() call before the if judgment. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Ye Guojin <ye.guojin@zte.com.cn> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-17ARM: OMAP2+: hwmod: Add of_node_put() before breakWan Jiabing1-1/+3
Fix following coccicheck warning: ./arch/arm/mach-omap2/omap_hwmod.c:753:1-23: WARNING: Function for_each_matching_node should have of_node_put() before break Early exits from for_each_matching_node should decrement the node reference counter. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-17ARM: 9169/1: entry: fix Thumb2 bug in iWMMXt exception handlingArd Biesheuvel1-5/+3
The Thumb2 version of the FP exception handling entry code treats the register holding the CP number (R8) differently, resulting in the iWMMXT CP number check to be incorrect. Fix this by unifying the ARM and Thumb2 code paths, and switch the order of the additions of the TI_USED_CP offset and the shifted CP index. Cc: <stable@vger.kernel.org> Fixes: b86040a59feb ("Thumb-2: Implementation of the unified start-up and exceptions code") Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9160/1: NOMMU: Reload __secondary_data after PROCINFO_INITFUNCVladimir Murzin1-0/+1
__secondary_data used to reside in r7 around call to PROCINFO_INITFUNC. After commit 95731b8ee63e ("ARM: 9059/1: cache-v7: get rid of mini-stack") r7 is used as a scratch register, so we have to reload __secondary_data before we setup the stack pointer. Fixes: 95731b8ee63e ("ARM: 9059/1: cache-v7: get rid of mini-stack") Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17Merge tag 'arm-irq-and-vmap-stacks-for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux into devel-stableRussell King (Oracle)58-732/+1216
ARM: support for IRQ and vmap'ed stacks This PR covers all the work related to implementing IRQ stacks and vmap'ed stacks for all 32-bit ARM systems that are currently supported by the Linux kernel, including RiscPC and Footbridge. It has been submitted for review in three different waves: - IRQ stacks support for v7 SMP systems [0], - vmap'ed stacks support for v7 SMP systems[1], - extending support for both IRQ stacks and vmap'ed stacks for all remaining configurations, including v6/v7 SMP multiplatform kernels and uniprocessor configurations including v7-M [2] [0] https://lore.kernel.org/linux-arm-kernel/20211115084732.3704393-1-ardb@kernel.org/ [1] https://lore.kernel.org/linux-arm-kernel/20211122092816.2865873-1-ardb@kernel.org/ [2] https://lore.kernel.org/linux-arm-kernel/20211206164659.1495084-1-ardb@kernel.org/
2021-12-17ARM: reduce the information printed in call tracesRussell King2-3/+16
A while back, Linus complained about the numeric values printed by the ARM backtracing code. Printing these values does not make sense if one does not have access to the kernel ELF image (as is normally the case when helping a third party on a mailing list), but if one does, they can be very useful to find the code, rather than searching for the function name, and then doing hex math to work out where the backtrace entry is referring to. Provide an option to control whether this information is included, which will only be visible if EXPERT is enabled. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9168/1: Add support for Cortex-M55 processorTigran Tadevosyan1-0/+10
Add processor info object for ARM Cortex-M55 CPU which inherits the setup procedure, the processor and cache operation function from Cortex-M7 processor info object. Signed-off-by: Tigran Tadevosyan <tigran.tadevosyan@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9167/1: Add support for Cortex-M33 processorVladimir Murzin1-0/+10
Cortex-M33 is the first feature rich implementation of the Armv8-M architecture (still compatible with v7M) Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9166/1: Support KFENCE for ARMWang Kefeng3-2/+61
Add architecture specific implementation details for KFENCE and enable KFENCE on ARM. In particular, this implements the required interface in <asm/kfence.h>. KFENCE requires that attributes for pages from its memory pool can individually be set. Therefore, force the kfence pool to be mapped at page granularity. Testing this patch using the testcases in kfence_test.c and all passed with or without ARM_LPAE. Acked-by: Marco Elver <elver@google.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9165/1: mm: Provide is_write_fault()Wang Kefeng1-1/+6
The function will check whether the fault is caused by a write access, it will be called in die_kernel_fault() too in next patch, so put it before the function of die_kernel_fault(). Acked-by: Marco Elver <elver@google.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9164/1: mm: Provide set_memory_valid()Wang Kefeng2-10/+33
This function validates and invalidates PTE entries, it will be used in the later patch. Acked-by: Marco Elver <elver@google.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9163/1: amba: Move of_amba_device_decode_irq() into amba_probe()Wang Kefeng1-26/+26
Similar to other resources the AMBA bus "gets" for the device, move irq obtain from amba_device_add() to amba_probe(). Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9162/1: amba: Kill sysfs attribute file of irqWang Kefeng1-17/+2
As Rob said[1], there doesn't seem to be any users about the sysfs attribute file of irq[0] and irq[1]. And we don't need to include <asm/irq.h> as NO_IRQ has gone. Let's kill both of them. [1] https://lkml.org/lkml/2021/8/25/461 Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9161/1: mm: mark private VM_FAULT_X defines as vm_fault_tWang Kefeng1-2/+2
This fixes several sparse warnings for fault.c: arch/arm/mm/fault.c:210:24: sparse: expected restricted vm_fault_t arch/arm/mm/fault.c:210:24: sparse: got int ... arch/arm/mm/fault.c:345:24: sparse: sparse: restricted vm_fault_t degrades to integer Reported-by: kernel test robot <lkp@intel.com> Fixes: caed89dab0ca ("ARM: 9128/1: mm: Refactor the __do_page_fault()") Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9159/1: decompressor: Avoid UNPREDICTABLE NOP encodingAndre Przywara2-9/+16
In the decompressor's head.S we need to start with an instruction that is some kind of NOP, but also mimics as the PE/COFF header, when the kernel is linked as an UEFI application. The clever solution here is "tstne r0, #0x4d000", which in the worst case just clobbers the condition flags, and bears the magic "MZ" signature in the lowest 16 bits. However the encoding used (0x13105a4d) is actually not valid, since bits [15:12] are supposed to be 0 (written as "(0)" in the ARM ARM). Violating this is UNPREDICTABLE, and *can* trigger an UNDEFINED exception. Common Cortex cores seem to ignore those bits, but QEMU chooses to trap, so the code goes fishing because of a missing exception handler at this point. We are just saved by the fact that commonly (with -kernel or when running from U-Boot) the "Z" bit is set, so the instruction is never executed. See [0] for more details. To make things more robust and avoid UNPREDICTABLE behaviour in the kernel code, lets replace this with a "two-instruction NOP": The first instruction is an exclusive OR, the effect of which the second instruction reverts. This does not leave any trace, neither in a register nor in the condition flags. Also it's a perfectly valid encoding. Kudos to Peter Maydell for coming up with this gem. [0] https://lore.kernel.org/qemu-devel/YTPIdbUCmwagL5%2FD@os.inf.tu-dresden.de/T/ Link: https://lore.kernel.org/linux-arm-kernel/20210908162617.104962-1-andre.przywara@arm.com/T/ Fixes: 81a0bc39ea19 ("ARM: add UEFI stub support") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Adam Lackorzynski <adam@l4re.org> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9158/1: leave it to core code to manage thread_info::cpuArd Biesheuvel3-18/+1
Since commit bcf9033e5449 ("sched: move CPU field back into thread_info if THREAD_INFO_IN_TASK=y"), the CPU field in thread_info went back to being managed by the core code, so we no longer have to keep it in sync in arch code. While at it, mark THREAD_INFO_IN_TASK as done for ARM in the documentation. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9154/1: decompressor: do not copy source files while buildingMasahiro Yamada8-36/+17
As commit 7ae4a78daacf ("ARM: 8969/1: decompressor: simplify libfdt builds") stated, copying source files during the build time may not end up with as clean code as expected. Do similar for the other library files for further cleanups of the Makefile and .gitignore. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17Merge tag 'intel-gpio-v5.17-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-nextBartosz Golaszewski6-84/+75
intel-gpio for v5.17-1 - Don't set type for IRQ already in use in case of ACPI - Drop unused call from GPIO ACPI library - Clean up ML IOH and PCH GPIO drivers to make it closer to each other - Clarify use of register file version in DesignWare driver - other minor tweaks
2021-12-17gpiolib: allow line names from device props to override driver namesPeter Rosin1-5/+15
Some GPIO providers set names for GPIO lines that match the names of the pins on the SoC, or variations on that theme. These names are generic more often that not, such as pioC12 in the at91 case. These generic names block the possibility to set more useful GPIO line names with device properties (i.e. gpio-line-names). Allow overriding a generic name given by the GPIO driver if there is a name given to the GPIO line using device properties, but leave the generic name alone if no better name is available. However, there is a risk. If user space is depending on the above mentioned fixed GPIO names, AND there are device properties that previously did not reach the surface, the name change might cause regressions. But hopefully this stays below the radar... Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Alexander Dahl <ada@thorsis.com> Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17selftests: gpio: gpio-sim: avoid forking test twiceBartosz Golaszewski1-1/+1
Use '-o' within [] in order to avoid spawning two processes for test. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-12-17selftests: gpio: gpio-sim: remove bashismsBartosz Golaszewski1-2/+2
'==' is a bashisms and not understood by POSIX shell. Drop it from gpio-sim selftests. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17gpio: amdpt: add new device ID and 24-pin supportHsu Yuchang1-3/+5
Add an ACPI HID(AMDIF031) and pin number in the pt_gpio_acpi_match. Signed-off-by: Yuchang Hsu <Richard_Hsu@asmedia.com.tw> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17gpio: tegra186: Add support for Tegra234Prathamesh Shete1-0/+76
Extend the existing Tegra186 GPIO controller driver with support for the GPIO controller found on Tegra234. While the programming model remains the same, the number of pins has slightly changed. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: Add Tegra234 supportPrathamesh Shete2-0/+67
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra234. The number of pins is slightly different, but the programming model remains the same. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [treding@nvidia.com: update device tree bindings] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: tegra186: Convert to json-schemaThierry Reding2-165/+210
Convert the Tegra186 GPIO controller device tree bindings from free-form text format to json-schema. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: tegra: Convert to json-schemaThierry Reding2-40/+110
Convert the NVIDIA Tegra GPIO controller device tree bindings from free-form text format to json-schema. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17gpio: sta2x11: fix typo in a commentJason Wang1-1/+1
The double `all' in the comment in line 327 is repeated. Remove one of them from the comment. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17selftests: gpio: add test cases for gpio-simBartosz Golaszewski3-1/+398
Add a set of tests for the new gpio-sim module. This is a pure shell test-suite and uses the helper programs available in the gpio selftests directory. These test-cases only test the functionalities exposed by the gpio-sim driver, not those handled by core gpiolib code. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17selftests: gpio: add a helper for reading GPIO line namesBartosz Golaszewski3-1/+57
Add a simple program that allows to read GPIO line names from the character device. This will be used in gpio-sim selftests. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17selftests: gpio: provide a helper for reading chip infoBartosz Golaszewski3-1/+59
Add a simple program that allows to retrieve chip properties from the GPIO character device. This will be used in gpio-sim selftests. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17gpio: sim: new testing moduleBartosz Golaszewski4-0/+1732
Implement a new, modern GPIO testing module controlled by configfs attributes instead of module parameters. The goal of this driver is to provide a replacement for gpio-mockup that will be easily extensible with new features and doesn't require reloading the module to change the setup. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-17gpiolib: of: make fwnode take precedence in struct gpio_chipBartosz Golaszewski1-0/+3
If the driver sets the fwnode in struct gpio_chip, let it take precedence over the of_node. This only affects OF-based systems, ACPI needs to be converted separately. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-17gpiolib: allow to specify the firmware node in struct gpio_chipBartosz Golaszewski2-1/+8
Software nodes allow us to represent hierarchies for device components that don't have their struct device representation yet - for instance: banks of GPIOs under a common GPIO expander. The core gpiolib core however doesn't offer any way of passing this information from the drivers. This extends struct gpio_chip with a pointer to fwnode that can be set by the driver and used to pass device properties for child nodes. This is similar to how we handle device-tree sub-nodes with CONFIG_OF_GPIO enabled. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>