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2022-09-19arm64: dts: renesas: Adjust whitespace around '{'Lad Prabhakar3-3/+3
Drop extra space around the '{' sign. No functional changes (same DTB). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220916100251.20329-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-19arm64: dts: renesas: rzg2ul-smarc: Include SoM DTSI into board DTSLad Prabhakar2-11/+12
Move including the rzg2ul-smarc-som.dtsi from the carrier board rzg2ul-smarc.dtsi to the actual RZ/G2UL SMARC EVK board dts r9a07g043u11-smarc.dts. Also move the SW_SW0_DEV_SEL and SW_ET0_EN_N macros to board dts as they are used by SoM and carrier board DTS/I. This is in preparation of re-using the SoM and carrier board DTSIs for RZ/Five SMARC EVK. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220915165256.352843-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-19arm64: dts: renesas: rzg2ul-smarc-som: Drop enabling wdt2Lad Prabhakar1-5/+0
WDT CH2 is specifically to check the operation of Cortex-M33 CPU so don't enable WDT2 by default. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220914134211.199631-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-19ARM: dts: renesas: Fix USB PHY device and child node namesGeert Uytterhoeven8-25/+25
make dtbs_check: usb-phy@e6590100: '#phy-cells' is a required property From schema: dtschema/schemas/phy/phy-provider.yaml The R-Car Gen2 USB PHY device nodes do not represent USB PHYs theirselves, and thus do not have "#phy-cells" properties. Fix the warning by renaming them from "usb-phy" to "usb-phy-controller". Rename their child nodes from "usb-channel" to "usb-phy", as these do represent USB PHYs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/6442b4042e26537abc8632c4772f8201685f1f1f.1663165098.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible valuesGeert Uytterhoeven1-5/+5
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence update the compatible properties in various device nodes to include family-specific compatible values for R-Car Gen4 instead of R-Car Gen3: - CMT, - SDHI. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/f14fde21270bf8269a61a75fc6e50af2765f2a42.1663164707.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk-cpu: Add missing bootargsKuninori Morimoto1-0/+1
This patch adds missing bootargs for R-Car V4H White Hawk board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87k06858oe.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-19arm64: dts: renesas: spider-cpu: Add missing bootargsKuninori Morimoto1-0/+1
This patch adds missing bootargs for R-Car S4 Spider board. One note is that current Spider board doesn't have Ethernet support yet, but this patch adds standard settings for it, too. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87leqo58ox.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-19arm64: dts: renesas: spider: Move aliases and chosenGeert Uytterhoeven2-9/+9
The serial console and serial debug ports on Spider are located on the CPU board. Hence move the aliases and chosen nodes containing serial port configuration from the main Spider DTS file to the DTS file that describes the CPU board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/c03500bb10eae10caeb3f4f97bc979eeee6cce75.1663167551.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk-cpu: Add Ethernet supportGeert Uytterhoeven1-0/+37
Describe the wiring of the first Ethernet AVB instance to the Micrel KSZ9031RNXVB PHY. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/50a31bc8267ab4c90bff27ef3aca1169f8ebc7ae.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk: Move aliases and chosenGeert Uytterhoeven2-8/+8
The serial console port on White Hawk is located on the CPU board. Hence move the aliases and chosen nodes containing serial console configuration from the main White Hawk DTS file to the DTS file that describes the CPU board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b03b74f4b5ee3c3e828e753beb334ec43162c132.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: r8a779g0: Add RAVB nodesGeert Uytterhoeven1-0/+141
Add device nodes for the Renesas Ethernet AVB (EtherAVB-IF) blocks on the Renesas R-Car V4H (R8A779G0) SoC. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/980e7a62d8dc3a1e2387a2d93a6296625b105506.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk-cpu: Add push switchesGeert Uytterhoeven1-0/+37
Describe the three Push Switches on the White Hawk CPU board, so they can be used for user input. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/e18d0d5087a514db611295f5d1e13c950cf7dae7.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk-cpu: Add GP LEDsGeert Uytterhoeven1-0/+28
Describe the three General Purpose LEDs on the White Hawk CPU board, so they can be used as indicator LEDs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/007acd941ef925057f1f9b925ed4e339dbd29a74.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: r8a779g0: Add GPIO nodesGeert Uytterhoeven1-0/+135
Add device nodes for the General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/81176a5e12a5828cdcdd4b107d0b2e5970232c31.1662715538.git.geert+renesas@glider.be
2022-09-19dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindingsAnjelique Melendez1-0/+4
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include compatible strings for PM7250B and PM8450 PMICs. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220912210624.4527-5-quic_amelende@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-19pinctrl: qcom: spmi-gpio: Add compatible for PM7250BJishnu Prakash1-0/+1
Add support for qcom,pm7250b-gpio variant. Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com> Signed-off-by: David Collins <quic_collinsd@quicinc.com> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220912210624.4527-4-quic_amelende@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-19pinctrl: qcom: spmi-gpio: Fix the GPIO strength mappingAnjelique Melendez1-2/+25
The SPMI based PMICs have the HIGH and LOW GPIO output strength mappings interchanged, fix them. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Link: https://lore.kernel.org/r/20220912210624.4527-3-quic_amelende@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-19pinctrl: qcom: spmi-gpio: add support for LV_VIN2 and MV_VIN3 subtypesDavid Collins1-0/+13
Add support for SPMI PMIC GPIO subtypes GPIO_LV_VIN2 and GPIO_MV_VIN3. GPIO_LV_VIN2 GPIOs support two input reference voltages: VIN0 and VIN1. These are typically connected to 1.8 V and 1.2 V supplies respectively. GPIO_MV_VIN3 GPIOs support three input reference voltages: VIN0, VIN1, and VIN2. These are typically connected to Vph, 1.8 V, and 1.2 V supplies respectively. Signed-off-by: David Collins <quic_collinsd@quicinc.com> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Link: https://lore.kernel.org/r/20220912210624.4527-2-quic_amelende@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-19platform/x86/amd: pmc: Add sysfs files for SMUMario Limonciello2-0/+52
The CPU/APU SMU FW version and program is currently discoverable by turning on dynamic debugging or examining debugfs for the amdgpu driver. To make this more discoverable, create a dedicated sysfs file for it that userspace can parse without debugging enabled. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20220914141850.259-1-mario.limonciello@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-09-19platform/x86: hp-wmi: Setting thermal profile fails with 0x06Jorge Lopez1-1/+10
Error 0x06 (invalid command parameter) is reported by hp-wmi module when reading the current thermal profile and then proceed to set it back. The failing condition occurs in Linux NixOS after user configures the thermal profile to ‘quiet mode’ in Windows. Quiet Fan Mode is supported in Windows but was not supported in hp-wmi module. This fix adds support for PLATFORM_PROFILE_QUIET in hp-wmi module for HP notebooks other than HP Omen series. Quiet thermal profile is not supported in HP Omen series notebooks. Signed-off-by: Jorge Lopez <jorge.lopez2@hp.com> Link: https://lore.kernel.org/r/20220912192603.4001-1-jorge.lopez2@hp.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-09-19wifi: rtw89: uninitialized variable on error in rtw89_early_fw_feature_recognize()Dan Carpenter1-1/+1
If request_partial_firmware_into_buf() fails then "firmware" is not initialized and the release_firmware(firmware) will crash. Fixes: deebea35d699 ("wifi: rtw89: early recognize FW feature to decide if chanctx") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/YyMzDtX/3fUBnonC@kili
2022-09-19wifi: rt2x00: Fix "Error - Attempt to send packet over invalid queue 2"Hans de Goede1-1/+4
Even though ieee80211_hw.queues is set to 2, the ralink rt2x00 driver is seeing tx skbs submitted to it with the queue-id set to 2 / set to IEEE80211_AC_BE on a rt2500 card when associating with an access-point. This causes rt2x00queue_get_tx_queue() to return NULL and the following error to be logged: "ieee80211 phy0: rt2x00mac_tx: Error - Attempt to send packet over invalid queue 2", after which association with the AP fails. This patch works around this by mapping QID_AC_BE and QID_AC_BK to QID_AC_VI when there are only 2 tx_queues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Stanislaw Gruszka <stf_xl@wp.pl> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220908173618.155291-2-hdegoede@redhat.com
2022-09-19clk: imx93: add SAI IPG clkPeng Fan1-3/+9
The clk topology is as below: bus_aon_root------>\ /--->SAI IPG -->SAI LPCG gate--> sai[x]_clk_root--->/ \--->SAI MCLK So use shared count as i.MX93 MU_B gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-9-peng.fan@oss.nxp.com
2022-09-19clk: imx93: add MU1/2 clockPeng Fan1-2/+6
The clk tree should be as: bus_aon_root------>\ /--->MU1_B IP -->MU_B gate--> bus_wakeup_root--->/ \--->MU2_B IP bus_aon_root------>\ /--->MU1_A IP -->MU_A gate--> bus_wakeup_root--->/ \--->MU2_A IP So need use shared count gate. And linux use MU_B, so set MU_A clk as CLK_IGNORE_UNUSED. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-8-peng.fan@oss.nxp.com
2022-09-19clk: imx93: switch to use new clk gate APIPeng Fan1-4/+4
Use i.MX93 specific clk gate API Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-7-peng.fan@oss.nxp.com
2022-09-19clk: imx: add i.MX93 clk gatePeng Fan3-0/+204
i.MX93 LPCG is different from i.MX8M CCGR. Although imx_clk_hw_gate4_flags is used here, it not strictly match i.MX93. i.MX93 has such design: - LPCG_DIRECT use BIT0 as on/off gate when LPCG_AUTHEN CPU_LPM is 0 - LPCG_LPM_CUR use BIT[2:0] as on/off gate when LPCG_AUTHEN CPU_LPM is 1 The current implementation suppose CPU_LPM is 0, and use LPCG_DIRECT BIT[1:0] as on/off gate. Although BIT1 is touched, actually BIT1 is reserved. And imx_clk_hw_gate4_flags use mask 0x3 to determine whether the clk is enabled or not, but i.MX93 LPCG only use BIT0 to control when CPU_LPM is 0. So clk disabled unused during kernel boot not able to gate off the unused clocks. To match i.MX93 LPCG, introduce imx93_clk_gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-6-peng.fan@oss.nxp.com
2022-09-19clk: imx: clk-composite-93: check white_listPeng Fan3-5/+10
The CCM ROOT AUTHEN register WHITE_LIST indicate: Each bit in this field represent for one domain. Bit16~Bit31 represent for DOMAIN0~DOMAIN15 respectively. Only corresponding bit of the domains is set to 1 can change the registers of this Clock Root. i.MX93 DID is 3, so if BIT(3 + WHITE_LIST_SHIFT) is 0, the clk should be set to read only. To make the imx93_clk_composite_flags be reusable, add a new parameter named did(domain id); Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-5-peng.fan@oss.nxp.com
2022-09-19clk: imx: clk-composite-93: check slice busyPeng Fan1-3/+160
i.MX93 CCM ROOT STAT register has a SLICE_BUSY bit: indication for clock generation logic is applying new setting. 0b - Clock generation logic is not busy. 1b - Clock generation logic is applying new setting. So when set parent/rate/gate, need check this bit. Introduce specific ops to do the work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-4-peng.fan@oss.nxp.com
2022-09-19dt-bindings: clock: imx93-clock: add more MU/SAI clocksPeng Fan1-1/+8
Add MU[1,2]_[A,B] clock entries. Add SAI IPG clock entries. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-2-peng.fan@oss.nxp.com
2022-09-19dt-bindings: clock: imx8mm: don't use multiple blank linesMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220722215445.3548530-13-marcel@ziswiler.com
2022-09-19wifi: rtw89: 8852c: add multi-port ID to TX descriptorPo-Hao Huang1-1/+2
Update tx descriptor settings so broadcast packets on other ports can be issued properly when DTIM count is 0. Before this, all broadcast packets are sent via port 0 and won't be transmitted correctly. Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-8-pkshih@realtek.com
2022-09-19wifi: rtw89: fix rx filter after scanPo-Hao Huang1-7/+5
In monitor mode we should be able to received all packets even if it's not destined to us. But after scan, the configuration was wrongly set, so we fix it. Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-7-pkshih@realtek.com
2022-09-19wifi: rtw89: free unused skb to prevent memory leakPo-Hao Huang1-0/+1
This avoid potential memory leak under power saving mode. Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-6-pkshih@realtek.com
2022-09-19wifi: rtw89: reset halt registers before turn on wifi CPUPing-Ke Shih1-0/+2
Reset these registers to prevent firmware get false alarm after wifi CPU is running. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-5-pkshih@realtek.com
2022-09-19wifi: rtw89: pci: update LTR settingsPing-Ke Shih2-4/+5
Modify PCI LTR control flow and LTR idle latency to improve power save efficiency. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-4-pkshih@realtek.com
2022-09-19wifi: rtw89: mac: set NAV upper to 25msPing-Ke Shih2-1/+2
NAV upper register is to limit the maximum NAV value to prevent unexpected NAV, but the old setting is too small to reflect NAV from AP transmiting big MPDU at once. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-3-pkshih@realtek.com
2022-09-19wifi: rtw89: initialize DMA of CMACPing-Ke Shih2-0/+47
8852C needs this to change CMAC dma to full mode to keep receiving packets after RX full event being resolved. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-2-pkshih@realtek.com
2022-09-19wifi: rtw89: support SER L1 simulationZong-Zhe Yang5-16/+61
SER (system error recovery) can deal with different crash types by different levels of processes. Previous FW crash simulation triggers a CPU exception which is one kind of SER L2 type. It can verify SER L2 flow which includes HW/FW restart. Now, we want to increase crash simulation types. A debug function is added to trigger control error in purpose for SER L1 simulation/verification. And, debugfs fw_crash is extended to accept different parameters. echo 1 > fw_crash: simulate CPU exception as before (keep 1 for compatibility with previous) It will be catched and handled by SER L2. (this requires HW/FW restart) echo 2 > fw_crash: simulate control error It will be catched and handled by SER L1. (driver and FW cooperate to recover this) Besides, in order to apply to the above two cases, rename RTW89_FLAG_RESTART_TRIGGER to RTW89_FLAG_CRASH_SIMULATING and adjust where SER flow clears this bit for both L1 and L2. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220914035034.14521-5-pkshih@realtek.com
2022-09-19wifi: rtw89: 8852c: support fw crash simulationZong-Zhe Yang3-2/+3
With FW >= v0.27.40.0, 8852C FW has feature to handle crash simulation. Besides, use RTW89_WCPU_BASE_MASK to replace use of RTW89_WCPU_BASE_ADDR and work for both 8852A and 8852C. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220914035034.14521-4-pkshih@realtek.com
2022-09-19wifi: rtw89: introudce functions to drop packetsZong-Zhe Yang6-1/+183
Introudce a H2C feature to drop packets according to given parameters. And, we implement instances to drop packets from BE, BK, VI, VO queues by vif or sta. Then, we refine our callback of ieee80211_ops::flush to deal with the case of drop=true via this feature. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220914035034.14521-3-pkshih@realtek.com
2022-09-19wifi: rtw89: unify use of rtw89_h2c_tx()Ping-Ke Shih1-62/+123
Seaprate calling of rtw89_h2c_tx() out of if-expression, and bypass the return value to upper caller. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220914035034.14521-2-pkshih@realtek.com
2022-09-19wifi: rtw89: pci: concentrate control function of TX DMA channelChin-Yen Lee4-14/+39
Different chips use different register and mask for tx dma channels, so concentrate them. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912071706.13619-4-pkshih@realtek.com
2022-09-19wifi: rtw89: correct enable functions of HCI/PCI DMAChin-Yen Lee4-79/+79
Some PCI and MAC registers are changed for different chips and correct them accordingly. And HCI MAD functions belongs to MAC core, so move it to mac.h/.c. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912071706.13619-3-pkshih@realtek.com
2022-09-19wifi: rtw89: 8852c: L1 DMA reset has offloaded to FWZong-Zhe Yang1-0/+6
For 8852C, rtw89_pci_lv1rst_stop_dma() and rtw89_pci_lv1rst_start_dma() are offloaded to FW L1 reset flow. So, driver no longer needs to do them. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912071706.13619-2-pkshih@realtek.com
2022-09-19wifi: rtw89: support for setting TID specific configurationKuan-Chung Chen3-13/+88
Add ops set_tid_config to support TID specific configuration. We currently only support ampdu setting. The command example is: iw wlan0 set tidconf tids 0x3 ampdu off iw wlan0 set tidconf peer xx:xx:xx:xx:xx:xx tids 0x2 ampdu on Signed-off-by: Kuan-Chung Chen <damon.chen@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912070014.10018-3-pkshih@realtek.com
2022-09-19wifi: rtw89: support for setting HE GI and LTFKuan-Chung Chen4-1/+54
Support setting HE GI and LTF values to the kernel via nl80211. We currently only support some GI and LTF values settings. The command example is: iw wlan0 set bitrates he-gi-2.4 0.8 he-ltf-2.4 2 Signed-off-by: Kuan-Chung Chen <damon.chen@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912070014.10018-2-pkshih@realtek.com
2022-09-19wifi: rtw89: coex: show connecting state in debug messagePing-Ke Shih1-2/+2
The variable cnt_connecting is to indicate if we are connecting to an AP. This is an important clue for coexistence to assign more time slot to WiFi side in this situation to ensure WiFi can establish connection. Without this patch, compiler warns: drivers/net/wireless/realtek/rtw89/coex.c:3244:25: warning: variable 'cnt_connecting' set but not used [-Wunused-but-set-variable] Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912021009.6011-1-pkshih@realtek.com
2022-09-19wifi: rtw89: coex: Combine set grant WL/BT and correct the debug logChing-Te Ku3-105/+118
To reduce register IO, combine set_gnt_wl/set_gnt_bt to set the same register one time. Because RTL8852C use different register to control antenna path, so make correction of path control related debug logs. Signed-off-by: Ching-Te Ku <ku920601@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220913092546.43722-8-pkshih@realtek.com
2022-09-19wifi: rtw89: coex: Remove trace_step at COEX-MECH control structure for RTL8852CChing-Te Ku1-1/+3
RTL8852C don't need to send the data trace_step which used to tell firmware how many TDMA steps should record. Remove the member. Signed-off-by: Ching-Te Ku <ku920601@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220913092546.43722-7-pkshih@realtek.com
2022-09-19wifi: rtw89: coex: Parsing Wi-Fi firmware TDMA info from reportsChing-Te Ku1-1/+5
Show TDMA information containing TDMA policy and time slot of Wi-Fi/BT in debug message to check things are in expected. The v1 format contains additional header, and remaining part is the same as original. So 8852CE selects v1 version, and then everything like original. Signed-off-by: Ching-Te Ku <ku920601@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220913092546.43722-6-pkshih@realtek.com
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