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2022-09-17dt-bindings: clk: imx8mm: don't use multiple blank linesMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17ALSA: ppc: Switch to use for_each_child_of_node() macroYang Yingliang1-4/+2
Use for_each_child_of_node() macro instead of open coding it. No functional change. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220916141108.683080-1-yangyingliang@huawei.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2022-09-17ARM: dts: imx6qdl-gw54xx: add CAN regulatorTim Harvey1-1/+17
The GW54xx has a transceiver with a STBY pin connected to an IMX6 GPIO. Configure this as a regulator to drive it low when CAN is in use. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17ARM: dts: imx6qdl-gw53xx: add CAN regulatorTim Harvey1-1/+17
The GW53xx has a transceiver with a STBY pin connected to an IMX6 GPIO. Configure this as a regulator to drive it low when CAN is in use. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17ARM: dts: imx6qdl-gw52xx: add CAN regulatorTim Harvey1-1/+17
The GW52xx has a transceiver with a STBY pin connected to an IMX6 GPIO. Configure this as a regulator to drive it low when CAN is in use. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-16bpf/btf: Use btf_type_str() whenever possiblePeilin Ye1-9/+8
We have btf_type_str(). Use it whenever possible in btf.c, instead of "btf_kind_str[BTF_INFO_KIND(t->info)]". Signed-off-by: Peilin Ye <peilin.ye@bytedance.com> Link: https://lore.kernel.org/r/20220916202800.31421-1-yepeilin.cs@gmail.com Signed-off-by: Martin KaFai Lau <martin.lau@kernel.org>
2022-09-17slub: Make PREEMPT_RT support less convolutedThomas Gleixner1-32/+24
The slub code already has a few helpers depending on PREEMPT_RT. Add a few more and get rid of the CONFIG_PREEMPT_RT conditionals all over the place. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Christoph Lameter <cl@linux.com> Cc: David Rientjes <rientjes@google.com> Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com> Cc: Pekka Enberg <penberg@kernel.org> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: linux-mm@kvack.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
2022-09-17mm/slub: simplify __cmpxchg_double_slab() and slab_[un]lock()Vlastimil Babka1-27/+12
The PREEMPT_RT specific disabling of irqs in __cmpxchg_double_slab() (through slab_[un]lock()) is unnecessary as bit_spin_lock() disables preemption and that's sufficient on PREEMPT_RT where no allocation/free operation is performed in hardirq context and so can't interrupt the current operation. That means we no longer need the slab_[un]lock() wrappers, so delete them and rename the current __slab_[un]lock() to slab_[un]lock(). Signed-off-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: David Rientjes <rientjes@google.com> Reviewed-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2022-09-17mm/slub: convert object_map_lock to non-raw spinlockVlastimil Babka1-30/+6
The only remaining user of object_map_lock is list_slab_objects(). Obtaining the lock there used to happen under slab_lock() which implied disabling irqs on PREEMPT_RT, thus it's a raw_spinlock. With the slab_lock() removed, we can convert it to a normal spinlock. Also remove the get_map()/put_map() wrappers as list_slab_objects() became their only remaining user. Signed-off-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: David Rientjes <rientjes@google.com> Reviewed-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2022-09-17mm/slub: remove slab_lock() usage for debug operationsVlastimil Babka1-11/+8
All alloc and free operations on debug caches are now serialized by n->list_lock, so we can remove slab_lock() usage in validate_slab() and list_slab_objects() as those also happen under n->list_lock. Note the usage in list_slab_objects() could happen even on non-debug caches, but only during cache shutdown time, so there should not be any parallel freeing activity anymore. Except for buggy slab users, but in that case the slab_lock() would not help against the common cmpxchg based fast paths (in non-debug caches) anyway. Also adjust documentation comments accordingly. Suggested-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Signed-off-by: Vlastimil Babka <vbabka@suse.cz> Reviewed-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Acked-by: David Rientjes <rientjes@google.com>
2022-09-17mm/slub: restrict sysfs validation to debug caches and make it safeVlastimil Babka1-52/+180
Rongwei Wang reports [1] that cache validation triggered by writing to /sys/kernel/slab/<cache>/validate is racy against normal cache operations (e.g. freeing) in a way that can cause false positive inconsistency reports for caches with debugging enabled. The problem is that debugging actions that mark object free or active and actual freelist operations are not atomic, and the validation can see an inconsistent state. For caches that do or don't have debugging enabled, additional races involving n->nr_slabs are possible that result in false reports of wrong slab counts. This patch attempts to solve these issues while not adding overhead to normal (especially fastpath) operations for caches that do not have debugging enabled. Such overhead would not be justified to make possible userspace-triggered validation safe. Instead, disable the validation for caches that don't have debugging enabled and make their sysfs validate handler return -EINVAL. For caches that do have debugging enabled, we can instead extend the existing approach of not using percpu freelists to force all alloc/free operations to the slow paths where debugging flags is checked and acted upon. There can adjust the debug-specific paths to increase n->list_lock coverage against concurrent validation as necessary. The processing on free in free_debug_processing() already happens under n->list_lock so we can extend it to actually do the freeing as well and thus make it atomic against concurrent validation. As observed by Hyeonggon Yoo, we do not really need to take slab_lock() anymore here because all paths we could race with are protected by n->list_lock under the new scheme, so drop its usage here. The processing on alloc in alloc_debug_processing() currently doesn't take any locks, but we have to first allocate the object from a slab on the partial list (as debugging caches have no percpu slabs) and thus take the n->list_lock anyway. Add a function alloc_single_from_partial() that grabs just the allocated object instead of the whole freelist, and does the debug processing. The n->list_lock coverage again makes it atomic against validation and it is also ultimately more efficient than the current grabbing of freelist immediately followed by slab deactivation. To prevent races on n->nr_slabs updates, make sure that for caches with debugging enabled, inc_slabs_node() or dec_slabs_node() is called under n->list_lock. When allocating a new slab for a debug cache, handle the allocation by a new function alloc_single_from_new_slab() instead of the current forced deactivation path. Neither of these changes affect the fast paths at all. The changes in slow paths are negligible for non-debug caches. [1] https://lore.kernel.org/all/20220529081535.69275-1-rongwei.wang@linux.alibaba.com/ Reported-by: Rongwei Wang <rongwei.wang@linux.alibaba.com> Signed-off-by: Vlastimil Babka <vbabka@suse.cz> Reviewed-by: Hyeonggon Yoo <42.hyeyoo@gmail.com>
2022-09-16drm/plane-helper: Add a drm_plane_helper_atomic_check() helperJavier Martinez Canillas4-41/+33
Provides a default plane state check handler for primary planes that are a fullscreen scanout buffer and whose state scale and position can't change. There are some drivers that duplicate this logic in their helpers, such as simpledrm and ssd130x. Factor out this common code into a plane helper and make drivers use it. Suggested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220913162307.121503-1-javierm@redhat.com
2022-09-16kasan: call kasan_malloc() from __kmalloc_*track_caller()Peter Collingbourne1-0/+4
We were failing to call kasan_malloc() from __kmalloc_*track_caller() which was causing us to sometimes fail to produce KASAN error reports for allocations made using e.g. devm_kcalloc(), as the KASAN poison was not being initialized. Fix it. Signed-off-by: Peter Collingbourne <pcc@google.com> Cc: <stable@vger.kernel.org> # 5.15 Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
2022-09-16Merge tag 'linux-can-next-for-6.1-20220915' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-nextDavid S. Miller27-219/+616
Marc Kleine-Budde says: ==================== Sept. 15, 2022, 8:19 a.m. UTC Hello Jakub, hello David, this is a pull request of 23 patches for net-next/master. the first 2 patches are by me and fix a typo in the rx-offload helper and the flexcan driver. Christophe JAILLET's patch cleans up the error handling in rcar_canfd driver's probe function. Kenneth Lee's patch converts the kvaser_usb driver from kcalloc() to kzalloc(). Biju Das contributes 2 patches to the sja1000 driver which update the DT bindings and support for the RZ/N1 SJA1000 CAN controller. Jinpeng Cui provides 2 patches that remove redundant variables from the sja1000 and kvaser_pciefd driver. 2 patches by John Whittington and me add hardware timestamp support to the gs_usb driver. Gustavo A. R. Silva's patch converts the etas_es58x driver to make use of DECLARE_FLEX_ARRAY(). Krzysztof Kozlowski's patch cleans up the sja1000 DT bindings. Dario Binacchi fixes his invalid email in the flexcan driver documentation. Ziyang Xuan contributes 2 patches that clean up the CAN RAW protocol. Yang Yingliang's patch switches the flexcan driver to dev_err_probe(). The last 7 patches are by Oliver Hartkopp and add support for the next generation of the CAN protocol: CAN with eXtended data Length (CAN XL). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-16libbpf: Clean up legacy bpf maps declaration in bpf_helpersXin Liu1-12/+0
Legacy BPF map declarations are no longer supported in libbpf v1.0 [0]. Only BTF-defined maps are supported starting from v1.0, so it is time to remove the definition of bpf_map_def in bpf_helpers.h. [0] https://github.com/libbpf/libbpf/wiki/Libbpf:-the-road-to-v1.0 Signed-off-by: Xin Liu <liuxin350@huawei.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Song Liu <song@kernel.org> Link: https://lore.kernel.org/bpf/20220913073643.19960-1-liuxin350@huawei.com
2022-09-16net: dsa: microchip: add the support for set_ageing_timeArun Ramadoss8-1/+67
KSZ9477 has the 11 bit ageing count value which is split across the two registers. And LAN937x has the 20 bit ageing count which is also split into two registers. Each count in the registers represents 1 second. This patch add the support for ageing time for KSZ9477 and LAN937x series of switch. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-16selftests/bpf: Add veristat tool for mass-verifying BPF object filesAndrii Nakryiko3-1/+544
Add a small tool, veristat, that allows mass-verification of a set of *libbpf-compatible* BPF ELF object files. For each such object file, veristat will attempt to verify each BPF program *individually*. Regardless of success or failure, it parses BPF verifier stats and outputs them in human-readable table format. In the future we can also add CSV and JSON output for more scriptable post-processing, if necessary. veristat allows to specify a set of stats that should be output and ordering between multiple objects and files (e.g., so that one can easily order by total instructions processed, instead of default file name, prog name, verdict, total instructions order). This tool should be useful for validating various BPF verifier changes or even validating different kernel versions for regressions. Here's an example for some of the heaviest selftests/bpf BPF object files: $ sudo ./veristat -s insns,file,prog {pyperf,loop,test_verif_scale,strobemeta,test_cls_redirect,profiler}*.linked3.o File Program Verdict Duration, us Total insns Total states Peak states ------------------------------------ ------------------------------------ ------- ------------ ----------- ------------ ----------- loop3.linked3.o while_true failure 350990 1000001 9663 9663 test_verif_scale3.linked3.o balancer_ingress success 115244 845499 8636 2141 test_verif_scale2.linked3.o balancer_ingress success 77688 773445 3048 788 pyperf600.linked3.o on_event success 2079872 624585 30335 30241 pyperf600_nounroll.linked3.o on_event success 353972 568128 37101 2115 strobemeta.linked3.o on_event success 455230 557149 15915 13537 test_verif_scale1.linked3.o balancer_ingress success 89880 554754 8636 2141 strobemeta_nounroll2.linked3.o on_event success 433906 501725 17087 1912 loop6.linked3.o trace_virtqueue_add_sgs success 282205 398057 8717 919 loop1.linked3.o nested_loops success 125630 361349 5504 5504 pyperf180.linked3.o on_event success 2511740 160398 11470 11446 pyperf100.linked3.o on_event success 744329 87681 6213 6191 test_cls_redirect.linked3.o cls_redirect success 54087 78925 4782 903 strobemeta_subprogs.linked3.o on_event success 57898 65420 1954 403 test_cls_redirect_subprogs.linked3.o cls_redirect success 54522 64965 4619 958 strobemeta_nounroll1.linked3.o on_event success 43313 57240 1757 382 pyperf50.linked3.o on_event success 194355 46378 3263 3241 profiler2.linked3.o tracepoint__syscalls__sys_enter_kill success 23869 43372 1423 542 pyperf_subprogs.linked3.o on_event success 29179 36358 2499 2499 profiler1.linked3.o tracepoint__syscalls__sys_enter_kill success 13052 27036 1946 936 profiler3.linked3.o tracepoint__syscalls__sys_enter_kill success 21023 26016 2186 915 profiler2.linked3.o kprobe__vfs_link success 5255 13896 303 271 profiler1.linked3.o kprobe__vfs_link success 7792 12687 1042 1041 profiler3.linked3.o kprobe__vfs_link success 7332 10601 865 865 profiler2.linked3.o kprobe_ret__do_filp_open success 3417 8900 216 199 profiler2.linked3.o kprobe__vfs_symlink success 3548 8775 203 186 pyperf_global.linked3.o on_event success 10007 7563 520 520 profiler3.linked3.o kprobe_ret__do_filp_open success 4708 6464 532 532 profiler1.linked3.o kprobe_ret__do_filp_open success 3090 6445 508 508 profiler3.linked3.o kprobe__vfs_symlink success 4477 6358 521 521 profiler1.linked3.o kprobe__vfs_symlink success 3381 6347 507 507 profiler2.linked3.o raw_tracepoint__sched_process_exec success 2464 5874 292 189 profiler3.linked3.o raw_tracepoint__sched_process_exec success 2677 4363 397 283 profiler2.linked3.o kprobe__proc_sys_write success 1800 4355 143 138 profiler1.linked3.o raw_tracepoint__sched_process_exec success 1649 4019 333 240 pyperf600_bpf_loop.linked3.o on_event success 2711 3966 306 306 profiler2.linked3.o raw_tracepoint__sched_process_exit success 1234 3138 83 66 profiler3.linked3.o kprobe__proc_sys_write success 1755 2623 223 223 profiler1.linked3.o kprobe__proc_sys_write success 1222 2456 193 193 loop2.linked3.o while_true success 608 1783 57 30 profiler3.linked3.o raw_tracepoint__sched_process_exit success 789 1680 146 146 profiler1.linked3.o raw_tracepoint__sched_process_exit success 592 1526 133 133 strobemeta_bpf_loop.linked3.o on_event success 1015 1512 106 106 loop4.linked3.o combinations success 165 524 18 17 profiler3.linked3.o raw_tracepoint__sched_process_fork success 196 299 25 25 profiler1.linked3.o raw_tracepoint__sched_process_fork success 109 265 19 19 profiler2.linked3.o raw_tracepoint__sched_process_fork success 111 265 19 19 loop5.linked3.o while_true success 47 84 9 9 ------------------------------------ ------------------------------------ ------- ------------ ----------- ------------ ----------- Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20220909193053.577111-4-andrii@kernel.org
2022-09-16libbpf: Fix crash if SEC("freplace") programs don't have attach_prog_fd setAndrii Nakryiko1-4/+9
Fix SIGSEGV caused by libbpf trying to find attach type in vmlinux BTF for freplace programs. It's wrong to search in vmlinux BTF and libbpf doesn't even mark vmlinux BTF as required for freplace programs. So trying to search anything in obj->vmlinux_btf might cause NULL dereference if nothing else in BPF object requires vmlinux BTF. Instead, error out if freplace (EXT) program doesn't specify attach_prog_fd during at the load time. Fixes: 91abb4a6d79d ("libbpf: Support attachment of BPF tracing programs to kernel modules") Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20220909193053.577111-3-andrii@kernel.org
2022-09-16selftests/bpf: Fix test_verif_scale{1,3} SEC() annotationsAndrii Nakryiko2-2/+2
Use proper SEC("tc") for test_verif_scale{1,3} programs. It's not a problem for selftests right now because we manually set type programmatically, but not having correct SEC() definitions makes it harded to generically load BPF object files. Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20220909193053.577111-2-andrii@kernel.org
2022-09-16power: supply: mt6370: Add MediaTek MT6370 charger driverChiaEn Wu3-0/+976
MediaTek MT6370 is a SubPMIC consisting of a single cell battery charger with ADC monitoring, RGB LEDs, dual channel flashlight, WLED backlight driver, display bias voltage supply, one general purpose LDO, and the USB Type-C & PD controller complies with the latest USB Type-C and PD standards. Add support for the MediaTek MT6370 Charger driver. The charger module of MT6370 supports High-Accuracy Voltage/Current Regulation, Average Input Current Regulation, Battery Temperature Sensing, Over-Temperature Protection, DPDM Detection for BC1.2. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: ChiaEn Wu <chiaen_wu@richtek.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-09-16dt-bindings: power: supply: Add MediaTek MT6370 ChargerChiaEn Wu1-0/+96
Add MediaTek MT6370 Charger binding documentation. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: ChiaEn Wu <chiaen_wu@richtek.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-09-16Merge tag 'psy-linear-range-for-v6.1-signed' into psy-nextSebastian Reichel1-0/+11
Immutable branch between linear range and power-supply for driver changes in MT6370. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-09-16lib: add linear range index macroChiaEn Wu1-0/+11
Add linear_range_idx macro for declaring the linear_range struct simply. Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Signed-off-by: ChiaEn Wu <chiaen_wu@richtek.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-09-16bpf: Move bpf_dispatcher function out of ftrace locationsJiri Olsa2-0/+8
The dispatcher function is attached/detached to trampoline by dispatcher update function. At the same time it's available as ftrace attachable function. After discussion [1] the proposed solution is to use compiler attributes to alter bpf_dispatcher_##name##_func function: - remove it from being instrumented with __no_instrument_function__ attribute, so ftrace has no track of it - but still generate 5 nop instructions with patchable_function_entry(5) attribute, which are expected by bpf_arch_text_poke used by dispatcher update function Enabling HAVE_DYNAMIC_FTRACE_NO_PATCHABLE option for x86, so __patchable_function_entries functions are not part of ftrace/mcount locations. Adding attributes to bpf_dispatcher_XXX function on x86_64 so it's kept out of ftrace locations and has 5 byte nop generated at entry. These attributes need to be arch specific as pointed out by Ilya Leoshkevic in here [2]. The dispatcher image is generated only for x86_64 arch, so the code can stay as is for other archs. [1] https://lore.kernel.org/bpf/20220722110811.124515-1-jolsa@kernel.org/ [2] https://lore.kernel.org/bpf/969a14281a7791c334d476825863ee449964dd0c.camel@linux.ibm.com/ Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/bpf/20220903131154.420467-3-jolsa@kernel.org
2022-09-16ftrace: Add HAVE_DYNAMIC_FTRACE_NO_PATCHABLEPeter Zijlstra (Intel)3-2/+18
x86 will shortly start using -fpatchable-function-entry for purposes other than ftrace, make sure the __patchable_function_entry section isn't merged in the mcount_loc section. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20220903131154.420467-2-jolsa@kernel.org
2022-09-16bpf: Use bpf_capable() instead of CAP_SYS_ADMIN for blinding decisionYauheni Kaliuta2-1/+4
The full CAP_SYS_ADMIN requirement for blinding looks too strict nowadays. These days given unprivileged BPF is disabled by default, the main users for constant blinding coming from unprivileged in particular via cBPF -> eBPF migration (e.g. old-style socket filters). Signed-off-by: Yauheni Kaliuta <ykaliuta@redhat.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20220831090655.156434-1-ykaliuta@redhat.com Link: https://lore.kernel.org/bpf/20220905090149.61221-1-ykaliuta@redhat.com
2022-09-16Merge tag 'gpio-fixes-for-v6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linuxLinus Torvalds4-10/+31
Pull gpio fixes from Bartosz Golaszewski: - fix the level-low interrupt type support in gpio-mpc8xxx - convert another two drivers to using immutable irq chips - MAINTAINERS update * tag 'gpio-fixes-for-v6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: mt7621: Make the irqchip immutable gpio: ixp4xx: Make irqchip immutable MAINTAINERS: Update HiSilicon GPIO Driver maintainer gpio: mpc8xxx: Fix support for IRQ_TYPE_LEVEL_LOW flow_type in mpc85xx
2022-09-16dt-bindings: i2c: rockchip: add rockchip,rk3128-i2cJohan Jonker1-0/+1
Add rockchip,rk3128-i2c compatible string. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16dt-bindings: i2c: renesas,rcar-i2c: Add r8a779g0 supportGeert Uytterhoeven1-0/+1
Document support for the I2C Bus Interfaces in the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16Documentation: i2c: fix references to other documentsWolfram Sang3-6/+6
Similar to commit fe99b819487d ("docs: i2c: i2c-sysfs: fix hyperlinks"), make other links in documentation consistent with the preferred way. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16ARM: disallow PCI with MMU=n againArnd Bergmann1-1/+1
My cleanup patch allowed enabling PCI on MMU-less builds, which breaks for at least one driver and is never required: In file included from include/linux/irqchip/arm-gic-v3.h:604, from drivers/pci/controller/pcie-iproc.c:17: arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_EOIR1_EL1': arch/arm/include/asm/arch_gicv3.h:44:9: error: implicit declaration of function 'write_sysreg' [-Werror=implicit-function-declaration] Fixes: 6fd09c9afa49 ("ARM: Kconfig: clean up platform selection") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-16i2c: tegra: Add GPCDMA supportAkhil R1-3/+8
Enable support for GPCDMA, which is used in I2C controllers in Tegra 186 and above. The chips before that used APB DMA. This change works under the presumption that all chips apart from those supporting APB DMA is using GPCDMA. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16i2c: scmi: Convert to be a platform driverAndy Shevchenko1-29/+19
ACPI core in conjunction with platform driver core provides an infrastructure to enumerate ACPI devices. Use it in order to remove a lot of boilerplate code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Josef Johansson <josef@oderland.se> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16Merge tag 'v6.0-rc5' into i2c/for-mergewindowWolfram Sang1293-8626/+16240
Linux 6.0-rc5
2022-09-16MAINTAINERS: remove Nehal Shah from AMD MP2 I2C DRIVERWolfram Sang1-1/+0
His email bounced and given commit 88115ea6308d ("HID: amd_sfh: Remove name from maintainers list"), I assume he is no longer available as a maintainer. Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16i2c: imx: If pm_runtime_get_sync() returned 1 device access is possibleUwe Kleine-König1-1/+1
pm_runtime_get_sync() returning 1 also means the device is powered. So resetting the chip registers in .remove() is possible and should be done. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Fixes: d98bdd3a5b50 ("i2c: imx: Make sure to unregister adapter on remove()") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16dt-bindings: display: bridge: nxp,tda998x: Convert to json-schemaGeert Uytterhoeven2-54/+109
Convert the NXP TDA998x HDMI transmitter Device Tree binding documentation to json-schema. Add missing "#sound-dai-cells" property. Add ports hierarchy, as an alternative to port. Drop pinctrl properties, as they do not belong here. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1224e757ec958f8b29ec66e783a7ee805c339d84.1663165552.git.geert+renesas@glider.be Signed-off-by: Rob Herring <robh@kernel.org>
2022-09-16i2c: rk3x: Add rv1126 supportJagan Teki1-0/+9
Add i2c support for Rockchip RV1126 SoC. Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16arm64: defconfig: Enabled SC8180x configsVinod Koul1-0/+4
Enable sc8180x global clock controller, tlmm, interconnect and edp phy drivers which are required for sc8180x like Lenovo Flex 5G laptop to boot. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220916124214.3881948-1-vkoul@kernel.org
2022-09-16arm64: dts: qcom: sc7280: Add required-opps for USBRajendra Nayak1-0/+3
USB has a requirement to put a performance state vote on 'cx' while active. Use 'required-opps' to pass this information from device tree, and since all the GDSCs in GCC (including USB) are sub-domains of cx, we also add cx as a power-domain for GCC. Now when any of the consumers of the GDSCs (in this case USB) votes on a perforamance state, genpd framework can identify that the GDSC itself does not support a performance state and it then propogates the vote to the parent, which in this case is cx. This change would also mean that any GDSC in GCC thats left enabled during low power state (perhaps because its marked with a ALWAYS_ON flag) can prevent the system from entering low power since that would prevent cx from transitioning to low power. Ideally any consumers that would need to have their devices (partially) powered to support wakeups should look at making the resp. GDSCs transtion to a Retention (PWRSTS_RET) state instead of leaving them ALWAYS_ON. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220916103124.30581-1-quic_rjendra@quicinc.com
2022-09-16bpf: use kvmemdup_bpfptr helperWang Yufen1-9/+4
Use kvmemdup_bpfptr helper instead of open-coding to simplify the code. Signed-off-by: Wang Yufen <wangyufen@huawei.com> Acked-by: Stanislav Fomichev <sdf@google.com> Link: https://lore.kernel.org/r/1663058433-14089-1-git-send-email-wangyufen@huawei.com Signed-off-by: Martin KaFai Lau <martin.lau@kernel.org>
2022-09-16arm64: dts: qcom: sm8350: fix UFS PHY serdes sizeJohan Hovold1-1/+1
The size of the UFS PHY serdes register region is 0x1c4 and the corresponding 'reg' property should specifically not include the adjacent regions that are defined in the child node (e.g. tx and rx). Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220916093603.24263-1-johan+linaro@kernel.org
2022-09-17MAINTAINERS: Add maintainers for DWC AHCI SATA driverSerge Semin1-0/+9
Add myself as a maintainer of the new DWC AHCI SATA driver and its DT-bindings schema. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface supportSerge Semin2-0/+56
It's almost fully compatible DWC AHCI SATA IP-core derivative except the reference clocks source, which need to be very carefully selected. In particular the DWC AHCI SATA PHY can be clocked either from the pads ref_pad_clk_{m,p} or from the internal wires ref_alt_clk_{m,n}. In the later case the clock signal is generated from the Baikal-T1 CCU SATA PLL. The clocks source is selected by means of the ref_use_pad wire connected to the CCU SATA reference clock CSR. In normal situation it would be much more handy to use the internal reference clock source, but alas we haven't managed to make the AHCI controller working well with it so far. So it's preferable to have the controller clocked from the external clock generator and fallback to the internal clock source only as a last resort. Other than that the controller is full compatible with the DWC AHCI SATA IP-core. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17ata: ahci-dwc: Add platform-specific quirks supportSerge Semin1-4/+48
Some DWC AHCI SATA IP-core derivatives require to perform small platform or IP-core specific setups. They are too small to be placed in a dedicated driver. It's just much easier to have a set of quirks for them right in the DWC AHCI driver code. Since we are about to add such platform support, as a pre-requisite we introduce a platform-data based DWC AHCI quirks API. The platform data can be used to define the flags passed to the ahci_platform_get_resources() method, additional AHCI host-flags and a set of callbacks to initialize, re-initialize and clear the platform settings. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schemaSerge Semin1-0/+115
Baikal-T1 AHCI controller is based on the DWC AHCI SATA IP-core v4.10a with the next specific settings: two SATA ports, cascaded CSR access based on two clock domains (APB and AXI), selectable source of the reference clock (though stable work is currently available from the external source only), two reset lanes for the application and SATA ports domains. Other than that the device is fully compatible with the generic DWC AHCI SATA bindings. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17ata: ahci: Add DWC AHCI SATA controller supportSerge Semin4-2/+404
Synopsys AHCI SATA controller can work pretty under with the generic AHCI-platform driver control. But there are vendor-specific peculiarities which can tune the device performance up and which may need to be fixed up for proper device functioning. In addition some DWC AHCI-based controllers may require small platform-specific fixups, so adding them in the generic AHCI driver would have ruined the code simplicity. Shortly speaking in order to keep the generic AHCI-platform code clean and have DWC AHCI SATA-specific features supported we suggest to add a dedicated DWC AHCI SATA device driver. Aside with the standard AHCI-platform resources getting, enabling/disabling and the controller registration the new driver performs the next actions. First of all there is a way to verify whether the HBA/ports capabilities activated in OF are correct. Almost all features availability is reflected in the vendor-specific parameters registers. So the DWC AHCI driver does the capabilities sanity check based on the corresponding fields state. Secondly if either the Command Completion Coalescing or the Device Sleep feature is enabled the DWC AHCI-specific internal 1ms timer must be fixed in accordance with the application clock signal frequency. In particular the timer value must be set to be Fapp * 1000. Normally the SoC designers pre-configure the TIMER1MS register to contain a correct value by default. But the platforms can support the application clock rate change. If that happens the 1ms timer value must be accordingly updated otherwise the dependent features won't work as expected. In the DWC AHCI driver we suggest to rely on the "aclk" reference clock rate to set the timer interval up. That clock source is supposed to be the AHCI SATA application clock in accordance with the DT bindings. Finally DWC AHCI SATA controller AXI/AHB bus DMA-engine can be tuned up to transfer up to 1024 * FIFO words at a time by setting the Tx/Rx transaction size in the DMA control register. The maximum value depends on the DMA data bus and AXI/AHB bus maximum burst length. In most of the cases it's better to set the maximum possible value to reach the best AHCI SATA controller performance. But sometimes in order to improve the system interconnect responsiveness, transferring in smaller data chunks may be more preferable. For such cases and for the case when the default value doesn't provide the best DMA bus performance we suggest to use the new HBA-port specific DT-properties "snps,{tx,rx}-ts-max" to tune the DMA transactions size up. After all the settings denoted above are handled the DWC AHCI SATA driver proceeds further with the standard AHCI-platform host initializations. Note since DWC AHCI controller is now have a dedicated driver we can discard the corresponding compatible string from the ahci-platform.c module. The same concerns "snps,spear-ahci" compatible string, which is also based on the DWC AHCI IP-core. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17ata: libahci_platform: Add function returning a clock-handle by idSerge Semin2-0/+27
Since all the clocks are retrieved by the method ahci_platform_get_resources() there is no need for the LLD (glue) drivers to be looking for some particular of them in the kernel clocks table again. Instead we suggest to add a simple method returning a device-specific clock with passed connection ID if it is managed to be found. Otherwise the function will return NULL. Thus the glue-drivers won't need to either manually touching the hpriv->clks array or calling clk_get()-friends. The AHCI platform drivers will be able to use the new function right after the ahci_platform_get_resources() method invocation and up to the device removal. Note the method is left unused here, but will be utilized in the framework of the DWC AHCI SATA driver being added in the next commit. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schemaSerge Semin3-8/+177
Synopsys AHCI SATA controller is mainly compatible with the generic AHCI SATA controller except a few peculiarities and the platform environment requirements. In particular it can have at least two reference clocks to feed up its AHB/AXI interface and SATA PHYs domain and at least one reset control for the application clock domain. In addition to that the DMA interface of each port can be tuned up to work with the predefined maximum data chunk size. Note unlike generic AHCI controller DWC AHCI can't have more than 8 ports. All of that is reflected in the new DWC AHCI SATA device DT binding. Note the DWC AHCI SATA controller DT-schema has been created in a way so to be reused for the vendor-specific DT-schemas (see for example the "snps,dwc-ahci" compatible string binding). One of which we are about to introduce. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17ata: ahci: Introduce firmware-specific caps initializationSerge Semin3-11/+81
There are systems with no BIOS or comprehensive embedded firmware which could be able to properly initialize the SATA AHCI controller platform-specific capabilities. In that case a good alternative to having a clever bootloader is to create a device tree node with the properties well describing all the AHCI-related platform specifics. All the settings which are normally detected and marked as available in the HBA and its ports capabilities fields [1] could be defined in the platform DTB by means of a set of the dedicated properties. Such approach perfectly fits to the DTB-philosophy - to provide hardware/platform description. So here we suggest to extend the SATA AHCI device tree bindings with two additional DT-properties: 1) "hba-cap" - HBA platform generic capabilities like: - SSS - Staggered Spin-up support. - SMPS - Mechanical Presence Switch support. 2) "hba-port-cap" - HBA platform port capabilities like: - HPCP - Hot Plug Capable Port. - MPSP - Mechanical Presence Switch Attached to Port. - CPD - Cold Presence Detection. - ESP - External SATA Port. - FBSCP - FIS-based Switching Capable Port. All of these capabilities require to have a corresponding hardware configuration. Thus it's ok to have them defined in DTB. Even though the driver currently takes into account the state of the ESP and FBSCP flags state only, there is nothing wrong with having all of them supported by the generic AHCI library in order to have a complete OF-based platform-capabilities initialization procedure. These properties will be parsed in the ahci_platform_get_resources() method and their values will be stored in the saved_* fields of the ahci_host_priv structure, which in its turn then will be used to restore the H.CAP, H.PI and P#.CMD capability fields on device init and after HBA reset. Please note this modification concerns the HW-init HBA and its ports flags only, which are by specification [1] are supposed to be initialized by the BIOS/platform firmware/expansion ROM and which are normally declared in the one-time-writable-after-reset register fields. Even though these flags aren't supposed to be cleared after HBA reset some AHCI instances may violate that rule so we still need to perform the fields resetting after each reset. Luckily the corresponding functionality has already been partly implemented in the framework of the ahci_save_initial_config() and ahci_restore_initial_config() methods. [1] Serial ATA AHCI 1.3.1 Specification, p. 103 Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>