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2022-09-15scsi: target: Remove unused se_tmr_req_cache declarationGaosheng Cui1-2/+0
se_tmr_req_cache has been removed since commit c8e31f26feeb ("target: Add SCF_SCSI_TMR_CDB usage and drop se_tmr_req_cache"). Remove extern. Link: https://lore.kernel.org/r/20220913023722.547249-3-cuigaosheng1@huawei.com Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-09-15scsi: qla2xxx: Remove unused declarations for qla2xxxGaosheng Cui2-14/+0
qla2x00_get_fw_version_str() has been removed since commit abbd8870b9cb ("[SCSI] qla2xxx: Factor-out ISP specific functions to method-based call tables."). qla2x00_release_nvram_protection() has been removed since commit 459c537807bd ("[SCSI] qla2xxx: Add ISP24xx flash-manipulation routines."). qla82xx_rdmem() and qla82xx_wrmem() have been removed since commit 3711333dfbee ("[SCSI] qla2xxx: Updates for ISP82xx."). qla25xx_rd_req_reg(), qla24xx_rd_req_reg(), qla25xx_wrt_rsp_reg(), qla24xx_wrt_rsp_reg(), qla25xx_wrt_req_reg() and qla24xx_wrt_req_reg() have been removed since commit 08029990b25b ("[SCSI] qla2xxx: Refactor request/response-queue register handling."). qla2x00_async_login_done() has been removed since commit 726b85487067 ("qla2xxx: Add framework for async fabric discovery"). qlt_24xx_process_response_error() has been removed since commit c5419e2618b9 ("scsi: qla2xxx: Combine Active command arrays."). Remove the declarations for them from header file. Link: https://lore.kernel.org/r/20220913023722.547249-2-cuigaosheng1@huawei.com Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-09-15drm/i915/uc: Update to latest GuC and use new-format GuC/HuC namesJohn Harrison1-3/+7
Going forwards, the intention is for GuC firmware files to be named for their major version only and HuC firmware files to have no version number in the name at all. This patch adds those entries for all platforms that are officially GuC/HuC enabled. Also, update the expected GuC version numbers to the latest firmware release for those platforms. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220914234605.622342-2-John.C.Harrison@Intel.com
2022-09-15scsi: target: alua: Do not report emtpy port groupDmitry Bogdanov1-0/+3
The default target port group is always returned in the list of port groups, even if the behaviour is unwanted, i.e. it has no members and non-default port groups are primary port groups. That violates SPC-4 "6.37 REPORT TARGET PORT GROUPS command": Every target port group shall contain at least one target port. The target port group descriptor shall include one target port descriptor for each target port in the target port group. This patch hides port groups with no ports in REPORT TARGET PORT GROUPS response. Link: https://lore.kernel.org/r/20220912214549.27882-1-d.bogdanov@yadro.com Signed-off-by: Dmitry Bogdanov <d.bogdanov@yadro.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-09-15scsi: target: core: Set MULTIP bit for se_device with multiple portsDmitry Bogdanov1-0/+6
SAM-5 4.8.3 (SCSI target device with multiple SCSI ports structure) obligates to set MULTIP bit when there's multiple SCSI target ports: Each device server shall indicate the presence of multiple SCSI target ports by setting the MULTIP bit to one in its standard INQUIRY data (see SPC-4). Set MULTIP bit automatically to indicate the presence of multiple SCSI target ports within standard inquiry response data if there are multiple target ports in all target port groups of the se_device. Link: https://lore.kernel.org/r/20220912125457.22573-2-d.bogdanov@yadro.com Reviewed-by: Mike Christie <michael.christie@oracle.com> Co-developed-by: Roman Bolshakov <r.bolshakov@yadro.com> Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Signed-off-by: Dmitry Bogdanov <d.bogdanov@yadro.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-09-15scsi: qedf: Fix a UAF bug in __qedf_probe()Letu Ren1-5/+0
In __qedf_probe(), if qedf->cdev is NULL which means qed_ops->common->probe() failed, then the program will goto label err1, and scsi_host_put() will free lport->host pointer. Because the memory qedf points to is allocated by libfc_host_alloc(), it will be freed by scsi_host_put(). However, the if statement below label err0 only checks whether qedf is NULL but doesn't check whether the memory has been freed. So a UAF bug can occur. There are two ways to reach the statements below err0. The first one is described as before, "qedf" should be set to NULL. The second one is goto "err0" directly. In the latter scenario qedf hasn't been changed and it has the initial value NULL. As a result the if statement is not reachable in any situation. The KASAN logs are as follows: [ 2.312969] BUG: KASAN: use-after-free in __qedf_probe+0x5dcf/0x6bc0 [ 2.312969] [ 2.312969] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.12.0-59-gc9ba5276e321-prebuilt.qemu.org 04/01/2014 [ 2.312969] Call Trace: [ 2.312969] dump_stack_lvl+0x59/0x7b [ 2.312969] print_address_description+0x7c/0x3b0 [ 2.312969] ? __qedf_probe+0x5dcf/0x6bc0 [ 2.312969] __kasan_report+0x160/0x1c0 [ 2.312969] ? __qedf_probe+0x5dcf/0x6bc0 [ 2.312969] kasan_report+0x4b/0x70 [ 2.312969] ? kobject_put+0x25d/0x290 [ 2.312969] kasan_check_range+0x2ca/0x310 [ 2.312969] __qedf_probe+0x5dcf/0x6bc0 [ 2.312969] ? selinux_kernfs_init_security+0xdc/0x5f0 [ 2.312969] ? trace_rpm_return_int_rcuidle+0x18/0x120 [ 2.312969] ? rpm_resume+0xa5c/0x16e0 [ 2.312969] ? qedf_get_generic_tlv_data+0x160/0x160 [ 2.312969] local_pci_probe+0x13c/0x1f0 [ 2.312969] pci_device_probe+0x37e/0x6c0 Link: https://lore.kernel.org/r/20211112120641.16073-1-fantasquex@gmail.com Reported-by: Zheyu Ma <zheyuma97@gmail.com> Acked-by: Saurav Kashyap <skashyap@marvell.com> Co-developed-by: Wende Tan <twd2.me@gmail.com> Signed-off-by: Wende Tan <twd2.me@gmail.com> Signed-off-by: Letu Ren <fantasquex@gmail.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-09-15soc: mediatek: Add mmsys func to adapt to dpi output for MT8186Xinlei Lee3-0/+28
Add mmsys func to manipulate dpi output format config for MT8186. Co-developed-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: Nís F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/all/1663161662-1598-2-git-send-email-xinlei.lee@mediatek.com/ Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-15soc: bcm: brcmstb: biuctrl: Avoid double of_node_put()Florian Fainelli1-1/+0
Commit 9a073d4fbb18 ("soc: bcm: brcmstb: biuctrl: Add missing of_node_put()") added what was thought to be a missing of_node_put() but now causes a double of_node_put() to be called, once from setup_hifcpubiuctrl_regs() and another time from brcmstb_biuctrl_init(). Ensure that setup_hifcpubiuctrl_regs() is not calling of_node_put() since it is not obvious it does that on one of its parameters. Fixes: 9a073d4fbb18 ("soc: bcm: brcmstb: biuctrl: Add missing of_node_put()") Reported-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Change-Id: I1c405c36c2f06c8b8c0f684143b7a52db7e809f0
2022-09-15Bluetooth: RFCOMM: Fix possible deadlock on socket shutdown/releaseLuiz Augusto von Dentz1-0/+3
Due to change to switch to use lock_sock inside rfcomm_sk_state_change the socket shutdown/release procedure can cause a deadlock: rfcomm_sock_shutdown(): lock_sock(); __rfcomm_sock_close(): rfcomm_dlc_close(): __rfcomm_dlc_close(): rfcomm_dlc_lock(); rfcomm_sk_state_change(): lock_sock(); To fix this when the call __rfcomm_sock_close is now done without holding the lock_sock since rfcomm_dlc_lock exists to protect the dlc data there is no need to use lock_sock in that code path. Link: https://lore.kernel.org/all/CAD+dNTsbuU4w+Y_P7o+VEN7BYCAbZuwZx2+tH+OTzCdcZF82YA@mail.gmail.com/ Fixes: b7ce436a5d79 ("Bluetooth: switch to lock_sock in RFCOMM") Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2022-09-15Merge branch 'arm-multiplatform-cleanup' of https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into arm/socArnd Bergmann46-242/+181
Now that everything except StrongARM is unified under CONFIG_ARCH_MULTIPLATFORM, the option is rather meaningless in its current form. Rework the Kconfig logic to make this useful again, similar to the way that RISC-V has CONFIG_NONPORTABLE (with the opposite polarity), this now controls the visibility of options that get in the way of building generic kernels, while allowing custom kernels. One side-effect is that 'randconfig' builds now rarely hit strongarm machines, rather than testing them three quarters of the time. * 'arm-multiplatform-cleanup' of https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: make ARCH_MULTIPLATFORM user-visible ARM: fix XIP_KERNEL dependencies ARM: Kconfig: clean up platform selection ARM: simplify machdirs/platdirs handling ARM: remove obsolete Makefile.boot infrastructure
2022-09-15Merge branch 'footbridge/cleanup' of https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into arm/socArnd Bergmann18-305/+70
A cleanup for the footbridge platform that came out of inspecting the platforms during the multiplatform conversion as well as the dma address patches. * 'footbridge/cleanup' of https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: footbridge: remove custom DMA address handling ARM: footbridge: move isa-dma support into footbridge ARM: footbridge: remove leftover from personal-server ARM: footbridge: remove addin mode
2022-09-15Merge tag 'arm-soc/for-6.1/maintainers' of https://github.com/Broadcom/stblinux into arm/socArnd Bergmann1-0/+1
This pull request contains Broadcom SoC MAINTAINERS file update for 6.1, please pull the following: - William merges the ARCH_BCM4908 with ARCH_BCMBCA entry * tag 'arm-soc/for-6.1/maintainers' of https://github.com/Broadcom/stblinux: MAINTAINERS: Add BCM4908 maintainer to BCMBCA entry Link: https://lore.kernel.org/r/20220915023044.2350782-5-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15Merge tag 'ffa-updates-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/driversArnd Bergmann5-67/+152
Arm FF-A firmware driver updates for v6.1 Small set of changes in preparation to add support for FF-A v1.1 specification later. It mainly contains: 1. Splitting up ffa_ops into different categories namely information, message and memory. It helps to make info and memory operations independent from ffa_device so thata generic memory management module can use it without specific ffa_dev. 2. Adds support for querying FF-A features and use the same to detect the support for 64-bit operations. 3. Adds v1.1 get_partition_info support and use the same to set up 32-bit execution mode flag automatically. 4. Adds pointer to the ffa_dev_ops in struct ffa_dev and drop ffa_dev_ops_get() which enables to drop ffa_ops in optee_ffa structure using ffa_dev->ops directly. Additionally ffa_dev_ops is renamed as ffa_ops. * tag 'ffa-updates-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_ffa: Split up ffa_ops into info, message and memory operations firmware: arm_ffa: Set up 32bit execution mode flag using partiion property firmware: arm_ffa: Add v1.1 get_partition_info support firmware: arm_ffa: Rename ffa_dev_ops as ffa_ops firmware: arm_ffa: Make memory apis ffa_device independent firmware: arm_ffa: Use FFA_FEATURES to detect if native versions are supported firmware: arm_ffa: Add support for querying FF-A features firmware: arm_ffa: Remove ffa_dev_ops_get() tee: optee: Drop ffa_ops in optee_ffa structure using ffa_dev->ops directly firmware: arm_ffa: Add pointer to the ffa_dev_ops in struct ffa_dev Link: https://lore.kernel.org/r/20220913100612.2924643-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15Merge tag 'arm-soc/for-6.1/drivers' of https://github.com/Broadcom/stblinux into arm/driversArnd Bergmann11-20/+32
This pull request contains Broadcom ARM/ARM64 SoC drivers updates for 6.1, please pull the following: - Guilherme adds a comment to the panic notifier, part of his big panic notifier rework series - William migrates all of ARCH_BCM4908 dependencies to ARCH_BCMBCA * tag 'arm-soc/for-6.1/drivers' of https://github.com/Broadcom/stblinux: arm64: bcmbca: Make BCM4908 drivers depend on ARCH_BCMBCA soc: bcm: brcmstb: Document panic notifier action and remove useless header Link: https://lore.kernel.org/r/20220915023044.2350782-4-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15Merge tag 'arm-soc/for-6.1/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann2-0/+131
This pull request contains Broadcom ARM64-based SoC changes for 6.1, please pull the following: - Rafal adds the BCM4908 LED controller node and describes all 32 LED pins, he also adds support for the Asus GC-AC5300 LEDs * tag 'arm-soc/for-6.1/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDs arm64: dts: broadcom: bcm4908: add LEDs controller block arm64: dts: broadcom: bcm4908: add remaining LED pins Link: https://lore.kernel.org/r/20220915023044.2350782-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15Merge tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann14-61/+77
This pull request contains Broadcom ARM-based SoC Device Tree updates for 6.1, please pull the following: - Rafal improves the BCM5301X PCIe DT nodes schema validation by flagging the PCIe controller with a missing "device_type" property - William merges BCM4908 within BCMBCA since this chip is part of the Broadcom Broadband Carrier Access group and follows the architecture of those chips * tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux: arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA arm64: dts: Add BCM4908 generic board dts arm64: dts: Move BCM4908 dts to bcmbca folder arm64: dts: bcmbca: update BCM4908 board dts files dt-bindings: arm64: bcmbca: Update BCM4908 description dt-bindings: arm64: bcmbca: Merge BCM4908 into BCMBCA ARM: dts: BCM5301X: Add basic PCI controller properties Link: https://lore.kernel.org/r/20220915023044.2350782-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15Merge tag 'arm-soc/for-6.1/defconfig-arm64' of https://github.com/Broadcom/stblinux into arm/defconfigArnd Bergmann1-1/+0
This pull request contains Broadcom ARM64 defconfig changes for 6.1, please pull the following: - William completes the removal of ARCH_BCM4908 by removing that Kconfig entry from the defconfig since it is being deleted after having been transitional through 6.0 * tag 'arm-soc/for-6.1/defconfig-arm64' of https://github.com/Broadcom/stblinux: arm64: defconfig: remove BCM4908 Link: https://lore.kernel.org/r/20220915023044.2350782-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15Merge tag 'at91-fixes-6.0-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixesArnd Bergmann1-2/+2
AT91 fixes for 6.0 #2 It contains a fix for LAN966 SoCs that corrects the interrupt number for internal PHYs. * tag 'at91-fixes-6.0-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: lan966x: Fix the interrupt number for internal PHYs Link: https://lore.kernel.org/r/20220915105833.4159850-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15arm64: tegra: Add GPCDMA support for Tegra I2CAkhil R3-0/+96
Add dma properties to support GPCDMA for I2C in Tegra 186 and later chips Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Add iommus for HDA on Tegra234Mohan Kumar1-0/+1
Add the iommus property to the HDA node on Tegra234. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Enable HDA node for Jetson AGX OrinMohan Kumar1-0/+1
Enable HDA node for the Jetson AGX Orin platform. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Add context isolation domains on Tegra234Mikko Perttunen1-0/+18
Add Host1x context isolation domains on Tegra234. On Tegra234 we have two IOMMUs that are connected to Host1x-channel programmed engines, so we have to include domains for each of them. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Fixup iommu-map property formattingThierry Reding2-18/+16
Make sure that each phandle-array is enclosed in a set of angular brackets and properly indent each entry. Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: dts: tegra: smaug: Add Wi-Fi nodeDiogo Ivo1-0/+19
The Google Pixel C contains a BRCM4354 Wi-Fi + BT module. Add a DT node for its Wi-Fi functionality. Tested on Pixel C. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: dts: tegra: smaug: Add Bluetooth nodeDiogo Ivo1-0/+17
The Google Pixel C contains a BRCM4354 Wi-Fi + BT module. Add a DT node for its BT functionality. Tested on Pixel C. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Enable MGBE on Jetson AGX Orin Developer KitThierry Reding1-0/+21
A Multi-Gigabit Ethernet (MGBE) instance drives the primary Ethernet port on the Jetson AGX Orin Developer Kit. Enable it. Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Add MGBE nodes on Tegra234Thierry Reding1-0/+136
Add device tree nodes for the four instances of the Multi-Gigabit Ethernet (MGBE) IP found on NVIDIA Tegra234 SoCs. Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Fix up compatible for Tegra234 GPCDMAThierry Reding1-1/+0
There is no need to list the Tegra194-specific compatible for Tegra234 because the backwards-compatibility goes back all the way to Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Enable PCIe slots in P3737-0000 boardVidya Sagar1-0/+51
Enable PCIe controller nodes to enable respective PCIe slots on P3737-0000 board. Following is the ownership of slots by different PCIe controllers. Controller-1 : On-board Broadcom WiFi controller Controller-4 : M.2 Key-M slot Controller-5 : CEM form-factor x8 slot Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DTVidya Sagar1-0/+927
Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree. The Tegra234 SoC contains 10 PCIe controllers and 24 P2U instances grouped into three different PHY bricks namely High-Speed IO (HSIO-8 P2Us) NVIDIA High Speed (NVHS-8 P2Us) and Gigabit Ethernet (GBE-8 P2Us) respectively. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15arm64: tegra: Add regulators required for PCIeVidya Sagar1-0/+36
Add regulator supplies required for PCIe functionality. The supplies include 1.8V, 3.3V and 12V. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15Merge branch 'for-6.1/dt-bindings' into for-6.1/arm64/dtThierry Reding2-0/+172
2022-09-15arm64: dts: qcom: sm8450: fix UFS PHY serdes sizeJohan Hovold1-1/+1
The size of the UFS PHY serdes register region is 0x1c4 and the corresponding 'reg' property should specifically not include the adjacent regions that are defined in the child node (e.g. tx and rx). Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220915143431.19842-2-johan+linaro@kernel.org
2022-09-15ARM: dts: qcom: apq8026-lg-lenok: Enable ADSPLuca Weiss1-0/+13
Configure the reserved memory for ADSP and enable it. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220423155059.660387-5-luca@z3ntu.xyz
2022-09-15ARM: dts: qcom: apq8026-asus-sparrow: Enable ADSPLuca Weiss1-0/+4
The customized reserved memory for ADSP is already configured, so we just need to enable the node. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220423155059.660387-4-luca@z3ntu.xyz
2022-09-15ARM: dts: qcom: msm8226: Add ADSP nodeLuca Weiss2-0/+67
Add a node for the adsp found on msm8226. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220423155059.660387-3-luca@z3ntu.xyz
2022-09-15tools/power/x86/intel-speed-select: Release v1.13Srinivas Pandruvada1-1/+1
Update version number. This version includes fixes for: - fix build failure when using gcc options -Wl,--as-needed - Fix warning for perf_cap.cpu may be uninitialized - Fix off by one check for MAX_DIE_PER_PACKAGE - Fix issue with use of get_physical_die_id instead of get_physical_die_id Optimizations: - Removed unused interfaces and functions - Better handle package, die, cpu combination by defining a struct and set at one place instead at each user level. New functional change: - Warn if turbo is disabled and SST turbo-freq feature is requested Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Optimize CPU initializationZhang Rui1-58/+38
Optimize CPU initialization. Do cpu related initialization in one function, including setting the cpu present_cpumask, target_cpumask, and cpu_map and core_count arrays. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Utilize cpu_map to get physical idZhang Rui1-11/+36
cpu_map already has the cpu package id, die id information. Thus there is no need to re-evaluating sysfs attributes or stored data file to get the package id and die id of a given CPU each time. In order to unitlize this, cpu_map needs to be created unconditionally. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Remove unused struct clos_config fieldsZhang Rui3-8/+0
pkg_id/die_id can be retrieved from struct isst_id, remove the redundant clos_config->pkg_id/die_id fields. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Enforce isst_id valueZhang Rui2-4/+10
Enforce the pkg/die value in struct isst_id are either -1 or a valid value. This helps avoid inconsistent or redundant checks. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Do not export get_physical_idZhang Rui2-5/+3
Now, all the get_physical_pkg/die/core_id() users are inside isst-config.c, so no need to export these APIs. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Introduce is_cpu_in_power_domain helperZhang Rui3-21/+25
struct isst_id contains cpu, package and die info, and it can represent a specific SST power domain. Introduce is_cpu_in_power_domain() helper to identify if a cpu is in a specified power_domain. And cleanup the code to use the new helper. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Cleanup get_physical_id usageZhang Rui4-68/+43
struct isst_id already contains package and die id information, thus there is no need to get the package and die id information, when struct isst_id is already available. Remove unneeded get_physical_package_id/get_physical_die_id usage. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Convert more function to use isst_idZhang Rui4-11/+10
With pkg and die info added into struct isst_id, more functions can be converted to use struct isst_id as parameter. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Add pkg and die in isst_idZhang Rui2-0/+4
Code uses pkg_id and die_id to refer to a specific power domain. The pkg/die information is already settled at start time. Adding package id and die id information into struct isst_id so that code does not need to retrieve them at runtime. More code cleanups can be done with the package/die info available. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Introduce struct isst_idZhang Rui6-368/+396
SST control is power-domain based rather than cpu based, on all the systems including Sapphire Rapids and ealier. SST core APIs uses cpu id as parameter, and use the underlying pkg_id and die_id information to find a power domain, this is not straight forward and introduces obscure logics in the code. Introduce struct isst_id to represent a SST Power Domain. All core APIs are converted to use struct isst_id as parameter instead of using cpu id. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Remove unused core_mask arrayZhang Rui1-6/+1
Remove unused core_mask array. Reviewed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15tools/power/x86/intel-speed-select: Remove dead codeZhang Rui3-43/+0
Remove dead code. Not functional change in this patch Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2022-09-15mailbox: apple: Implement poll_data() operationHector Martin1-3/+33
This allows clients running in atomic context to poll for messages to arrive. Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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