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2022-09-13xtensa: add FDPIC and static PIE support for noMMUMax Filippov4-1/+19
Define ELFOSABI_XTENSA_FDPIC and use it as an OSABI tag in the ELF header to distinguish FDPIC ELF files from regular ELF files. Define ELF_FDPIC_PLAT_INIT and put executable map, interpreter map and executable dynamic section addresses into registers a4..a6. Update start_thread macro to preserve register values in the current register window. Add definitions for PTRACE_GETFDPIC, PTRACE_GETFDPIC_EXEC and PTRACE_GETFDPIC_INTERP. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-09-13xtensa: clean up ELF_PLAT_INIT macroMax Filippov1-4/+9
Wrap _r in parentheses in the macro body. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-09-13ARM: dts: qcom: msm8226: switch TCSR mutex to MMIOKrzysztof Kozlowski1-10/+4
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'reg' is a required property qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-16-krzysztof.kozlowski@linaro.org
2022-09-13ARM: dts: qcom: apq8084: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom-apq8084-mtp.dtb: hwlock: 'reg' is a required property qcom-apq8084-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-15-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: msm8994: switch TCSR mutex to MMIOKrzysztof Kozlowski1-9/+4
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'reg' is a required property qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-13-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIOKrzysztof Kozlowski1-9/+4
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/ipq6018-cp01-c1.dtb: hwlock: 'reg' is a required property qcom/ipq6018-cp01-c1.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-12-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: msm8996: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-9-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: qcs404: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-8-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: msm8953: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-7-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: ipq6018: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-6-krzysztof.kozlowski@linaro.org
2022-09-13drm/i915: Skip applying copy engine fusesLucas De Marchi1-0/+4
Support for reading the fuses to check what are the Link Copy engines was added in commit ad5f74f34201 ("drm/i915/pvc: read fuses for link copy engines"). However they were added unconditionally because the FUSE3 register is present since graphics version 10. However the bitfield with meml3 fuses only exists since graphics version 12. Moreover, Link Copy engines are currently only available in PVC. Tying additional copy engines to the meml3 fuses is not correct for other platforms. Make sure there is a check for `12.60 <= ver < 12.70`. Later platforms may extend this function later if it's needed to fuse off copy engines. Currently it's harmless as the Link Copy engines are still not exported: info->engine_mask only has BCS0 set and the register is only read for platforms that do have it. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220912-copy-engine-v1-1-ef92fd81758d@intel.com
2022-09-13hwspinlock: qcom: add support for MMIO on older SoCsKrzysztof Kozlowski1-10/+32
Older Qualcomm SoCs have TCSR mutex registers with 0x80 stride, instead of 0x1000. Add dedicated compatibles and regmap for such case. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-5-krzysztof.kozlowski@linaro.org
2022-09-13hwspinlock: qcom: correct MMIO max register for newer SoCsKrzysztof Kozlowski1-1/+1
Newer ARMv8 Qualcomm SoCs using 0x1000 register stride have maximum register 0x20000 (32 mutexes * 0x1000). Fixes: 7a1e6fb1c606 ("hwspinlock: qcom: Allow mmio usage in addition to syscon") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-4-krzysztof.kozlowski@linaro.org
2022-09-13dt-bindings: hwlock: qcom-hwspinlock: correct example indentationKrzysztof Kozlowski1-5/+5
Use some consistent indentation (4-space) for DTS example. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-3-krzysztof.kozlowski@linaro.org
2022-09-13dt-bindings: hwlock: qcom-hwspinlock: add support for MMIO on older SoCsKrzysztof Kozlowski1-3/+12
Older Qualcomm SoCs have TCSR mutex registers with 0x80 stride, instead of 0x1000. Add dedicated compatibles for such case. Unfortunately the binding started using a generic "qcom,tcsr-mutex" compatible without specifying the SoC part, thus it looks now quite inconsistent. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-2-krzysztof.kozlowski@linaro.org
2022-09-13clk: qcom: a53-pll: convert to use parent_data rather than parent_namesDmitry Baryshkov1-1/+3
Change a53-pll driver to use clk_parent_data rather than always looking up the xo clock in the system clock list. Note, this change also switches the a53-pll from the global `xo' clock to the `xo_board', the clock that is specified as the `xo' clock in the DT file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909103137.3727830-1-dmitry.baryshkov@linaro.org
2022-09-13ARM: dts: qcom: msm8660: fix node names for fixed clocksDmitry Baryshkov1-3/+6
Fix node names for three fixed clocks to follow the no-underscores-in-name rule. To remain compatible with the drivers expecting to find the old clock names, add clock-output-names properties. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909105136.3733919-6-dmitry.baryshkov@linaro.org
2022-09-13ARM: dts: qcom: msm8660: add pxo/cxo clocks to the GCC nodeDmitry Baryshkov1-1/+3
Add pxo/cxo clocks to the GCC device tree node. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909105136.3733919-5-dmitry.baryshkov@linaro.org
2022-09-13clk: qcom: gcc-msm8660: use parent_hws/_data instead of parent_namesDmitry Baryshkov1-100/+164
Convert the clock driver to specify parent data rather than parent names, to actually bind using 'clock-names' specified in the DTS rather than global clock names. Use parent_hws where possible to refer parent clocks directly, skipping the lookup. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909105136.3733919-4-dmitry.baryshkov@linaro.org
2022-09-13clk: qcom: gcc-msm8660: use ARRAY_SIZE instead of specifying num_parentsDmitry Baryshkov1-41/+41
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909105136.3733919-3-dmitry.baryshkov@linaro.org
2022-09-13dt-bindings: clock: qcom,gcc-msm8660: separate GCC bindings for MSM8660Dmitry Baryshkov2-3/+54
Create a separate DT bindings for Global Clock Controller on MSM8660 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909105136.3733919-2-dmitry.baryshkov@linaro.org
2022-09-13clk: qcom: sm6115: Select QCOM_GDSCDang Huynh1-0/+1
While working on the Fxtec Pro1X device, this error shows up with my own minimal configuration: gcc-sm6115: probe of 1400000.clock-controller failed with error -38 The clock driver depends on CONFIG_QCOM_GDSC and after enabling that, the driver probes successfully. Signed-off-by: Dang Huynh <danct12@riseup.net> Fixes: cbe63bfdc54f ("clk: qcom: Add Global Clock controller (GCC) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220910170207.1592220-1-danct12@riseup.net
2022-09-13block: blk_queue_enter() / __bio_queue_enter() must return -EAGAIN for nowaitStefan Roesch1-2/+2
Today blk_queue_enter() and __bio_queue_enter() return -EBUSY for the nowait code path. This is not correct: they should return -EAGAIN instead. This problem was detected by fio. The following command exposed the above problem: t/io_uring -p0 -d128 -b4096 -s32 -c32 -F1 -B0 -R0 -X1 -n24 -P1 -u1 -O0 /dev/ng0n1 By applying the patch, the retry case is handled correctly in the slow path. Signed-off-by: Stefan Roesch <shr@fb.com> Fixes: bfd343aa1718 ("blk-mq: don't wait in blk_mq_queue_enter() if __GFP_WAIT isn't set") Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-09-13firmware: qcom: scm: remove unused __qcom_scm_init declarationGaosheng Cui1-2/+0
__qcom_scm_init has been removed since commit 9a434cee773a ("firmware: qcom_scm: Dynamically support SMCCC and legacy conventions"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220911092912.3219132-1-cuigaosheng1@huawei.com
2022-09-13dt-bindings: power: qcom,rpmpd: drop non-working codeaurora.org emailsKrzysztof Kozlowski1-1/+1
Emails to codeaurora.org bounce ("Recipient address rejected: undeliverable address: No such user here."). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220911112508.202995-1-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-namesKrzysztof Kozlowski1-2/+0
There are 174 GPIOs in SC7280. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-41-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schemaKrzysztof Kozlowski5-201/+201
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-40-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schemaKrzysztof Kozlowski2-82/+82
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-39-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schemaKrzysztof Kozlowski2-23/+23
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-38-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm8350-sagami: correct TS pin propertyKrzysztof Kozlowski1-1/+1
The pin configuration is selected with "pins", not "pin" property. Fixes: 1209e9246632 ("arm64: dts: qcom: sm8350-sagami: Enable and populate I2C/SPI nodes") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-37-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schemaKrzysztof Kozlowski1-7/+7
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-36-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schemaKrzysztof Kozlowski2-7/+7
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-35-krzysztof.kozlowski@linaro.org
2022-09-13drm/amd/pm: remove unused declarations in hardwaremanager.hGaosheng Cui1-2/+0
phm_is_hw_access_blocked() and phm_block_hw_access() has been removed since commit 698f88e697cc ("drm/amd/powerplay: delete dead code in powerplay"), so remove them. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-6-cuigaosheng1@huawei.com
2022-09-13drm/gma500: remove unused declarations in psb_intel_drv.hGaosheng Cui1-5/+0
psb_intel_sdvo_supports_hotplug(), psb_intel_sdvo_set_hotplug() and psb_intel_sdvo_find() have been removed since commit 871c60156dbe ("drm/gma500: Remove dead code"), so remove them. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-5-cuigaosheng1@huawei.com
2022-09-13drm/radeon: remove unused declarations for radeonGaosheng Cui2-4/+0
radeon_combios_get_ext_tmds_info() has been removed since commit fcec570b27a4 ("drm/radeon/kms: add support for external tmds on legacy boards"). radeon_mst has been removed since commit 01ad1d9c2888 ("drm/radeon: Drop legacy MST support"). r600_hdmi_acr() has been removed since commit 64424d6e45ae ("radeon/audio: consolidate update_acr() functions (v2)"). So remove the declarations for them from header file. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-4-cuigaosheng1@huawei.com
2022-09-13drm/radeon/r600_cs: remove r600_cs_legacy_get_tiling_conf() declarationGaosheng Cui1-2/+0
r600_cs_legacy_get_tiling_conf() has been removed since commit 8333f607a631 ("drm/radeon: remove UMS support"), so remove it. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-3-cuigaosheng1@huawei.com
2022-09-13drm/vmwgfx: remove unused vmw_bo_is_vmw_bo() declarationGaosheng Cui1-1/+0
vmw_bo_is_vmw_bo() has been removed since commit 298799a28264 ("drm/vmwgfx: Fix gem refcounting and memory evictions"), so remove it. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-2-cuigaosheng1@huawei.com
2022-09-13drm/amd/display/amdgpu_dm: remove duplicate included header filesXu Panda1-2/+0
soc15_common.h is included more than once. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Xu Panda <xu.panda@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amd/display: Remove the unused function copy_stream_update_to_stream()Jiapeng Chong1-10/+0
The function copy_stream_update_to_stream() is defined in the notif.c file, but not called elsewhere, so delete this unused function. drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:2852:6: warning: no previous prototype for ‘dc_reset_state’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2113 Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amd/display: make mpc32_program_shaper and mpc32_program_3dlut staticJiapeng Chong1-2/+2
These two functions are not used outside the function dcn32_mpc.c, so the modification is defined as static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:704:6: warning: no previous prototype for ‘mpc32_program_shaper’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:900:6: warning: no previous prototype for ‘mpc32_program_3dlut’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2115 Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amd/display: make dcn32_link_encoder_is_in_alt_mode and dcn32_link_encoder_get_max_link_cap staticJiapeng Chong1-2/+2
These two functions are not used outside the function dcn32_dio_link_encoder.c, so the modification is defined as static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dio_link_encoder.c:121:6: warning: no previous prototype for ‘dcn32_link_encoder_is_in_alt_mode’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dio_link_encoder.c:136:6: warning: no previous prototype for ‘dcn32_link_encoder_get_max_link_cap’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2117 Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amd/display: make dscl32_calc_lb_num_partitions staticJiapeng Chong1-1/+1
This symbol is not used outside of dcn32_dpp.c, so marks it static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dpp.c:34:6: warning: no previous prototype for ‘dscl32_calc_lb_num_partitions’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2118 Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amd/display: make enc32_stream_encoder_dvi_set_stream_attribute staticJiapeng Chong1-1/+1
This symbol is not used outside of dcn32_dio_stream_encoder.c, so marks it static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dio_stream_encoder.c:63:6: warning: no previous prototype for ‘enc32_stream_encoder_dvi_set_stream_attribute’. Link:https://bugzilla.openanolis.cn/show_bug.cgi?id=2119 Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amdgpu: Fix memory leak in hpd_rx_irq_create_workqueue()Rafael Mendonca1-1/+9
If construction of the array of work queues to handle hpd_rx_irq offload work fails, we need to unwind. Destroy all the created workqueues and the allocated memory for the hpd_rx_irq_offload_work_queue struct array. Fixes: 8e794421bc98 ("drm/amd/display: Fork thread to offload work of hpd_rx_irq") Signed-off-by: Rafael Mendonca <rafaelmendsr@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amdgpu: fix warning about missing imu prototypeAlex Deucher1-0/+1
for imu_v11_0_3_program_rlc_ram(). Include imu_v11_0_3.h in imu_v11_0_3.c. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amdgpu: reorder CS codeChristian König1-336/+338
Sort the functions in the order they are called Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amdgpu: cleanup CS init/fini and pass1Christian König1-93/+104
Cleanup the coding style and function names to represent the data they process. Only initialize and cleanup the CS structure in init/fini. Check the size of the IB chunk in pass1. v2: fix job initialisation order and use correct scheduler instance v3: try to move all functional changes into a separate patch. v4: move reordering and pass2 out of this patch as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amdgpu: use DMA_RESV_USAGE_BOOKKEEP v2Christian König2-11/+18
Use DMA_RESV_USAGE_BOOKKEEP for VM page table updates and KFD preemption fence. v2: actually update all usages for KFD Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amdgpu: revert "partial revert "remove ctx->lock" v2"Christian König3-18/+6
This reverts commit 94f4c4965e5513ba624488f4b601d6b385635aec. We found that the bo_list is missing a protection for its list entries. Since that is fixed now this workaround can be removed again. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13drm/amdgpu: move setting the job resourcesChristian König3-19/+21
Move setting the job resources into amdgpu_job.c Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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