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2018-12-11drm/msm: dpu: Only check flush register against pending flushesSean Paul1-1/+1
There exists a case where a flush of a plane/dma may have been triggered & started from an async commit. If that plane/dma is subsequently disabled by the next commit, the flush register will continue to hold the flush bit for the disabled plane. Since the bit remains active, pending_kickoff_cnt will never decrement and we'll miss frame_done events. This patch limits the check of flush_register to include only those bits which have been updated with the latest commit. Changes in v2: - None Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Correct dpu destroy and disable orderJayant Shekhar1-4/+1
In case of msm drm bind failure, dpu_mdss_destroy is triggered. In this function, resources are freed and pm runtime disable is called, which triggers dpu_mdss_disable. Now in dpu_mdss_disable, driver tries to access a memory which is already freed. This results in kernel panic. Fix this by ensuring proper sequence of dpu destroy and disable calls. Changes in v2: - Removed double spacings [Jeykumar] Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driverAbhinav Kumar1-4/+4
Fix the dsi clock names in the DSI 10nm PLL driver to match the names in the dispcc driver as those are according to the clock plan of the chipset. Changes in v2: - Update the clock diagram with the new clock name Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: set priv->kms to NULL before uninitJonathan Marek1-0/+1
otherwise, priv->kms is non-NULL and msm_drm_uninit will cause a panic. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/mdp5: add config for msm8917Jonathan Marek1-0/+86
Add the mdp5_cfg_hw entry for MDP5 version v1.15 found on msm8917. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/adreno: add a2xxJonathan Marek6-8/+539
derived from the a3xx driver and tested on the following hardware: imx51-zii-rdu1 (a200 with 128kb gmem) imx53-qsrb (a200) msm8060-tenderloin (a220) Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: use contiguous vram for MSM_BO_SCANOUT when possibleJonathan Marek1-1/+1
Makes it possible to have MMU for GPU but not display. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/mdp4: allocate blank_cursor_no with MSM_BO_SCANOUT flagJonathan Marek1-1/+1
For allocation in contiguous memory when the GPU has MMU but not mdp4. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/mdp4: only use lut_clk on mdp4.2+Jonathan Marek1-9/+13
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: bump UAPI versionRob Clark1-1/+3
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: add uapi to get/set debug nameRob Clark2-1/+37
Add UAPI to get/set GEM objects' debug name. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: rework GEM_INFO ioctlRob Clark2-14/+32
Prep work to add a way to get/set the GEM objects debug name. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/gpu: add submit flag to hint which buffers should be dumpedRob Clark3-5/+18
To lower CPU overhead, future userspace will be switching to pinning iova and avoiding the use of relocs, and only include cmds table entries for IB1 level cmdstream (but not IB2 or state-groups). This leaves the kernel unsure what to dump for rd/hangrd cmdstream dumping. So add a MSM_SUBMIT_BO_DUMP flag so userspace can indicate buffers that contain cmdstream (or are otherwise important to dump). Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Optimize adreno_show_object()Sharat Masetty2-21/+63
When the userspace tries to read the crashstate dump, the read side implementation in the driver currently ascii85 encodes all the binary buffers and it does this each time the read system call is called. A userspace tool like cat typically does a page by page read and the number of read calls depends on the size of the data captured by the driver. This is certainly not desirable and does not scale well with large captures. This patch encodes the buffer only once in the read path. With this there is an immediate >10X speed improvement in crashstate save time. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/gpu: Map the ringbuffer in the iova at create timeJordan Crouse2-11/+2
For reasons that I'm sure made perfect sense at the time we were opting to defer the iova alloc / pin on the ringbuffer until HW init time so when we moved to iova reference counting we ended up adding a reference count every time the hardware started. Not that it mattered (because the ring is always around) but it did make the debug output look odd. Allocate and pin the iova at create time instead. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Add a name field for gem objectsJordan Crouse12-6/+50
For debugging purposes it is useful to assign descriptions to buffers so that we know what they are used for. Add a field to the buffer object and use that to name the various kernel side allocations which ends up looking like like this in /d/dri/X/gem: flags id ref offset kaddr size madv name 00040000: I 0 ( 1) 00000000 0000000070b79eca 00004096 memptrs vmas: [gpu: 01000000,mapped,inuse=1] 00020000: I 0 ( 1) 00000000 0000000031ed4074 00032768 ring0 Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Count how many times iova memory is pinnedJordan Crouse15-49/+88
Add a reference count to track how many times a particular chunk of iova memory is pinned (mapped) in the iomu and add msm_gem_unpin_iova to give up references. It is important to note that msm_gem_unpin_iova replaces msm_gem_put_iova because the new implicit behavior that an assigned iova in a given vma is now valid for the life of the buffer and what we are really focusing on is the use of that iova. For now the unmappings are lazy; once the reference counts go to zero they *COULD* be unmapped dynamically but that will require an outside force such as a shrinker or mm_notifiers. For now, we're just focusing on getting the counting right and setting ourselves up to be ready for the future. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Add msm_gem_get_and_pin_iova()Jordan Crouse12-15/+36
Add a new function to get and pin the iova memory in one step (basically renaming the old msm_gem_get_iova function) and switch msm_gem_get_iova() to only allocate an iova but not map it in the IOMMU. This is only currently used by msm_ioctl_gem_info() since all other users of of the iova expect that the memory be immediately available. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Clean up and enhance the output of the 'gem' debugfs nodeJordan Crouse1-6/+14
Add headers for the 'gem' debugfs file to make it easier to remember what all the values mean and move the list of virtual address regions to the next line and add the name and map status to make it clearer what we are looking at. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Split msm_gem_get_iova into two stepsJordan Crouse4-41/+86
Split the operation of msm_gem_get_iova into two operations: 1) allocate an iova and 2) map (pin) the backing memory int the iommu. This is the first step toward allowing memory pinning to occur independently of the iova management. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Remove sgt from the mmu unmap functionJordan Crouse5-8/+6
The scatter gather table doesn't need to be passed in for the MMU unmap function. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Add a common function to free kernel buffer objectsJordan Crouse7-50/+26
Buffer objects allocated with msm_gem_kernel_new() are mostly freed the same way so we can save a few lines of code with a common function. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/a6xx: Track and manage a6xx state memoryJordan Crouse1-90/+102
The a6xx GPU state allocates a LOT of memory. Add a bit of infrastructure to track the memory allocations in the GPU structure and delete them when the state is destroyed much the same way that devm works with the device model as a whole. This protects against the developer accidentally forgetting to add a kfree() to an ever growing list. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/a6xx: Add a6xx gpu stateJordan Crouse7-38/+1627
Add support for gathering and dumping the a6xx GPU state including registers, GMU registers, indexed registers, shader blocks, context clusters and debugbus. v2: Fix bugs discovered by Sharat Masetty Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/adreno: Don't capture register values if target doesn't define themJordan Crouse1-5/+14
If the GPU target doesn't define a list of registers then gracefully skip capturing and/or printing them. This is used by more complex targets like 6xx that have other means of capturing register values. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/gpu: Move gpu_poll_timeout() to adreno_gpu.hJordan Crouse2-5/+6
The gpu_poll_timeout() function can be useful to multiple targets so mvoe it into adreno_gpu.h from the a5xx code. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/gpu: Only store local command buffers in the GPU stateJordan Crouse1-10/+13
Instead of trying to store all the tagged buffers from a hanging submit only store the command buffers that were not imported. This cuts down on the amount of data stored in the GPU state to the base minimum of useful information. The downside is that this will make it more difficult to successfully replay a hang with just the GPU state but there isn't any reason why that functionality can't be added back in later once we've figured out how to better communicate such massive amounts of data. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/gpu: Add trace events for tracking GPU submissionsJordan Crouse7-6/+139
Add trace events to track the progress of a GPU submission msm_gpu_submit occurs at the beginning of the submissions, msm_gpu_submit_flush happens when the submission is put on the ringbuffer and msm_submit_flush_retired is sent when the operation is retired. To make it easier to track the operations a unique sequence number is assigned to each submission and displayed in each event output so a human or a script can easily associate the events related to a specific submission. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/gpu: Add per-submission statisticsJordan Crouse3-16/+54
Add infrastructure to track statistics for GPU submissions by sampling certain perfcounters before and after a submission. To store the statistics, the per-ring memptrs region is expanded to include room for up to 64 entries - this should cover a reasonable amount of inflight submissions without worrying about losing data. The target specific code inserts PM4 commands to sample the counters before and after submission and store them in the data region. The CPU can access the data after the submission retires to make sense of the statistics and communicate them to the user. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Gracefully handle failure in _msm_gem_kernel_newJordan Crouse1-6/+12
If any of the function calls in _msm_gem_kernel_new fail we need to make sure to dereference the GEM object with the appropriate function for the current locking state. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/gpu: Allocate the correct size for the GPU memptrsJordan Crouse1-1/+2
Allocate the correct buffer size for the GPU memptrs. The incorrect size hasn't affected us thus far since the incorrect size was larger than the intended size and we're still stuck on page sized granularity anyway but technically correct is the best kind of correct. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: update generated headersRob Clark8-45/+408
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: set geometry for iommu domainJeykumar Sankaran1-0/+3
Specify geometry for DPU iommu domain which sets the address space for gem allocations. Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Suggested-by: Jordan Crouse <jcrouse@codeaurora.org> Suggested-by: Vivek Gautam <vivek.gautam@codeaurora.org> Acked-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm: msm: Use DRM_DEV_* instead of dev_*Mamta Shukla52-310/+313
Use DRM_DEV_INFO/ERROR/WARN instead of dev_info/err/debug to generate drm-formatted specific log messages so that it will be easy to differentiate in case of multiple instances of driver. Signed-off-by: Mamta Shukla <mamtashukla555@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Remove checks from dpu_plane_destroy_state()Sean Paul1-12/+1
They're not needed. Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Clean up _dpu_core_video_mode_intf_connected()Sean Paul1-7/+2
Local variable is not needed and condition can't be hit. Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Remove empty/useless labelsSean Paul7-28/+15
I noticed an empty label while driving by and decided to use coccinelle to see if there were any more. Here's the spatch and the invocation: --- @@ identifier lbl; expression E; @@ - goto lbl; + return E; ... - lbl: return E; @@ identifier lbl; @@ - goto lbl; + return; ... - lbl: - return; --- spatch --allow-inconsistent-paths --sp-file file.spatch --dir drivers/gpu/drm/msm/disp/dpu1 --in-place --- Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Remove 'inline' from several functionsSean Paul9-47/+29
Per chapter 15 of coding-style, removing 'inline' keyword from functions that are larger than a typical macro. In a couple of cases I've simplified the function and kept the inline. Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Remove _dpu_encoder_power_enable()Sean Paul1-33/+0
It's unused, remove it. Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Remove unused functions from msm_media_info.hSean Paul1-171/+0
These functions aren't used anywhere, remove them. Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Remove dpu_encoder_phys_ops->hw_reset()Sean Paul4-18/+2
We call out of the virt encoder into phys only to call back into the virt for hw reset. So remove the indirection and just call the virt function directly. Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Replace dpu_crtc_reset by atomic helperBruce Wang1-38/+1
Since we removed all suspend logic from the crtc code (see patch 3/4), dpu_crtc_reset does the same things as drm_atomic_helper_crtc_reset, so let's just replace it with a call to the atomic helper. v3: added patch to patchset Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Remove suspend state tracking from crtcBruce Wang4-75/+6
Since drm core's modeset locks serialize atomic commits, we don't need to track whether or not we're in a suspended state from inside the crtc for dpu_crtc_enable/disable. This patch removes the suspend logic from the crtc and removes the relevant tracing from dpu_trace. Since we removed all calls to dpu_kms_is_suspend_state, we can remove that function and the suspend_state field of dpu_kms as well. v2: added patch to patchset v3: reworded commit body and moved deletion of dpu_kms_is_suspend_state and suspend_state to this patch Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Cut dpu_kms hooks from msm_pm_suspend/resumeBruce Wang2-18/+12
Removes the traces of the non-atomic helper calls in msm_pm_suspend/resume since we just deleted those functions (see patch 1). Also removes the drm_kms_helper_poll_disable/enable calls, since the DRM_CONNECTOR_POLL_CONNECT flag is never set so periodic polling doesn't happen anyways. v2: reorganized patch order v3: made error checks less severe Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Remove dpu_kms_pm_suspend/resumeBruce Wang2-138/+0
PM resume was crashing during dpu_kms_pm_resume. This patch removes dpu_kms_pm_suspend/resume so that msm_pm_suspend/resume uses the atomic helpers instead (see next patch). This patch also removes dpu_kms_is_suspend_blocked since it is never called. v2: Reorganized patches in patchset Signed-off-by: Bruce Wang <bzwang@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Add tracing around CTL_FLUSHSean Paul2-8/+65
I found these tracepoints useful for debugging cursor/ctl, someone else might find them useful too Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm: Fix docs warning in drm_damage_helper.cDeepak Rawat1-1/+1
Modify description to match actual argument list. Signed-off-by: Deepak Rawat <drawat@vmware.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2018-12-11drm/selftest: fix spelling mistake "dimention" -> "dimension"Colin Ian King1-1/+1
There is a spelling mistake in a pr_err message, fix this. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2018-12-11drm/nouveau/ce/tu106: initial supportBen Skeggs1-0/+5
Appears to be compatible with TU104. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11drm/nouveau/fifo/tu106: initial supportBen Skeggs1-0/+1
Appears to be compatible with TU104. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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