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This patch allows to set independantly SCL and SDA falling times.
The tLOW period is computed by taking into account the SCL falling time.
The tHIGH period is computed by taking into account the SDA falling time.
For instance in case the margin on tLOW is considered too small, it can
be increased by increasing the SCL falling time which is by default set
at 300ns.
The same applies for tHIGH period with the help of SDA falling time.
Signed-off-by: Romain Baeriswyl <romainba@abilis.com>
Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>
Acked-by: Shinya Kuribayashi <skuribay@pobox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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This patch makes the SDA hold time configurable through device tree.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Add of_match_table and DT style i2c registration to designware i2c
driver.
Refactored for pci/plat split by Dirk Brandewie.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
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Romain Baeriswyl
Christian Ruppert
Rob Herring