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2018-10-08dt-bindings: mmc: Add DQS trim value to Tegra SDHCIAapo Vienamo1-0/+4
Document HS400 DQS trim value device tree property. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08dt-bindings: mmc: Add Tegra SDHCI sampling trimmer valuesAapo Vienamo1-0/+11
Document the Tegra SDHCI inbound and outbound sampling trimmer values. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08dt-bindings: Add Tegra SDHCI pad pdpu offset bindingsAapo Vienamo1-0/+35
Add bindings documentation for pad pull up and pull down offset values to be programmed before executing automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08dt-bindings: mmc: tegra: Add pad voltage control propertiesAapo Vienamo1-0/+22
Document the pinctrl bindings used by the SDHCI driver to reconfigure pad voltages on controllers supporting multiple voltage levels. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24dt-bindings: mmc: tegra: Document Tegra186 compatible stringThierry Reding1-0/+1
The SDHCI controller found on Tegra186 in very similar to the controller found on earlier generations of Tegra. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24dt-bindings: mmc: tegra: Reformat compatible string listThierry Reding1-5/+6
The list of compatible strings is somewhat difficult to read and extend. Reformat it into a list to make it more easily extensible. While at it, also remove the "plus one of the above" clause because it isn't actually valid. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-02-03Documentation: DT bindings: add more Tegra chip compatible stringsPaul Walmsley1-1/+5
Align compatible strings for several IP blocks present on Tegra chips with the latest doctrine from the DT maintainers: http://marc.info/?l=devicetree&m=142255654213019&w=2 The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 DT binding text files have been updated for the following IP blocks: - PCIe - SOR - SoC timers - AHB "gizmo" - APB_MISC - pinmux control - UART - PWM - I2C - SPI - RTC - PMC - eFuse - AHCI - HDA - XUSB_PADCTRL - SDHCI - SOC_THERM - AHUB - I2S - EHCI - USB PHY N.B. The nvidia,tegra20-timer compatible string is removed from the nvidia,tegra30-timer.txt documentation file because it's already mentioned in the nvidia,tegra20-timer.txt documentation file. This second version takes into account the following requests from Rob Herring <robherring2@gmail.com>: - Per-IP block patches have been combined into a single patch - Explicit documentation about which compatible strings are actually matched by the driver has been removed. In its place is implicit documentation that loosely follows Rob's prescribed format: "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ..." [...] "You should attempt to document known values of <chip> if you use it" Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dylan Reid <dgreid@chromium.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Jingchang Lu <jingchang.lu@freescale.com> Cc: John Crispin <blogic@openwrt.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Takashi Iwai <tiwai@suse.de> Cc: Tejun Heo <tj@kernel.org> Cc: "Terje Bergström" <tbergstrom@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Zhang Rui <rui.zhang@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-i2c@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-pwm@vger.kernel.org Cc: linux-tegra@vger.kernel.org Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2013-12-11ARM: tegra: document reset properties in DT bindingsStephen Warren1-0/+6
Update all the Tegra DT bindings to require resets/reset-names properties where the HW module has reset inputs. Remove any entries from clocks or clock-names that were only required to identify reset inputs, rather than referring to real clocks. This is a DT-ABI-incompatible change. It is the first of two changes required for me to consider the Tegra DT bindings as stable, the other being conversion to the common DMA DT bindings. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
2013-12-11ARM: tegra: add missing clock documentation to DT bindingsStephen Warren1-0/+3
Many of the Tegra DT binding documents say nothing about the clocks or clock-names properties, yet those are present and required in DT files. This patch simply updates the documentation file to match the implicit definition of the binding, based on real-world DT content. All Tegra bindings that mention clocks are updated to have consistent wording and formatting of the clock-related properties. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
2012-07-23Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-0/+25
Pull general arm-soc cleanups from Arnd Bergmann: "These are all boring changes, moving stuff around or renaming things mostly, and also getting rid of stuff that is duplicate or should not be there to start with. Platform-wise this is all over the place, mainly omap, samsung, at91, imx and tegra." Resolve trivial conflict in arch/arm/mach-omap2/clockdomains3xxx_data.c * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits) ARM: clps711x: Remove the setting of the time ARM: clps711x: Removed superfluous transform virt_to_bus and related functions ARM: clps711x/p720t: Replace __initcall by .init_early call ARM: S3C24XX: Remove unused GPIO definitions for Openmoko GTA02 board ARM: S3C24XX: Remove unused GPIO definitions for port J ARM: S3C24XX: Remove unused GPA, GPE, GPH bank GPIO aliases ARM: S3C24XX: Convert the touchscreen setup code to common GPIO API ARM: S3C24XX: Convert the PM code to gpiolib API ARM: S3C24XX: Convert QT2410 board file to the gpiolib API ARM: S3C24XX: Convert SMDK board file to the gpiolib API ARM: S3C24XX: Free the backlight gpio requested in Mini2440 board code ARM: imx: remove unused pdata from device macros ARM: imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX_SSI from MACH_MX25_3DS ARM: at91: fix new build errors ARM: at91: add AIC5 support ARM: at91: remove mach/irqs.h ARM: at91: sparse irq support ARM: at91: at91 based machines specify their own irq handler at run time ARM: at91: remove static irq priorities for sam9x5 ARM: at91: add of irq priorities support ...
2012-06-11dt: name all Tegra binding docs consistentlyStephen Warren1-0/+27
Rename all Tegra binding documentation according to the first or primary compatible value they describe. This provides a clear naming scheme for the files, and prevents any naming conflicts should future SoC versions require their own binding. Signed-off-by: Stephen Warren <swarren@nvidia.com>