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Update device-tree binding with fixed-link support.
With fixed-link support the formerly required property 'phy-handle'
is now optional if 'fixed-link' child is present.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Make MDIO child optional and only instantiate the
MDIO bus if the child is actually present.
There are currently no (in-tree) users of this
binding; all (out-of-tree) users use overlays that
get shipped together with the FPGA images that contain
the IP.
This will significantly increase maintainabilty
of future revisions of this IP.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Now the DMA engine is free to float elsewhere in the system map.
Signed-off-by: Alex Williams <alex.williams@ni.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add devicetree binding to support the compatible mt7530 switch as used
in the MediaTek MT7621 SoC.
Signed-off-by: Greg Ungerer <gerg@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add support for Qualcomm ethqos found in some SoCs like QCS404.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Switch bindings for spi managed mode are using spaces instead of tabs.
Fix them to get a file with a proper kernel indentation style.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Pull ARM Device-tree updates from Olof Johansson:
"As usual, this is where the bulk of our changes end up landing each
merge window.
The individual updates are too many to enumerate, many many platforms
have seen additions of device descriptions such that they are
functionally more complete (in fact, this is often the bulk of updates
we see).
Instead I've mostly focused on highlighting the new platforms below as
they are introduced. Sometimes the introduction is of mostly a
fragment, that later gets filled in on later releases, and in some
cases it's near-complete platform support. The latter is more common
for derivative platforms that already has similar support in-tree.
Two SoCs are slight outliers from the usual range of additions.
Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping
in the Lychee Pi Nano platform. At the other end is NXP Layerscape
LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O
aimed at infrastructure/networking.
TI updates stick out in the diff stats too, in particular because they
have moved the description of their L4 on-chip interconnect to
devicetree, which opens up for removal of even more of their
platform-specific 'hwmod' description tables over the next few
releases.
SoCs:
- Qualcomm QCS404 (4x Cortex-A53)
- Allwinner T3 (rebranded R40) and f1c100s (armv5)
- NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
- NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)
New platforms:
- Rockchip: Gru Scarlet (RK3188 Tablet)
- Amlogic: Phicomm N1 (S905D), Libretech S805-AC
- Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
- Qualcomm: QCS404 base platform and EVB
- Qualcomm: Remove of Arrow SD600
- PXA: First PXA3xx DT board: Raumfeld
- Aspeed: Facebook Backpack-CMM BMC
- Renesas iWave G20D-Q7 (RZ/G1N)
- Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
- Allwinner Emlid Neutis N5, Mapleboard MP130
- Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
- i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
- VF610: Liebherr's BK4 device, ZII SCU4 AIB board
- i.MX7D PICO Hobbit baseboard
- i.MX7ULP EVK board
- NXP LX2160AQDS and LX2160ARDB boards
Other:
- Coresight binding updates across the board
- CPU cooling maps updates across the board"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits)
ARM: dts: suniv: Fix improper bindings include patch
ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node
ARM: dts: suniv: Fix improper bindings include patch
arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
arm64: dts: Remove unused properties from FSL QSPI driver nodes
ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
ARM: dts: Remove unused properties from FSL QSPI driver nodes
arm64: dts: ti: k3-am654: Enable main domain McSPI0
arm64: dts: ti: k3-am654: Add McSPI DT nodes
arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
arm64: dts: ti: k3-am65-main: Add ECAP PWM node
arm64: dts: ti: k3-am654-base-board: Add I2C nodes
arm64: dts: ti: am654-base-board: Add pinmux for main uart0
arm64: dts: ti: k3-am65: Add pinctrl regions
dt-bindings: pinctrl: k3: Introduce pinmux definitions
ARM: dts: exynos: Specify I2S assigned clocks in proper node
ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2
...
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Pull USB/PHY updates from Greg KH:
"Here is the big set of USB and PHY driver patches for 4.21-rc1.
All of the usual bits are in here:
- loads of USB gadget driver updates and additions
- new device ids
- phy driver updates
- xhci reworks and new features
- typec updates
Full details are in the shortlog.
All of these have been in linux-next for a long time with no reported
issues"
* tag 'usb-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (142 commits)
USB: serial: option: add Fibocom NL678 series
cdc-acm: fix abnormal DATA RX issue for Mediatek Preloader.
usb: r8a66597: Fix a possible concurrency use-after-free bug in r8a66597_endpoint_disable()
usb: typec: tcpm: Extend the matching rules on PPS APDO selection
usb: typec: Improve Alt Mode documentation
usb: musb: dsps: fix runtime pm for peripheral mode
usb: musb: dsps: fix otg state machine
USB: serial: pl2303: add ids for Hewlett-Packard HP POS pole displays
usb: renesas_usbhs: add support for RZ/G2E
usb: ehci-omap: Fix deferred probe for phy handling
usb: roles: Add a description for the class to Kconfig
usb: renesas_usbhs: mark PM functions as __maybe_unused
usb: core: Remove unnecessary memset()
usb: host: isp1362-hcd: convert to DEFINE_SHOW_ATTRIBUTE
phy: qcom-qmp: Expose provided clocks to DT
dt-bindings: phy-qcom-qmp: Move #clock-cells to child
phy: qcom-qmp: Utilize fully-specified DT registers
dt-bindings: phy-qcom-qmp: Fix register underspecification
phy: ti: fix semicolon.cocci warnings
phy: dphy: Add configuration helpers
...
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Kalle Valo says:
====================
wireless-drivers-next patches for 4.21
Last set of patches for 4.21. mt76 is still in very active development
and having some refactoring as well as new features. But also other
drivers got few new features and fixes.
Major changes:
ath10k
* add amsdu support for QCA6174 monitor mode
* report tx rate using the new ieee80211_tx_rate_update() API
* wcn3990 support is not experimental anymore
iwlwifi
* support for FW version 43 for 9000 and 22000 series
brcmfmac
* add support for CYW43012 SDIO chipset
* add the raw 4354 PCIe device ID for unprogrammed Cypress boards
mwifiex
* add NL80211_STA_INFO_RX_BITRATE support
mt76
* use the same firmware for mt76x2e and mt76x2u
* mt76x0e survey support
* more unification between mt76x2 and mt76x0
* mt76x0e AP mode support
* mt76x0e DFS support
* rework and fix tx status handling for mt76x0 and mt76x2
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
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This adds new dt entry ext-fem-name, it is used by ath10k driver
to select correct timing parameters and configure it in target wifi hardware.
The Front End Module(FEM) normally includes tx power amplifier(PA) and
rx low noise amplifier(LNA). The default timing parameters like tx end to
PA off timing values were fine tuned for internal FEM used in reference
design. And these timing values can not be same if ODM modifies hardware
design with different external FEM. This DT entry helps to choose correct
timing values in driver if different external FEM hardware used.
Signed-off-by: Bhagavathi Perumal S <bperumal@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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In qcom,ath10k documentation, ath10k is used as node name in the example of
pci based device. Normally, node name should be class of device and not the
model name, so fix it to node name "wifi". And remove the property device_type
pci since only pci bridges should have this property.
Signed-off-by: Bhagavathi Perumal S <bperumal@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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WCN3990 wifi module can optionally make use of the IOMMU.
Add binding documentation for phandle to the IOMMU and
the stream id of wifi iommu block.
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Add missing optional properties in WCN3990 wifi node.
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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remove fine-tune property in device tree, modify
the corresponding description in dt-binding.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The BCM4330 is a 802.11 a/b/g/n WiFi + Bluetooth 4.0 chip from Broadcom.
It is found in the Ampak AP6330 WiFi+BT module. The partiular one I have
identifies as BCM4330B1 for Bluetooth and BCM4330/4 for WiFi.
It is unclear if the AP6330 module uses this revision of the BCM4330, or
if there are multiple revisions. The module does not have revision
markings. This patch elects to use just BCM4330 for the compatible
string.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
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The BCM20702A1 is a Bluetooth 4.0 chip from Broadcom. It is found in the
Ampak AP6210 WiFi+BT module, identified from the read verbose config info
command response. However the Bluetooth firmware provided by vendors uses
the name BCM20710. This patch elects to use the chip ID returned by the
chip for the compatible string.
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
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The Broadcom Bluetooth chips have two power inputs, VBAT and VDDIO.
The former provides overall power for the chip, while the latter powers
the I/O pins and buffers.
This patch adds properties for the two so we can describe the power
supply relationships.
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
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The Broadcom Bluetooth controllers can take up to two external clocks:
an external frequency reference, substituting the main crystal, and a
LPO clock at 32.768 kHz substituting the internal LPO clock.
In particular, the external LPO clock must be used when the controller
does not have NVRAM connected, and the main reference frequency is not
the default 20 MHz. This is described in detail in the datasheet.
The original "extclk" clock name is ambiguous as to which of these it
refers to, and some designs might even require both.
This patch deprecates the existing name, and adds "txco" and "lpo".
Tested-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
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Document RZ/G2E (R8A774C0) SoC bindings.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The commit adds the device tree binding documentation for the MediaTek DWMAC
found on MediaTek MT2712.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Kishon writes:
phy: for 4.21
*) Change phy set_mode ops to take both mode and setmode as arguments
*) Add phy_configure() and phy_validate() API's mostly used for MIPI D-PHY
*) Add helpers to get default values of parameters define in MIPI D-PHY spec
*) Add driver for TI's CPSW Port PHY Interface Mode selection
*) Add driver for Cadence Sierra PHY used with USB and PCIe
*) Add driver for Freescale i.MX8MQ USB3 PHY
*) Fixes QMP PHY bindings to allow the clocks provided by the PHY to be
pointed at in device tree
*) Fix for using fully specified regions (in device tree) for configuring
the second lane in dual lane PHYs in QMP PHY
*) Add support for Allwinner H6 USB2 PHY in phy-sun4i-usb driver
*) Update phy-rcar-gen3-usb driver to follow the hardware manual
*) Add support for fine grained power management in mapphone-mdm6600 driver
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-4.21_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (30 commits)
phy: qcom-qmp: Expose provided clocks to DT
dt-bindings: phy-qcom-qmp: Move #clock-cells to child
phy: qcom-qmp: Utilize fully-specified DT registers
dt-bindings: phy-qcom-qmp: Fix register underspecification
phy: ti: fix semicolon.cocci warnings
phy: dphy: Add configuration helpers
phy: Add MIPI D-PHY configuration options
phy: Add configuration interface
phy: Add MIPI D-PHY mode
phy: add driver for Freescale i.MX8MQ USB3 PHY
dt-bindings: phy: add binding for Freescale i.MX8MQ USB3 PHY
phy: Use of_node_name_eq for node name comparisons
net: ethernet: ti: cpsw: add support for port interface mode selection phy
dt-bindings: net: ti: cpsw: switch to use phy-gmii-sel phy
phy: ti: introduce phy-gmii-sel driver
dt-bindings: phy: add cpsw port interface mode selection phy bindings
phy: mvebu-cp110-comphy: fix spelling in structure name
phy: mapphone-mdm6600: Improve phy related runtime PM calls
phy: renesas: rcar-gen3-usb2: follow the hardware manual procedure
phy: cadence: Add driver for Sierra PHY
...
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The cpsw-phy-sel driver was replaced with new PHY driver phy-gmii-sel, so
deprecate cpsw-phy-sel bindings and update CPSW binding to use phy-gmii-sel
PHY bindings.
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Add optional reset GPIO, as such a signal is available on the KSZ switches.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Woojung Huh <Woojung.Huh@microchip.com>
Cc: David S. Miller <davem@davemloft.net>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The FlexCAN controller can parse the stop mode property to enable CAN
self wakeup feature.
Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Add compatible string and new attributes to support the Xilinx CAN
FD 2.0.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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The correct form is "can be probed", so fix the typo.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The IP101A and IP101G series both have various models. Depending on the
board implementation we need a special property for the IP101GR (32-pin
LQFP package) PHY:
pin 21 ("RXER/INTR_32") outputs the "receive error" signal by default
(LOW means "normal operation", HIGH means that there's either a decoding
error of the received signal or that the PHY is receiving LPI). This pin
can also be switched to INTR32 mode, where the interrupt signal is
routed to this pin. The other PHYs don't need this special handling
because they have more pins available so the interrupt function gets a
dedicated pin.
This adds two properties to either select the "receive error" or
"interrupt" function of pin 21. Not specifying any function means that
the default set by the bootloader is used. This is required because the
IP101GR cannot be differentiated between other IP101 PHYs as the PHY
identification registers on all of these is 0x02430c54.
The IP101G (sold as die only, without package) may suffer from the same
issue depending on how it's integrated into a multi chip package by
another manufacturer. If only the RXER/INTR_32 pin is routed then the
users of the die-only variant may also have to explicitly configure the
mode of hte RXER/INTR_32 pin. This is the reason why no "is-ip101gr"
property was added. I have no evidence though which would confirm this
theory - so the binding itself is independent of that.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
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If the hi3110 shares the SPI bus with another traffic-intensive device
and packets are received in high volume (by a separate machine sending
with "cangen -g 0 -i -x"), reception stops after a few minutes and the
counter in /proc/interrupts stops incrementing. Bus state is "active".
Bringing the interface down and back up reconvenes the reception. The
issue is not observed when the hi3110 is the sole device on the SPI bus.
Using a level-triggered interrupt makes the issue go away and lets the
hi3110 successfully receive 2 GByte over the course of 5 days while a
ks8851 Ethernet chip on the same SPI bus handles 6 GByte of traffic.
Unfortunately the hi3110 datasheet is mum on the trigger type. The pin
description on page 3 only specifies the polarity (active high):
http://www.holtic.com/documents/371-hi-3110_v-rev-kpdf.do
Cc: Mathias Duckeck <m.duckeck@kunbus.de>
Cc: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Casey Fitzpatrick <casey.fitzpatrick@timesys.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Document RZ/G2M (r8a774a1) SoC specific bindings.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Document the support for rcar_can on R8A77965 SoC devices.
Add R8A77965 to the list of SoCs which require the "assigned-clocks" and
"assigned-clock-rates" properties (thanks, Sergei).
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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The Allwinner H6 SoC features a Ethernet MAC that is similar to the one
in A64.
Add a compatible string for it with A64 fallback compatible string, in
this case the A64 driver can be used.
The "internal" PHY is not internal from the perspective of the H6 main
die, instead it's on the co-packaged AC200 chip, and connected to the
main die with RMII at the in-package Port A PIO bank. So from the SoC
driver side it needs no special treatment.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Pull ARM SoC platform updates from Arnd Bergmann:
"A couple of platforms change hands in the MAINTAINERS file:
- Linus Walleij lists himself for the ARM Reference platforms:
versatile, vexpress, integrator and realview. He has been the main
contributor for these for a while, and makes it official now.
- Vladimir Zapolskiy takes over the LPC18xx platform from Joachim
Eastwood
- Manivannan Sadhasivam becomes a secondary maintainer for the
Actions Semi machines
- Nicolas Ferre lists updates the MAINTAINER listing for the AT91
platform: Ludovic Desroches is now a co-maintainer for the
platform, and several other people (Claudiu Beznea, Cristian
Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual
device drivers.
Thanks everyone for working on this, and welcome to the new
maintainers!
The "virt" platform on qemy or kvm can now be used in big-endian mode
without additional tricks, thanks to Jason Donenfeld.
Once again, we gain support for another NXP i.MX6 variant, this time
it's the i.MX 6ULZ 32-bit single-core version.
On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
and RZ/G2M (r8a774a1). These are described as microcontrollers on the
manufacturer website, but appear to be rather powerful. The RZ/G2M is
used on the reference board for the CIP Super Long Term Support (SLTS)
Linux Kernels"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture
arm64: exynos: Enable generic power domain support
MAINTAINERS: remove non-exsiting email address of Baoyou
MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section
MAINTAINERS: Drop dt-bindings/genpd/k2g.h
ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms
arm64: actions: Enable PINCTRL in platforms Kconfig
MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver
MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs
ARM: imx: add i.mx6ulz msl support
ARM: Assume maintainership of ARM reference designs
ARM: support big-endian for the virt architecture
MAINTAINERS: sdhci: move the Microchip entry to proper location
MAINTAINERS: move former ATMEL entries to proper MICROCHIP location
MAINTAINERS: remove the / ATMEL string from MICROCHIP entries
MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver
MAINTAINERS: pwm: add entry for Microchip pwm driver
MAINTAINERS: dmaengine: add files to Microchip dma entry
MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver
...
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Pull ARM SoC device tree updates from Arnd Bergmann:
"There are close to 800 indivudal changesets in this branch again,
which feels like a lot. There are particularly many changes for the
NVIDIA Tegra platform this time, in fact more than it has seen in the
two years since the v4.9 merge window. Aside from this, it's been
fairly normal, with lots of changes going into Renesas R-CAR, NXP
i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP.
Most of the changes are for adding new features into existing boards,
for brevity I'm only mentioning completely new machines and SoCs here.
For the first time I think we have (slightly) more new 64-bit hardware
than 32-bit:
Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a
minor variation of the motherboards of the GTA04 phone, see
https://shop.goldelico.com/wiki.php?page=GTA04A5
Clearfog is a nice little board for quad-core Marvell Armada 8040
network processor, see
https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/
Two additional server boards come with the Aspeed baseboard management
controllers: Stardragon4800 is an arm64 reference platform made by HXT
(based on Qualcomm's server chips), and TiogaPass is an Open Compute
mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the
BMC.
NXP i.MX usually sees a lot of new boards each release. This time
there we only add one minor variant: ConnectCore 6UL SBC Pro uses the
same SoM design as the ConnectCore 6UL SBC Express added later.
However, there is a new chip, the i.MX6ULZ, which is an even smaller
variant of the i.MX6ULL, with features removed. There is also support
for the reference board design, the i.MX6ULZ 14x14 EVK.
A new Raspberry Pi variant gets added, this one is the CM3 compute
module based on bcm2837, it was launched in early 2017 but only now
added to the kernel, both as 32-bit and as 64-bit files, as we tend to
do for Raspberry Pi.
On the Allwinner side, everything is again about cheap development
boards, usually of the "Fruit Pi" variety. The new ones this time are:
- Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
- Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
- Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
- Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
The last one of these is now a 64-bit version of the earlier Banana Pi
M2+ H3, with the same board layout.
Similarly, for Rockchips, get get another variant of the 32-bit Asus
Tinker board, the model 'S' based on rk3288, and three now boards
based on the popular RK3399 chip:
- ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
- Rock960: https://www.96boards.org/product/rock960/
- RockPro64: https://www.pine64.org/?page_id=61454
These are all quite powerful boards with lots of RAM and I/O, and the
RK3399 is the same chip used in several Chromebooks. Finally, we get
support for the PX30 (aka rk3326) chip, which is based on the low-end
64-bit Cortex-A35 CPU core. So far, only the evaluation board is
supported.
One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is
based on the MT7622 WiFi router platform, and the first product I've
seen with a 64-bit Mediatek chip in that market:
http://www.banana-pi.org/r64.html
For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
development board, which are similar to the Hi3660 and Hikey 360
respectively, but add support for an NPU.
Amlogic gets initial support for the Meson-G12A chip (S905D2), another
quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit
side, we gain support for an actual end-user product, the Endless
Computers Endless Mini based on Meson8b (S805), see
https://endlessos.com/computers/
Qualcomm adds support for their MSM8998 SoC and evaluation platform.
This chip is commonly known as the Snapdragon 835, and is used in
high-end phones as well as low-end laptops.
For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
but no boards for this one. However, we do add boards for the
previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the
M3NULCB Starter Kit Pro.
While we have lots of DT changes for NVIDIA to update the existing
files, the only board that gets added is the Toradex Colibri T20 on
Colibri Evaluation Board for the old Tegra2.
Synaptics add support for their AS370 SoC, which is part of the
(formerly Marvell) Berlin line of set-top-box chips used e.g. in the
various Google Chromecast. Only the .dtsi gets added at this point, no
actual machines"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits)
ARM: dts: socfgpa: remove ethernet aliases from dtsi
arm64: dts: stratix10: add ethernet aliases
dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI
dt-bindings: mediatek: Add JPEG Decoder binding for MT7623
dt-bindings: iommu: mediatek: Add binding for MT7623
dt-bindings: clock: mediatek: add support for MT7623
ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites
ARM: dts: da850-lego-ev3: slow down A/DC as much as possible
ARM: dts: da850-evm: Enable tca6416 on baseboard
arm64: dts: uniphier: Add USB2 PHY nodes
arm64: dts: uniphier: Add USB3 controller nodes
ARM: dts: uniphier: Add USB2 PHY nodes
ARM: dts: uniphier: Add USB3 controller nodes
arm64: dts: meson-axg: s400: disable emmc
arm64: dts: meson-axg: s400: add missing emmc pwrseq
arm64: dts: clearfog-gt-8k: add PCIe slot description
ARM: dts: at91: sama5d4_xplained: even nand memory partitions
ARM: dts: at91: sama5d3_xplained: even nand memory partitions
ARM: dts: at91: at91sam9x5cm: even nand memory partitions
ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets
...
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Pull Devicetree updates from Rob Herring:
"A bit bigger than normal as I've been busy this cycle.
There's a few things with dependencies and a few things subsystem
maintainers didn't pick up, so I'm taking them thru my tree.
The fixes from Johan didn't get into linux-next, but they've been
waiting for some time now and they are what's left of what subsystem
maintainers didn't pick up.
Summary:
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
- Work to get rid of direct accesses to struct device_node name and
type pointers in preparation for removing them. New helpers for
parsing DT cpu nodes and conversions to use the helpers. printk
conversions to %pOFn for printing DT node names. Most went thru
subystem trees, so this is the remainder.
- Fixes to DT child node lookups to actually be restricted to child
nodes instead of treewide.
- Refactoring of dtb targets out of arch code. This makes the support
more uniform and enables building all dtbs on c6x, microblaze, and
powerpc.
- Various DT binding updates for Renesas r8a7744 SoC
- Vendor prefixes for Facebook, OLPC
- Restructuring of some ARM binding docs moving some peripheral
bindings out of board/SoC binding files
- New "secure-chosen" binding for secure world settings on ARM
- Dual licensing of 2 DT IRQ binding headers"
* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
ARM: dt: relicense two DT binding IRQ headers
power: supply: twl4030-charger: fix OF sibling-node lookup
NFC: nfcmrvl_uart: fix OF child-node lookup
net: stmmac: dwmac-sun8i: fix OF child-node lookup
net: bcmgenet: fix OF child-node lookup
drm/msm: fix OF child-node lookup
drm/mediatek: fix OF sibling-node lookup
of: Add missing exports of node name compare functions
dt-bindings: Add OLPC vendor prefix
dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
dt-bindings: thermal: samsung: Add SPDX license identifier
dt-bindings: clock: samsung: Add SPDX license identifiers
dt-bindings: timer: ostm: Add R7S9210 support
dt-bindings: phy: rcar-gen2: Add r8a7744 support
dt-bindings: can: rcar_can: Add r8a7744 support
dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
dt-bindings: thermal: rcar: Add device tree support for r8a7744
Documentation: dt: Add binding for /secure-chosen/stdout-path
dt-bindings: arm: zte: Move sysctrl bindings to their own doc
...
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Add support for Microchip Technology KSZ9131 10/100/1000 Ethernet PHY
Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Document RZ/G1N (r8a7744) SoC specific bindings.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rob Herring <robh@kernel.org>
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ath.git patches for 4.20. Major changes:
ath10k
* support NET_DETECT WoWLAN feature
* wcn3990 basic functionality now working after we got QMI support
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Add device tree binding documentation details of msa
memory region for ath10k qmi client for SDM845/APQ8098
SoC into "qcom,ath10k.txt".
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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HSIO register address space should be handled outside of the MAC
controller as there are some registers for PLL5 configuring,
SerDes/switch port muxing and a thermal sensor IP, so let's remove it.
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add "marvell,prestera" as a compatible string so that drivers can be
written to account for any prestera variant without needing to
specialise to the more specific values.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Document RZ/G1N (R8A7744) SoC bindings.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Allow the configuration of the MDIO clock divider when the Device Tree
contains 'clock-frequency' property (similar to I2C and SPI buses).
Because the hardware may have lost its state during suspend/resume,
re-apply the MDIO clock divider upon resumption.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch updates the interrupts part of the Marvell PPv2 driver
bindings documentation, to keep it in sync with the driver.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Two new tls tests added in parallel in both net and net-next.
Used Stephen Rothwell's linux-next resolution.
Signed-off-by: David S. Miller <davem@davemloft.net>
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* Use one compatible line per line in the documentation
* Remove SoC revision depended compatible lines, we can detect that in
the driver
* Use lower case letters in hex addresses
* Fix the size of the address ranges in the example, this now matches
the sizes used by the SoC. The old ones will also work, this just adds
some empty address space.
* Change the reg size of the gphy-fw node
Fixes: 86ce2bc73c7a ("dt-bindings: net: dsa: Add lantiq, xrx200-gswip DT bindings")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: devicetree@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
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Use lower case letters in the addresses of the device tree binding.
In addition replace eth with ethernet and fix the size of the reg
element in the example. The additional range does not contain any
registers but is used for the IP block on the this SoC.
Fixes: 839790e88a3c ("dt-bindings: net: Add lantiq, xrx200-net DT bindings")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: devicetree@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
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We need this new compatibility string as we experienced different behavior
for this 10/100Mbits/s macb interface on this particular SoC.
Backward compatibility is preserved as we keep the alternative strings.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Document the Broadcom roboswitch Switch Register Access Block interrupt
lines and additional register base addresses for port mux configuration
and SGMII status/configuration registers.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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Moritz Fischer
Alex Williams
Greg Ungerer
Vinod Koul
Sergio Paracuellos
Linus Torvalds
David S. Miller
Bhagavathi Perumal S
Govind Singh
Biao Huang
Chen-Yu Tsai
Fabrizio Castro
Greg Kroah-Hartman
Grygorii Strashko
Marek Vasut
Aisheng Dong
Shubhrajyoti Datta
Fabio Estevam
Martin Blumenstingl
Lukas Wunner
Eugeniu Rosca
Icenowy Zheng
Yuiko Oshino
Biju Das
Kalle Valo
Quentin Schulz
Chris Packham
Florian Fainelli
Antoine Tenart
Hauke Mehrtens
Nicolas Ferre