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path: root/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt (follow)
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2017-12-21bindings: PCI: artpec: Add support for the ARTPEC-7 SoCNiklas Cassel1-0/+2
Add support for the ARTPEC-7 SoC in the artpec6 driver. The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar. Unfortunately, some fields in the PCIECFG and PCIESTAT register have changed. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org>
2017-12-21bindings: PCI: artpec: Add support for endpoint modeNiklas Cassel1-1/+2
The PCIe controller integrated in ARTPEC-6 SoCs is capable of operating in endpoint mode. Add endpoint mode support to the artpec6 driver. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org>
2017-09-01PCI: Fix typos and whitespace errorsBjorn Helgaas1-1/+1
Fix various typos and whitespace errors: s/Synopsis/Synopsys/ s/Designware/DesignWare/ s/Keystine/Keystone/ s/gpio/GPIO/ s/pcie/PCIe/ s/phy/PHY/ s/confgiruation/configuration/ No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-08-31bindings: PCI: artpec: correct pci binding exampleNiklas Cassel1-3/+4
- Increase config size. When using a PCIe switch, the previous config size only had room for one device. - Add bus range. Inherited optional property. - Map downstream I/O to PCI address 0. We can map it to any address, but let's be consistent with other drivers. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-06-11PCI: Add DT binding for Axis ARTPEC-6 PCIe controllerNiklas Cassel1-0/+46
Add the Device Tree binding documentation that allows to describe the PCIe controller found in the Axis ARTPEC-6 SoC. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org>