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2019-04-17dt-bindings: phy: Add a new property drive-impedance-ohm for RK's emmc PHYChristoph Muellner1-2/+6
This patch documents the new proprty drive-impedance-ohm for Rockchip's eMMC PHY node. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-07-25Documentation: phy: Let the rockchip eMMC PHY get an exported card clockDouglas Anderson1-0/+9
As of an earlier change in this series ("Documentation: mmc: sdhci-of-arasan: Add ability to export card clock") the SDHCI driver used on Rockchip SoCs can now expose its clock. Let's now specify that the PHY can use it. Letting the PHY get access to this clock means it can adjust phyctrl_frqsel field appropriately. Although the Rockchip PHY appears slightly different than the reference Arasan one, you can see that the Arasan datasheet [1] had it defined as: Select the frequency range of DLL operation: 3b'000 => 200MHz to 170 MHz 3b'001 => 170MHz to 140 MHz 3b'010 => 140MHz to 110 MHz 3b'011 => 110MHz to 80MHz 3b'100 => 80MHz to 50 MHz 3b'101 => 275Mhz to 250MHz 3b'110 => 250MHz to 225MHz 3b'111 => 225MHz to 200MHz On the Rockchip version of the PHY we have less granularity but the idea is the same. [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-04-13phy: rockchip-emmc: adapt binding to specifiy register offset and lengthHeiko Stuebner1-2/+4
The emmc-phy occupies a contiguous set of 8 registers inside the general register files, so the reg property should specify this. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-04-13phy: rockchip-emmc: should be a child device of the GRFHeiko Stuebner1-7/+11
The emmc-phy is fully enclosed in the general register files (GRF). Therefore as seen from the device-tree it shouldn't be a separate platform- device but instead a sub-device of the GRF - using the simply-mfd mechanism. The driver entered the kernel in the current merge-window, so we can still adapt the binding without needing a fallback, as the binding hasn't been released with a full kernel yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-03-01Documentation: bindings: add dt documentation for Rockchip eMMC PHYShawn Lin1-0/+19
This patch adds a binding that describes the Rockchip eMMC PHYs found on Rockchip SoCs eMMC interface. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>