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2014-04-16spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFTJane Wan1-0/+6
Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers (n=0,1,2,3) configurable through device tree. CSnBEF is the chip select setup time. It's the delay in bits from the activation of chip select pin to the first clock for data frame. CSnAFT is the chip select hold time. It's the delay in bits from the last clock for data frame to the deactivation of chip select pin. The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set them to a different value for some device. Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-04-07spi/spi-fsl-spi: Add support for Aeroflex Gaisler GRLIB cores normally running on SPARCAndreas Larsson1-1/+1
This adds support for the mostly register-compatible SPICTRL cores from the GRLIB VHDL IP core library from Aeroflex Gaisler. They are normally running on SPARC. A different entry in of_fsl_spi_match matches this core and indicates a different hardware type that is used to set up different function pointers and special cases. The GRLIB core operates in cpu mode. The number of bits per word might be limited. There might be native chipselects selected via a slave select register. These differences to the FSL type cores, if present, are indicated by a capabilities register. Other register and function differences exists but are not relevant to the driver. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2013-04-07spi/spi-fsl-spi: Make driver usable in CPU mode outside of an FSL_SOC environmentAndreas Larsson1-0/+1
This makes the spi-fsl-spi driver usable in CPU mode outside of an FSL_SOC and even an powerpc environment by moving CPM mode functionality to a separate file that is only compiled and linked in an FSL_SOC environment and adding some ifdefs to hide types and functions or provide alternatives. For devicetree probing a "clock-frequency" property is used for clock frequency instead of calls to FSL_SOC-specific functions. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-01-31dt: Move device tree documentation out of powerpc directoryGrant Likely1-0/+53
The device tree is used by more than just PowerPC. Make the documentation directory available to all. v2: reorganized files while moving to create arch and driver specific directories. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>