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2016-06-28spi: Fix typo in devicetree/bindings/spiMasanari Iida1-1/+1
This patch fix spelling typos found in Documentation/devicetree/bingings/spi. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-26ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHzVignesh R1-0/+7
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-12-18ARM: dts: AM4372: add entry for qspi mmap regionVignesh R1-2/+3
Add qspi memory mapped region entries for AM43xx based SoCs. Also, update the binding documents for the controller to document this change. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-12-18ARM: dts: DRA7: add entry for qspi mmap regionVignesh R1-0/+17
Add qspi memory mapped region entries for DRA7xx based SoCs. Also, update the binding documents for the controller to document this change. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-12-19spi/qspi: update binding informationSourav Poddar1-1/+7
These update binding information for ti qspi controller. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-08-27spi/qspi: Add compatible string for am4372.Sourav Poddar1-1/+1
Add a compatible string for am4372. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-08-22spi/qspi: Add qspi flash controllerSourav Poddar1-0/+22
The patch add basic support for the quad spi controller. QSPI is a kind of spi module that allows single, dual and quad read access to external spi devices. The module has a memory mapped interface which provide direct interface for accessing data form external spi devices. The patch will configure controller clocks, device control register and for defining low level transfer apis which will be used by the spi framework to transfer data to the slave spi device(flash in this case). Test details: ------------- Tested this on dra7 board. Test1: Ran mtd_stesstest for 40000 iterations. - All iterations went through without failure. Test2: Use mtd utilities: - flash_erase to erase the flash device - mtd_debug read to read data back. - mtd_debug write to write to the data flash. diff between the write and read data shows zero. Acked-by: Felipe Balbi<balbi@ti.com> Reviewed-by: Felipe Balbi<balbi@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>