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2022-05-05dt-bindings: input: sun4i-lradc-keys: Add R329 and D1 compatiblesSamuel Holland1-0/+22
The R329 and D1 SoCs each contain an LRADC with a programming interface compatible to earlier LRADCs. However, the LRADC now has its own clock gate and reset line, instead of being always active. To support this, add clock/reset properties to the binding, and require them for the variant in the new SoCs. Acked-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220414002349.24332-1-samuel@sholland.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2022-05-05Merge tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann2-2/+41
This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.19, please pull the following: - Oleksij fixes the ethernet node name for the USB Ethernet adapter on BCM283x (Raspberry Pi 1/2/3) platforms - Kuldeep fixes the PL022 SPI controller clock names to conform to the binding - Rafal updates the various BCM5301X (Northstar) Device Tree include files to be dtsschema conforming for pinctrl, NAND - Arinc adds the Asus RT-AC88U binding, removes some unnecessary properties of the Ethernet switch DT node, populates the correct PHY interface for port 5 of the switch, adds support for fetching the MAC address from the NVMEM provider and finally disables gmac0 on that device which is unused - Phil updates the Raspberry Pi 1/2/3 DTS files to have the latest gpio line names conforming to the printed circuit board layout - Krzysztof updates various Broadcom DTS files to have a conforming SPI nor Device Tree node - Takayoshi adds support for the Buffalo WZR-1166DHP/WZR-1166DHP2 wireless routers based on the BCM4708 SoC - William adds support for the BCM47622 ARMv7 Broadband SoC and provides a basic DTS to boot upstream Linux on such a system * tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux: (22 commits) ARM: dts: BCM5301X: Add DT for WZR-1166DHP,DHP2 ARM: dts: add dts files for bcmbca soc 47622 dt-bindings: arm: add bcmbca device tree binding document ARM: dts: bcm283x: Align ETH_CLK GPIO line name ARM: dts: bcm283x: Remove gpio line name NC ARM: dts: bcm2835-rpi-b: Fix GPIO line names ARM: dts: bcm2837-rpi-3-b-plus: Fix GPIO line name of power LED ARM: dts: bcm2837-rpi-cm3-io3: Fix GPIO line names for SMPS I2C ARM: dts: bcm2835-rpi-zero-w: Fix GPIO line name for Wifi/BT ARM: dts: BCM5301X: Disable gmac0 and enable port@8 on Asus RT-AC88U ARM: dts: broadcom: align SPI NOR node name with dtschema dt-bindings: arm: bcm: add bindings for Asus RT-AC88U ARM: dts: BCM5301X: Fix compatible strings for BCM53012 and BCM53016 SoC dt-bindings: arm: bcm: create new description for BCM53016 dt-bindings: arm: bcm: fix BCM53012 and BCM53016 SoC strings ARM: dts: BCM5301X: Retrieve gmac1 MAC address from NVRAM on Asus RT-AC88U ARM: dts: BCM5301X: Add rgmii to port@5 of Broadcom switch on Asus RT-AC88U ARM: dts: BCM5301X: Remove cell properties from srab ports on Asus RT-AC88U ARM: dts: BCM5301X: Fix DTC warning for NAND node ARM: dts: BCM5301X: Update pin controller node name ... Link: https://lore.kernel.org/r/20220504210942.1838248-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05Merge tag 'juno-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dtArnd Bergmann1-0/+45
Arm FVP/Juno device tree updates for v5.19 The main and bulk of the change is the addition of new platform Arm corstone1000(both FVP and FPGA versions). Also, there are addition of Coresight Cross Trigger Interface(CTI) support on Juno, fix for incorrect SCMI power domain IDs, addition of virtio-rng on FVP which is default disabled as it works only on latest versions of the FVP model. Other miscellanous changes include dropping of useless 'dma-channels/requests' properties and updating virtio device node names as per dtschema. * tag 'juno-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Drop useless 'dma-channels/requests' properties arm64: dts: fvp: Align virtio device node names with dtschema arm64: dts: fvp: Add virtio-rng support arm64: dts: Add Arm corstone1000 platform support dt-bindings: Add Arm corstone1000 platform arm64: dts: juno: add CTI entries to device tree arm64: dts: juno: Fix SCMI power domain IDs for ETF and CS funnel Link: https://lore.kernel.org/r/20220504112917.3492009-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05Merge tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dtArnd Bergmann3-15/+83
STM32 DT for v5.19, round 1 Highlights: ---------- -MCU: -Fix pinctrl node names to match with pinctrl yaml. - MPU: -General: - Fix pinctrl node names to match with pinctrl yaml. - Add Protonics boards support based on STM32MP151A SoC: - PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with TI and Micrel 10BaseT Phys and wifi support. - PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity and CO2 sensors. - PRTT1A - 10BaseT1L multi functional controller. - ST boards: - Add RTC support on stm32mp13. - Add button and heartbit support on stm32mp13 DK board. - Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based on OP-TEE OS and SCMI protocol. - DH boards: - Use MCO2 to generate PHY clock and ETHRX clock in order to release internal PLL for a better SD card usage. - Add 1ms PHY post-reset on Avenger96 board to match with PHY requirements. * tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits) ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 dt-bindings: reset: stm32mp15: rename RST_SCMI define dt-bindings: clock: stm32mp15: rename CK_SCMI define dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure" dt-bindings: rcc: Add optional external ethernet RX clock properties ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131 ARM: dts: stm32: add support for Protonic PRTT1x boards ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards dt-bindings: arm: stm32: correct blank lines dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards ARM: dts: stm32: enable RTC support on stm32mp135f-dk ARM: dts: stm32: add RTC node on stm32mp131 ARM: dts: stm32: Fix PHY post-reset delay on Avenger96 ARM: dts: stm32: fix pinctrl node name warnings (MPU soc) ... Link: https://lore.kernel.org/r/5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05Merge tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux into arm/driversArnd Bergmann22-295/+499
Reset controller updates for v5.19 Add Meson-S4 SoC reset controller support to reset-meson, AST2600 LPC reset controller support to reset-simple, and R9A07G054 USBPHY reset controller support to reset-rzg2l-usbphy-ctrl. Add ACPI _RST support to device_reset(), simplify the uniphier-glue reset driver using bulk API and devres and clean up its dt-bindings docs. Convert most dt-bindings docs from txt to yaml. * tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux: dt-bindings: reset: st,sti-powerdown: Convert to yaml dt-bindings: reset: st,sti-picophyreset: Convert to yaml dt-bindings: reset: socfpga: Convert to yaml dt-bindings: reset: snps,axs10x-reset: Convert to yaml dt-bindings: reset: nuvoton,npcm-reset: Convert to yaml dt-bindings: reset: lantiq,reset: Convert to yaml dt-bindings: reset: bitmain,bm1880-reset: Convert to yaml dt-bindings: reset: berlin: Convert to yaml dt-bindings: reset: ath79: Convert to yaml dt-bindings: reset: amlogic,meson-axg-audio-arb: Convert to yaml dt-bindings: reset: uniphier-glue: Clean up clocks, resets, and their names using compatible string reset: Kconfig: Make RESET_RZG2L_USBPHY_CTRL depend on ARCH_RZG2L reset: ACPI reset support reset: simple: Add AST2600 compatible reset: reset-meson: add support for the Meson-S4 SoC Reset Controller dt-bindings: reset: add bindings for the Meson-S4 SoC Reset Controller dt-bindings: reset: Add compatible for Meson-S4 Reset Controller reset: uniphier-glue: Use devm_add_action_or_reset() reset: uniphier-glue: Use reset_control_bulk API Link: https://lore.kernel.org/r/20220503160057.46625-1-p.zabel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05dt-bindings: arm: fsl: Add Storopack i.MX7D SMEGW01 boardFabio Estevam1-0/+1
Add DT compatible string for Storopack i.MX7D SMEGW01 board. Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: vendor-prefixes: Add prefix for StoropackFabio Estevam1-0/+2
Add a vendor prefix entry for Storopack (https://www.storopack.com). Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: gpio: pca95xx: add entry for pca6408Justin Chen1-0/+1
The NXP PCA5608 is the 8-bit version of PCA5616. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-05dt-bindings: clock: renesas,rzg2l: Document RZ/V2M SoCPhil Edworthy1-5/+8
Document the device tree binding for the Renesas RZ/V2M (r9a09g011) SoC. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20220503115557.53370-4-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-05dt-bindings: soc: renesas: Move renesas,rzg2l-sysc from arm to socGeert Uytterhoeven1-1/+1
The Renesas RZ/{G2L,V2L} System Controller (SYSC) DT binding is not really a power-related DT binding, hence it does not belong under Documentation/devicetree/bindings/power/. Move it to Documentation/devicetree/bindings/soc/renesas/. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/a47015888f99476a5206a556dce93503494d9a73.1651495078.git.geert+renesas@glider.be
2022-05-05dt-bindings: memory: renesas,rpc-if: Document RZ/G2UL SoCBiju Das1-0/+1
Document RZ/G2UL RPC-IF bindings. RZ/G2UL RPC-IF is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-rpc-if" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220501082508.25511-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-05dt-bindings: leds: Add multicolor PWM LED bindingsSven Schwermer1-0/+79
This allows to group multiple PWM-connected monochrome LEDs into multicolor LEDs, e.g. RGB LEDs. Signed-off-by: Sven Schwermer <sven.schwermer@disruptive-technologies.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05dt-bindings: leds: Optional multi-led unit addressSven Schwermer1-1/+1
The unit address does not make sense in all cases the multi-led node is used, e.g. for the upcoming PWM multi-color LED driver. Signed-off-by: Sven Schwermer <sven.schwermer@disruptive-technologies.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05dt-bindings: leds: Add regulator-led bindingLinus Walleij1-0/+55
The regulator is a LED connected directly to a regulator and with its brightness controlled by the voltage of the regulator. Cc: devicetree@vger.kernel.org Cc: Antonio Ospite <ao2@ao2.it> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-05dt-bindings: clock: add Exynos Auto v9 SoC CMU bindingsChanho Park1-0/+219
Add dt-schema for Exynos Auto v9 SoC clock controller. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504075154.58819-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05dt-bindings: dmaengine: fsl-imx: deprecate '#dma-channels' and '#dma-requests'Krzysztof Kozlowski1-3/+5
The generic properties, used in most of the drivers and defined in generic dma-common DT bindings, are 'dma-channels' and 'dma-requests'. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-04dt-bindings: net: lan966x: fix exampleMichael Walle1-2/+2
In commit 4fdabd509df3 ("dt-bindings: net: lan966x: remove PHY reset") the PHY reset was removed, but I failed to remove it from the example. Fix it. Fixes: 4fdabd509df3 ("dt-bindings: net: lan966x: remove PHY reset") Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220503132038.2714128-1-michael@walle.cc Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-05dt-bindings: arm: fsl: add toradex,colibri-imx6ullDenys Drozdov1-8/+17
Add toradex,colibri-imx6ull for carrier board dts, including aster, iris and iris-v2 device tree, wifi and nonwifi variants for NAND and eMMC modules. Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter KitManoj Sai1-0/+7
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. i.Core MX8M Plus needs to mount on top of this Evaluation board for creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit. Add bindings for it. Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add ls1021a-iot boardChangming Huang1-0/+1
Add the board ls1021a-iot in the binding docuemnt. Signed-off-by: Changming Huang <jerry.huang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: Add i.MX8M Mini Toradex Verdin based Menlo boardMarek Vasut1-0/+1
Add DT compatible string for board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo. The board is a compatible replacement for i.MX53 M53Menlo and features USB, multiple UARTs, ethernet, LEDs, SD and eMMC. Acked-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Francesco Dolcini <francesco.dolcini@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: Add i.MX8M Plus Gateworks GW74xx boardTim Harvey1-0/+1
Add DT compatible string for i.MX8M Plus based Gateworks GW74xx board. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add IMX8MN DDR3L eval boardMichael Walle1-0/+1
This eval board features an IMX8MN UltraLite and has DDR3L RAM. The product part number is 8MNANOD3L-EVK. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dlMax Krummenacher1-0/+3
Add bindings for Aster, Iris and Iris V2 carrier boards our Colibri iMX6S/DL may be mated with. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindingsMax Krummenacher1-8/+0
The dedicated device tree for V1.1 modules has been dropped. Remove its bindings too. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add toradex,verdin-imx8mp et al.Marcel Ziswiler1-0/+21
Add toradex,verdin-imx8mp for the Verdin iMX8M Plus modules, its nonwifi and wifi variants and the carrier boards (both Dahlia and the Verdin Development Board) they may be mated in. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: Add i.MX53 based Menlo board commentMarek Vasut1-1/+1
Add comment regarding the i.MX53 based Menlo board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add PHYTEC phyGATE Tauri i.MX6 ULLAndrej Picej1-0/+9
Add devicetree bindings for phyGATE Tauri board with phyCORE-i.MX6 ULL. Signed-off-by: Andrej Picej <andrej.picej@norik.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: soc: Add i.MX8MP media block control DT bindingsPaul Elder1-0/+104
The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral providing access to the NoC and ensuring proper power sequencing of the peripherals within the MEDIAMIX domain. Add DT bindings for it. There is already a driver for block controls of other SoCs in the i.MX8M family, so these bindings will expand upon that. Signed-off-by: Paul Elder <paul.elder@ideasonboard.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add TQ Systems boards based on i.MX6UL(L)Matthias Schiffer1-0/+37
TQMa6ULx is a SOM family using NXP i.MX6UL CPU family. TQMa6ULLx is a SOM family using NXP i.MX6ULL CPU family. Both are available as a socket type as well as an LGA type. For both variants there are the mainboards MBa6ULx and MBa6ULxL, trailing 'L' is LGA version. Finally there is the possibility to use the socket module with an LGA adapter on the MBa6ULxL. The SOM needs a mainboard, therefore we provide compatibles using this naming schema: "tq,imx6ul-<SOM>" for the module and "tq,imx6ul-<SOM>-<SBC>" for when mounted on the mainboard. The i.MX6ULL version is done similar. Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: Add Data Modul i.MX8M Mini eDM SBCMarek Vasut1-0/+1
Add DT compatible string for Data Modul i.MX8M Mini eDM SBC board into YAML DT binding document. This system is an evaluation board for various custom display units. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: soc: add binding for i.MX8MP HDMI blk-ctrlLucas Stach1-0/+84
Add the DT binding for the HDMI blk-ctrl found on the i.MX8MP SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-04dt-bindings: pci: apple,pcie: Drop max-link-speed from exampleHector Martin1-3/+0
We no longer use these since 111659c2a570 (and they never worked anyway); drop them from the example to avoid confusion. Fixes: 111659c2a570 ("arm64: dts: apple: t8103: Remove PCIe max-link-speed properties") Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220502091308.28233-1-marcan@marcan.st
2022-05-04dt-bindings: pinctrl: aspeed: Drop referenced nodes in examplesRob Herring1-63/+14
The additional nodes in the example referenced from the pinctrl node 'aspeed,external-nodes' properties are either incorrect (aspeed,ast2500-lpc) or not documented with a schema (aspeed,ast2500-gfx). There's no need to show these nodes as part of the pinctrl example, so just remove them. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220422192139.2592632-1-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-04dt-bindings: Drop redundant 'maxItems/minItems' in if/then schemasRob Herring13-68/+5
Another round of removing redundant minItems/maxItems when 'items' list is specified. This time it is in if/then schemas as the meta-schema was failing to check this case. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. Signed-off-by: Rob Herring <robh@kernel.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for IIO Link: https://lore.kernel.org/r/20220503162738.3827041-1-robh@kernel.org
2022-05-04dt-bindings: pinctrl: Allow values for drive-push-pull and drive-open-drainRob Herring1-2/+10
A few platforms, at91 and tegra, use drive-push-pull and drive-open-drain with a 0 or 1 value. There's not really a need for values as '1' should be equivalent to no value (it wasn't treated that way) and drive-push-pull disabled is equivalent to drive-open-drain. So dropping the value can't be done without breaking existing OSs. As we don't want new cases, mark the case with values as deprecated. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220429194610.2741437-1-robh@kernel.org
2022-05-04dt-bindings: i2c: renesas,rcar-i2c: R-Car V3U is R-Car Gen4Geert Uytterhoeven1-1/+1
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. I2C on R-Car V3U also supports some extra features (e.g. Slave Clock Stretch Select), which are supported by other R-Car Gen4 SoCs, but not by any other R-Car Gen3 SoC. Hence move its compatible value to the R-Car Gen4 section. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-05-04dt-bindings: leds: Add pm8350c pmic supportSatya Priya1-0/+1
Add pm8350c pmic pwm support. Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-04dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatiblesBjorn Andersson1-0/+2
Add compatibles for the SC8180X and SC8280XP platforms to the existing LLCC binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220502215406.612967-2-bjorn.andersson@linaro.org
2022-05-04dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicitMarc Zyngier1-2/+6
A common mistake when writing a device tree for a platform that is using GICv3 with ancient CPUs is to overlook the MMIO frames that implement the GICv2 compatibility feature, because this feature is implemented by the CPUs and not by the GIC itself. The compatibility feature itself is optional (all the modern implementations have dropped it), but is present in all the ARM Ltd implementations of the ARMv8.0 architecture (A3x, A53, A57, A72, A73), and many others from various implementers. Make it explicit that GICC, GICH and GICV are required for these CPUs. Also take this opportunity to update my email address, as people keep sending them to the wrong place... Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220409101617.268796-1-maz@kernel.org
2022-05-04regulator: dt-bindings: qcom,rpmh: document vdd-l7-bob-supply on PMR735AKrzysztof Kozlowski1-0/+1
The PMR735A comes with vdd-l7-bob-supply supply which was previously not documented. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220426105501.73200-4-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04regulator: dt-bindings: qcom,rpmh: document supplies per variantKrzysztof Kozlowski1-14/+242
The RPMH regulator binding covers several devices with different regulator supplies, so it uses patterns matching broad range of these supplies. This works fine but is not specific and might miss actual mistakes when a wrong supply property is used for given variant. Describe the supplies depending on the compatible, using a defs-allOf method. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220426105501.73200-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04regulator: dt-bindings: qcom,rpmh: update maintainersKrzysztof Kozlowski1-1/+2
David Collins' email bounces ("Recipient address rejected: undeliverable address: No such user here"). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220426105501.73200-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04regulator: mt6315: Enforce regulator-compatible, not nameNĂ­colas F. R. A. Prado1-1/+1
The MT6315 PMIC dt-binding should enforce that one of the valid regulator-compatible is set in each regulator node. However it was mistakenly matching against regulator-name instead. Fix the typo. This not only fixes the compatible verification, but also lifts the regulator-name restriction, so that more meaningful names can be set for each platform. Signed-off-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220429201325.2205799-1-nfraprado@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04dt-bindings: display: rockchip: dw-hdmi: fix ports descriptionSascha Hauer1-15/+9
Current port description doesn't cover all possible cases. It currently expects one single port with two endpoints. When the HDMI connector is described in the device tree there can be two ports, first one going to the VOP and the second one going to the connector. Also on SoCs which only have a single VOP there will be only one endpoint instead of two. This patch addresses both issues. With this there can either be a single port ("port") , or two of them ("port@0", "port@1") when the connector is also in the device tree. Also the first or only port can either have one endpoint ("endpoint") for single VOP SoCs or two ("endpoint@0", "endpoint@1") for dual VOP SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-25-s.hauer@pengutronix.de
2022-05-04dt-bindings: display: rockchip: Add binding for VOP2Sascha Hauer1-0/+140
The VOP2 is found on newer Rockchip SoCs like the rk3568 or the rk3566. The binding differs slightly from the existing VOP binding, so add a new binding file for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-24-s.hauer@pengutronix.de
2022-05-04dt-bindings: mmc: sdhci-msm: Document the SDX65 compatibleRohit Agarwal1-0/+1
The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence, document the compatible with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1651480665-14978-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: sdhci-msm: Add compatible string for sm8150Bhupesh Sharma1-0/+1
Add sm8150 SoC specific compatible strings for qcom-sdhci controller. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20220429220833.873672-4-bhupesh.sharma@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: sdhci-msm: Convert bindings to yamlBhupesh Sharma2-123/+192
Convert Qualcomm sdhci-msm devicetree binding to YAML. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20220429220833.873672-2-bhupesh.sharma@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: brcm,sdhci-brcmstb: cleanup exampleKrzysztof Kozlowski1-9/+9
Cleanup indentation and order of entries in example DTS. The most important when reading the DTS are compatible and reg. By convention they are usually to first entries. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220428081817.35382-2-krzysztof.kozlowski@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>