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2022-09-19dt: bindings: net: add bindings to add WoW support on WCN6750Manikanta Pubbisetty1-0/+14
Add required bindings to support WoW (Wake on Wireless) on WCN6750 which is based on ath11k driver. Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220902112520.24804-2-quic_mpubbise@quicinc.com
2022-09-19dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindingsAnjelique Melendez1-0/+4
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include compatible strings for PM7250B and PM8450 PMICs. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220912210624.4527-5-quic_amelende@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-19dt-bindings: net: bcm4329-fmac: Add Apple properties & chipsHector Martin1-4/+35
This binding is currently used for SDIO devices, but these chips are also used as PCIe devices on DT platforms and may be represented in the DT. Re-use the existing binding and add chip compatibles used by Apple T2 and M1 platforms (the T2 ones are not known to be used in DT platforms, but we might as well document them). Then, add properties required for firmware selection and calibration on M1 machines. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/E1oZDnO-0077Zy-18@rmk-PC.armlinux.org.uk
2022-09-18dt-bindings: sram: sunxi-sram: Add D1 compatible stringSamuel Holland1-0/+1
D1 needs to export a register for managing some LDO regulators, so it needs a unique compatible. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220815041248.53268-3-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-09-18dt-bindings: sram: sunxi-sram: Clean up the compatible listsSamuel Holland1-50/+31
Use enumerations where appropriate to combine "const" choices and deduplicate fallback compatible strings. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20220815041248.53268-2-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-09-18dt-bindings: phy: qcom, hdmi-phy-qmp: add clock-cells and XO clockDmitry Baryshkov1-3/+12
As the QMP HDMI PHY is a clock provider, add constant #clock-cells property. For the compatibility with older DTs the property is not marked as required. Also add the XO clock to the list of the clocks used by the driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/492316/ Link: https://lore.kernel.org/r/20220704161148.814510-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: msm/dp: handle DP vs eDP differenceDmitry Baryshkov1-1/+25
The #sound-dai-cells property should be used only for DP controllers. It doesn't make sense for eDP, there is no support for audio output. The aux-bus should not be used for DP controllers. Also p1 MMIO region should be used only for DP controllers. Take care of these differences. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/498751/ Link: https://lore.kernel.org/r/20220822184900.307160-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: msm/dp: add missing propertiesDmitry Baryshkov1-0/+12
Document missing definitions for opp-table (DP controller OPPs), aux-bus (DP AUX BUS) and data-lanes (DP/eDP lanes mapping) properties. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/498750/ Link: https://lore.kernel.org/r/20220822184900.307160-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: msm/dp: mark vdda supplies as deprecatedDmitry Baryshkov1-5/+4
The commit 85936d4f3815 ("phy: qcom-qmp: add regulator_set_load to dp phy") moved setting regulator load to the DP PHY driver (QMP). Then, the commit 7516351bebc1 ("drm/msm/dp: delete vdda regulator related functions from eDP/DP controller") removed support for VDDA supplies from the DP controller driver. Mark these properties as deprecated and drop them from the example. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/498748/ Link: https://lore.kernel.org/r/20220822184900.307160-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm: dpu-sdm845: add missing DPU opp-tableKrzysztof Kozlowski1-0/+4
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 3d7a0dd8f39b ("dt-bindings: msm: disp: add yaml schemas for DPU bindings") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/499212/ Link: https://lore.kernel.org/r/20220817062059.18640-6-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm: dpu-sc7280: add missing DPU opp-tableKrzysztof Kozlowski1-0/+3
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 57fd4f34ddac ("dt-bindings: msm: add DT bindings for sc7280") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/497898/ Link: https://lore.kernel.org/r/20220817062059.18640-5-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm: dpu-sc7180: add missing DPU opp-tableKrzysztof Kozlowski1-0/+3
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 3d7a0dd8f39b ("dt-bindings: msm: disp: add yaml schemas for DPU bindings") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/497894/ Link: https://lore.kernel.org/r/20220817062059.18640-4-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm: dpu-qcm2290: add missing DPU opp-tableKrzysztof Kozlowski1-0/+3
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 164f69d9d45a ("dt-bindings: msm: disp: add yaml schemas for QCM2290 DPU bindings") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/497893/ Link: https://lore.kernel.org/r/20220817062059.18640-3-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm: dpu-msm8998: add missing DPU opp-tableKrzysztof Kozlowski1-0/+4
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 6e986a8f1cf1 ("dt-bindings: display: msm: Add binding for msm8998 dpu") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/497896/ Link: https://lore.kernel.org/r/20220817062059.18640-2-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm/mdp4: require 4 IOMMUsDmitry Baryshkov1-1/+1
APQ8064, the only supported mdp4 platform, uses 4 IOMMUs for the MDP4 device. Update schema accordingly. When we have other MDP4 platforms, this spec can be updated accordingly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/492541/ Link: https://lore.kernel.org/r/20220706145222.1565238-5-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm/gmu: account for different GMU variantsDmitry Baryshkov1-20/+146
Make display/msm/gmu.yaml describe all existing GMU variants rather than just the 630.2 (SDM845) version of it. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/492539/ Link: https://lore.kernel.org/r/20220706145222.1565238-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-18dt-bindings: display/msm/gpu: allow specifying several IOMMU nodesDmitry Baryshkov1-1/+2
Different platforms require different amounts of IOMMUs. The APQ8064 uses 64 IOMMU instances for GPU, adjust the schema accordingly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/492536/ Link: https://lore.kernel.org/r/20220706145222.1565238-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-09-17Merge tag 'at91-dt-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dtArnd Bergmann2-0/+17
AT91 DT for v6.1 #2 It contains: - new SAMA5D3 based board, namely SAMA5D3-EDS - adjustments to pass the DT binding validations - disable AES on some LAN966 based boards as they are reserverd by secure OS * tag 'at91-dt-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 ARM: dts: at91: sama7g5: Swap rx and tx for spi11 dts: arm: at91: Add SAMA5D3-EDS Board dt-bindings: arm: at91: Add info on SAMA5D3-EDS ARM: dts: lan966x: disable aes Link: https://lore.kernel.org/r/20220916105407.1287452-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-17dt-bindings: clock: rockchip: Document RV1126 CRUJagan Teki1-0/+62
Document dt-bindings for Rockchip RV1126 clock controller. Cc: linux-clk@vger.kernel.org Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20220915163947.1922183-4-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-17dt-bindings: arm: imx: update fsl.yaml for imx8dxlShenwei Wang1-0/+6
i.MX8DXL is a device targeting the automotive and industrial market segments. The chip is designed to achieve both high performance and low power consumption. It has a dual (2x) Cortex-A35 processor. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 boardTim Harvey1-0/+1
Add DT compatible string for i.MX8M Mini based Gateworks GW7904 board. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: add i.MX93 mediamix blk ctrlPeng Fan1-0/+80
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: add i.MX93 SRCPeng Fan1-0/+96
Add bindings for i.MX93 System Reset Controller(SRC). SRC supports resets and power gating for mixes. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registersPeng Fan1-0/+2
Document i.MX93 BLK CTRL system registers. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 CarrierMartyn Welch1-0/+7
Add DT compatible strings for a combination of the 14N0600E variant of the Avnet (MSC branded) SM2S-IMX8PLUS SoM on it's own and in combination with the SM2-MB-EP1 carrier board. Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S boardFrieder Schrempf1-0/+7
Add bindings for the Kontron BL i.MX8MM OSM-S board. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/boardFrieder Schrempf1-3/+3
This updates the bindings in order to use names for the boards that follow the latest convention used by Kontron marketing. By updating we make sure, that we can maintain this more easily in future and make sure that the proper devicetree can be selected for the hardware. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: imx: add i.MX8MP vpu blk ctrlPeng Fan1-17/+95
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse the i.MX8MM VPU blk ctrl yaml file. And add description for the items. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrlPeng Fan1-0/+12
i.MX8MM VPU support NoC QoS setting, so add interconnect property for i.MX8MM VPU blk ctrl Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrlPeng Fan1-2/+0
minItems and maxItems are set as the same value. In such case minItems is not necessary. So drop it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: imx6ul-kontron: Update bindingsFrieder Schrempf1-19/+12
This updates the bindings in order to simplify the devicetree structure and to add names for the boards that follow the latest convention used by Kontron marketing. It also gets rid of the N6xxx notation in the compatibles and file names, as they are not really used anymore and often result in confusion. This is a breaking change, but the impact shouldn't be too big and it makes usage and maintenance easier in the future. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-16Merge tag 'linux-can-next-for-6.1-20220915' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-nextDavid S. Miller1-1/+5
Marc Kleine-Budde says: ==================== Sept. 15, 2022, 8:19 a.m. UTC Hello Jakub, hello David, this is a pull request of 23 patches for net-next/master. the first 2 patches are by me and fix a typo in the rx-offload helper and the flexcan driver. Christophe JAILLET's patch cleans up the error handling in rcar_canfd driver's probe function. Kenneth Lee's patch converts the kvaser_usb driver from kcalloc() to kzalloc(). Biju Das contributes 2 patches to the sja1000 driver which update the DT bindings and support for the RZ/N1 SJA1000 CAN controller. Jinpeng Cui provides 2 patches that remove redundant variables from the sja1000 and kvaser_pciefd driver. 2 patches by John Whittington and me add hardware timestamp support to the gs_usb driver. Gustavo A. R. Silva's patch converts the etas_es58x driver to make use of DECLARE_FLEX_ARRAY(). Krzysztof Kozlowski's patch cleans up the sja1000 DT bindings. Dario Binacchi fixes his invalid email in the flexcan driver documentation. Ziyang Xuan contributes 2 patches that clean up the CAN RAW protocol. Yang Yingliang's patch switches the flexcan driver to dev_err_probe(). The last 7 patches are by Oliver Hartkopp and add support for the next generation of the CAN protocol: CAN with eXtended data Length (CAN XL). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-16dt-bindings: power: supply: Add MediaTek MT6370 ChargerChiaEn Wu1-0/+96
Add MediaTek MT6370 Charger binding documentation. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: ChiaEn Wu <chiaen_wu@richtek.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-09-16dt-bindings: i2c: rockchip: add rockchip,rk3128-i2cJohan Jonker1-0/+1
Add rockchip,rk3128-i2c compatible string. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16dt-bindings: i2c: renesas,rcar-i2c: Add r8a779g0 supportGeert Uytterhoeven1-0/+1
Document support for the I2C Bus Interfaces in the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-16Merge tag 'v6.0-rc5' into i2c/for-mergewindowWolfram Sang16-48/+72
Linux 6.0-rc5
2022-09-16dt-bindings: display: bridge: nxp,tda998x: Convert to json-schemaGeert Uytterhoeven2-54/+109
Convert the NXP TDA998x HDMI transmitter Device Tree binding documentation to json-schema. Add missing "#sound-dai-cells" property. Add ports hierarchy, as an alternative to port. Drop pinctrl properties, as they do not belong here. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1224e757ec958f8b29ec66e783a7ee805c339d84.1663165552.git.geert+renesas@glider.be Signed-off-by: Rob Herring <robh@kernel.org>
2022-09-17dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schemaSerge Semin1-0/+115
Baikal-T1 AHCI controller is based on the DWC AHCI SATA IP-core v4.10a with the next specific settings: two SATA ports, cascaded CSR access based on two clock domains (APB and AXI), selectable source of the reference clock (though stable work is currently available from the external source only), two reset lanes for the application and SATA ports domains. Other than that the device is fully compatible with the generic DWC AHCI SATA bindings. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schemaSerge Semin3-8/+177
Synopsys AHCI SATA controller is mainly compatible with the generic AHCI SATA controller except a few peculiarities and the platform environment requirements. In particular it can have at least two reference clocks to feed up its AHB/AXI interface and SATA PHYs domain and at least one reset control for the application clock domain. In addition to that the DMA interface of each port can be tuned up to work with the predefined maximum data chunk size. Note unlike generic AHCI controller DWC AHCI can't have more than 8 ports. All of that is reflected in the new DWC AHCI SATA device DT binding. Note the DWC AHCI SATA controller DT-schema has been created in a way so to be reused for the vendor-specific DT-schemas (see for example the "snps,dwc-ahci" compatible string binding). One of which we are about to introduce. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: ahci: Add platform capability propertiesSerge Semin2-0/+26
In case if the platform doesn't have BIOS or a comprehensive firmware installed then the HBA capability flags will be left uninitialized. As a good alternative we suggest to define the DT-properties with the AHCI platform capabilities describing all the HW-init flags of the corresponding capability register. Luckily there aren't too many of them. SSS - Staggered Spin-up support and MPS - Mechanical Presence Switch support determine the corresponding feature availability for the whole HBA by means of the "hba-cap" property. Each port can have the "hba-port-cap" property initialized indicating that the port supports some of the next functionalities: HPCP - HotPlug capable port, MPSP - Mechanical Presence Switch attached to a port, CPD - Cold Plug detection, ESP - External SATA Port (eSATA), FBSCP - FIS-based switching capable port. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: sata-brcm: Apply common AHCI schemaSerge Semin1-1/+1
The Broadcom SATA controller is obviously based on the AHCI standard. The device driver uses the kernel AHCI library to work with it. Therefore we can be have a more thorough DT-bindings evaluation by referring to the AHCI-common schema instead of using the more relaxed SATA-common one. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: sata: Extend number of SATA portsSerge Semin1-4/+3
The denoted in the description upper limit only concerns the Port Multipliers, but not the actual SATA ports. It's an external device attached to a SATA port in order to access more than one SATA-drive. So when it's attached to a SATA port it just extends the port capability while the number of actual SATA ports stays the same. For instance on AHCI controllers the number of actual ports is determined by the CAP.NP field and the PI (Ports Implemented) register. AFAICS in general the maximum number of SATA ports depends on the particular controller implementation. Generic AHCI controller can't have more than 32 ports (since CAP.NP is of 5 bits wide and PI register is 32-bits size), while DWC AHCI SATA controller can't be configured with more than 8 ports activated. So let's discard the SATA ports reg-property restrictions and just make sure that it consists of a single reg-item. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: ahci-platform: Clarify common AHCI props constraintsSerge Semin1-5/+12
Indeed in accordance with what is implemented in the AHCI platform driver and the way the AHCI DT nodes are defined in the DT files we can add the next AHCI DT properties constraints: AHCI CSR ID is fixed to 'ahci', PHY name is fixed to 'sata-phy', AHCI controller can't have more than 32 ports by design, AHCI controller can have up to 32 IRQ lines. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: ahci-platform: Detach common AHCI bindingsSerge Semin3-65/+115
In order to create a more sophisticated AHCI controller DT bindings let's divide the already available generic AHCI platform YAML schema into the platform part and a set of the common AHCI properties. The former part will be used to evaluate the AHCI DT nodes mainly compatible with the generic AHCI controller while the later schema will be used for more thorough AHCI DT nodes description. For instance such YAML schemas design will be useful for our DW AHCI SATA controller derivative with four clock sources, two reset lines, one system controller reference and specific max Rx/Tx DMA xfers size constraints. Note the phys and target-supply property requirement is preserved in the generic AHCI platform bindings because some platforms can lack of the explicitly specified PHYs or target device power regulators. Also note the SATA/AHCI ports properties have been moved to the $defs-paragraph of the schemas. It's done in order to create the extendable properties hierarchy such that particular AHCI-controller could add vendor-specific port properties. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-17dt-bindings: ata: ahci-platform: Move dma-coherent to sata-common.yamlSerge Semin3-4/+2
Seeing doubtfully any SATA device working without embedded DMA engine let's permit the device nodes being equipped with the dma-coherent property in case if the platform is capable of cache-coherent DMAs. As a side-effect we can drop the explicit dma-coherent property definition from the particular device schemas. Currently it concerns the Broadcom SATA AHCI controller only. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-09-16dt-bindings: input: auo-pixcir-ts: fix gpio and interrupt propertiesDmitry Torokhov1-3/+3
Add proper interrupt trigger and gpio polarity data to the binding example. Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220914141428.2201784-5-dmitry.torokhov@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2022-09-16dt-bindings: Add doc for FriendlyARM NanoPi R4S Enterprise EditionTianling Shen1-0/+1
Add devicetree binding documentation for the FriendlyARM NanoPi R4S Enterprise Edition. Signed-off-by: Tianling Shen <cnsztl@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220915022511.4267-1-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-16spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related propertiesSergiu Moga1-0/+10
The DT nodes of the SPI IP's may contain DMA related properties so make sure that the binding is able to properly validate those as well by making it aware of these optional properties. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-5-sergiu.moga@microchip.com
2022-09-15Merge tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann2-42/+25
This pull request contains Broadcom ARM-based SoC Device Tree updates for 6.1, please pull the following: - Rafal improves the BCM5301X PCIe DT nodes schema validation by flagging the PCIe controller with a missing "device_type" property - William merges BCM4908 within BCMBCA since this chip is part of the Broadcom Broadband Carrier Access group and follows the architecture of those chips * tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux: arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA arm64: dts: Add BCM4908 generic board dts arm64: dts: Move BCM4908 dts to bcmbca folder arm64: dts: bcmbca: update BCM4908 board dts files dt-bindings: arm64: bcmbca: Update BCM4908 description dt-bindings: arm64: bcmbca: Merge BCM4908 into BCMBCA ARM: dts: BCM5301X: Add basic PCI controller properties Link: https://lore.kernel.org/r/20220915023044.2350782-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15dt-bindings: soc: mediatek: Add display mutex support for MT6795AngeloGioacchino Del Regno1-0/+1
Add compatible for MT6795 Helio X10 SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220913140121.403637-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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