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2021-12-17dt-bindings: usb: tegra-xudc: Document interconnects and iommus propertiesThierry Reding1-0/+13
Add the interconnects, interconnect-names and iommus properties to the device tree bindings for the Tegra XUDC controller. These are used to describe the device's paths to and from memory. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: Document Tegra234 TCUThierry Reding1-1/+6
Add the compatible string for the TCU found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: tegra-tcu: Convert to json-schemaThierry Reding2-35/+56
Convert the Tegra TCU device tree bindings to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: thermal: tegra186-bpmp: Convert to json-schemaThierry Reding2-33/+42
Convert the Tegra186 (and later) BPMP thermal device tree bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: firmware: tegra: Convert to json-schemaThierry Reding2-107/+186
Convert the NVIDIA Tegra186 (and later) BPMP bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: tegra: pmc: Convert to json-schemaThierry Reding2-133/+198
Convert the NVIDIA Tegra186 (and later) PMC bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: 8250: Document Tegra234 UARTThierry Reding1-1/+2
Add the compatible string for the UART found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mmc: tegra: Document Tegra234 SDHCIThierry Reding1-0/+6
Add the compatible string for the SDHCI block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: fuse: tegra: Document Tegra234 FUSEThierry Reding1-0/+1
Add the compatible string for the FUSE block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: fuse: tegra: Convert to json-schemaThierry Reding2-42/+88
Convert the NVIDIA Tegra FUSE bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: rtc: tegra: Document Tegra234 RTCThierry Reding1-0/+1
Add the compatible string for the RTC block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: rtc: tegra: Convert to json-schemaThierry Reding2-24/+60
Convert the NVIDIA Tegra RTC bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mailbox: tegra: Document Tegra234 HSPThierry Reding1-0/+3
Add the compatible string for the HSP block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mailbox: tegra: Convert to json-schemaThierry Reding2-72/+111
Convert the NVIDIA Tegra HSP bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mmc: tegra: Convert to json-schemaThierry Reding2-143/+311
Convert the NVIDIA Tegra SDHCI bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17ARM: dts: Fix timer regression for beagleboard revision cTony Lindgren1-0/+3
Commit e428e250fde6 ("ARM: dts: Configure system timers for omap3") caused a timer regression for beagleboard revision c where the system clockevent stops working if omap3isp module is unloaded. Turns out we still have beagleboard revisions a-b4 capacitor c70 quirks applied that limit the usable timers for no good reason. This also affects the power management as we use the system clock instead of the 32k clock source. Let's fix the issue by adding a new omap3-beagle-ab4.dts for the old timer quirks. This allows us to remove the timer quirks for later beagleboard revisions. We also need to update the related timer quirk check for the correct compatible property. Fixes: e428e250fde6 ("ARM: dts: Configure system timers for omap3") Cc: linux-kernel@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <robh+dt@kernel.org> Reported-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Tested-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-17dt-bindings: gpio: Add Tegra234 supportPrathamesh Shete1-0/+4
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra234. The number of pins is slightly different, but the programming model remains the same. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [treding@nvidia.com: update device tree bindings] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: tegra186: Convert to json-schemaThierry Reding2-165/+210
Convert the Tegra186 GPIO controller device tree bindings from free-form text format to json-schema. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: tegra: Convert to json-schemaThierry Reding2-40/+110
Convert the NVIDIA Tegra GPIO controller device tree bindings from free-form text format to json-schema. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17ASoC: dt-bindings: tegra20-i2s: Document new nvidia,fixed-parent-rate propertyDmitry Osipenko1-0/+7
Document new nvidia,fixed-parent-rate property which instructs that this board wants parent clock to stay at a fixed rate. It allows to prevent conflicts between audio components that share same parent PLL. For instance, this property allows to have HDMI audio, speaker and headphones in the system playing audio simultaneously, which is a common pattern for consumer devices. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211204143725.31646-4-digetx@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-17ASoC: dt-bindings: tegra20-i2s: Convert to schemaDmitry Osipenko2-30/+70
Convert NVIDIA Tegra20 I2S binding to schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211204143725.31646-3-digetx@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-17ASoC: dt-bindings: Add binding for Tegra20 S/PDIFDmitry Osipenko1-0/+85
Add device-tree binding for Tegra20 S/PDIF controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211204143725.31646-2-digetx@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-17ASoC: dt-bindings: audio-graph-port: enable both flag/phandle for bitclock/frame-masterKuninori Morimoto1-2/+7
snd_soc_daifmt_parse_clock_provider_raw() is handling both bitclock/frame-master, and is supporting both flag/phandle. Current DT is assuming it is flag style. This patch allows both case. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211216000018.2641925-1-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-17dt-bindings: mtd: ti, gpmc-nand: Add compatible for AM64 NANDRoger Quadros1-1/+4
AM64 SoC contains the GPMC NAND controller. Add compatible for it. Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Roger Quadros <rogerq@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211209090458.24830-2-rogerq@kernel.org
2021-12-17dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrlAdam Ford1-0/+97
Add the DT binding for the i.MX8MN DISP blk-ctrl. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski8-20/+21
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-16Merge tag 'soc-fixes-5.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-4/+4
Pull ARM SoC fixes from Arnd Bergmann: "There are a number of DT fixes, mostly for mistakes found through static checking of the dts files again, as well as a couple of minor changes to address incorrect DT settings. For i.MX, there is yet another series of devitree changes to update RGMII delay settings for ethernet, which is an ongoing problem after some driver changes. For SoC specific device drivers, a number of smaller fixes came up: - i.MX SoC identification was incorrectly registered non-i.MX machines when the driver is built-in - One fix on imx8m-blk-ctrl driver to get i.MX8MM MIPI reset work properly - a few compile fixes for warnings that get in the way of -Werror - a string overflow in the scpi firmware driver - a boot failure with FORTIFY_SOURCE on Rockchips machines - broken error handling in the AMD TEE driver - a revert for a tegra reset driver commit that broke HDA" * tag 'soc-fixes-5.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) soc/tegra: fuse: Fix bitwise vs. logical OR warning firmware: arm_scpi: Fix string overflow in SCPI genpd driver soc: imx: Register SoC device only on i.MX boards soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset ARM: dts: imx6ull-pinfunc: Fix CSI_DATA07__ESAI_TX0 pad name arm64: dts: imx8mq: remove interconnect property from lcdif ARM: socfpga: dts: fix qspi node compatible arm64: dts: apple: add #interrupt-cells property to pinctrl nodes dt-bindings: i2c: apple,i2c: allow multiple compatibles arm64: meson: remove COMMON_CLK arm64: meson: fix dts for JetHub D1 tee: amdtee: fix an IS_ERR() vs NULL bug arm64: dts: apple: change ethernet0 device type to ethernet arm64: dts: ten64: remove redundant interrupt declaration for gpio-keys arm64: dts: rockchip: fix poweroff on helios64 arm64: dts: rockchip: fix audio-supply for Rock Pi 4 arm64: dts: rockchip: fix rk3399-leez-p710 vcc3v3-lan supply arm64: dts: rockchip: fix rk3308-roc-cc vcc-sd supply arm64: dts: rockchip: remove mmc-hs400-enhanced-strobe from rk3399-khadas-edge ARM: rockchip: Use memcpy_toio instead of memcpy on smp bring-up ...
2021-12-16dt-bindings: i2c: aspeed: Drop stray '#interrupt-cells'Rob Herring1-1/+0
'#interrupt-cells' is not documented which causes a warning when 'unevaluatedProperties' is implemented. Unless the I2C controller is also an interrupt controller, '#interrupt-cells' is not valid. This doesn't appear to be the case from the driver, so just remove it from the example. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-12-16media: dt-bindings: allwinner: document H6 Hantro G2 bindingJernej Skrabec1-0/+64
Allwinner H6 contains older Hantro G2 core, primarly used for VP9 video decoding. It's unclear for now if HEVC is also supported. Describe its binding. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2021-12-16dt-bindings: clk: qcom: Document MSM8976 Global Clock ControllerMarijn Suijten1-0/+97
Document the required properties and firmware clocks for gcc-msm8976 to operate nominally, and add header definitions for referencing the clocks from firmware. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
2021-12-16Merge tag '20211207114003.100693-2-vkoul@kernel.org' into clk-for-5.17Bjorn Andersson1-0/+85
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org The immutable branch contains the DT binding and clock defines as need for the Qualcomm SM8450 global clock controller driver.
2021-12-16Merge tag 'e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com' into clk-for-5.17Bjorn Andersson1-0/+80
v5.16-rc1 + e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com Merge the immutable branch containing the DT binding and clock definitions needed for the SDX65 global clock controller driver.
2021-12-16Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.gitKalle Valo1-0/+30
ath.git patches for v5.17. Major changes: ath11k * support PCI devices with 1 MSI vector * WCN6855 hw2.1 support * 11d scan offload support * full monitor mode, only supported on QCN9074 * scan MAC address randomization support * reserved host DDR addresses from DT for PCI devices support ath9k * switch to rate table based lookup ath * extend South Korea regulatory domain support wcn36xx * beacon filter support
2021-12-16dt-bindings: iio: dac: Add adi,ad3552r.yamlMihail Chindris1-0/+217
Add documentation for ad3552r and ad3542r Signed-off-by: Mihail Chindris <mihail.chindris@analog.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-12-16dt-bindings:iio:filter: add admv8818 docAntoniu Miclaus1-0/+66
Add device tree bindings for the ADMV8818 Filter. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-12-16dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uartsEmil Renner Berthing1-0/+5
Add compatibles for the StarFive JH7100 uarts. Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: pinctrl: Add StarFive JH7100 bindingsEmil Renner Berthing1-0/+307
Add bindings for the GPIO/pin controller on the JH7100 RISC-V SoC by StarFive Ltd. This is a test chip for their upcoming JH7110 SoC. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: reset: Add Starfive JH7100 reset bindingsEmil Renner Berthing1-0/+38
Add bindings for the reset controller on the JH7100 RISC-V SoC by StarFive Ltd. This is a test chip for their upcoming JH7110 SoC. Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: clock: starfive: Add JH7100 bindingsGeert Uytterhoeven1-0/+56
Add bindings for the clock generator on the JH7100 RISC-V SoC by StarFive Ltd. This is a test chip for their upcoming JH7110 SoC. Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16dt-bindings: misc: Convert Tegra MISC to json-schemaThierry Reding4-31/+94
Convert the device tree bindings for the MISC register block found on NVIDIA Tegra SoCs from plain text to json-schema format. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: Add YAML bindings for NVENC and NVJPGJon Hunter2-0/+229
Add YAML device tree bindings for the Tegra NVENC and NVJPG Host1x engines. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: sram: Document NVIDIA Tegra SYSRAMThierry Reding1-0/+3
Tegra SoCs have extra on-chip RAM that can be used for inter-processor communication. Tegra186 and later make use of it to establish a two-way channel between the CCPLEX and BPMP. Add missing compatible strings for Tegra186 and Tegra194 as well as a new compatible string for Tegra234. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: tegra: Document Jetson AGX Orin (and devkit)Thierry Reding1-0/+9
Add the compatible strings for the Jetson AGX Orin and the corresponding developer kit. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: tegra: Describe recent developer kits consistentlyThierry Reding1-9/+11
Add descriptions to entries that were missing one and don't try to combine multiple entries into one to avoid confusion. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: memory: tegra: Add Tegra234 supportThierry Reding1-0/+20
Document the variant of the memory controller and external memory controllers found on Tegra234 and add some memory client and SMMU stream ID definitions for use in device tree files. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt-bindings: memory: tegra: Update for Tegra194Thierry Reding1-11/+67
The #interconnect-cells properties are required to hook up memory clients to the MC/EMC in interconnects properties. Add a description for these properties. For the nested EMC controller, the list of required properties was missing. Add it so that the validation can be more strict. Also, allow multiple reg entries required by Tegra194 and later. While at it, also remove the dummy BPMP node from the example because it is incomplete and fails validation. It's also not necessary for this file and the BPMP DT schema already has a full example. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16dt: bindings: add new DT entry for ath11k PCI device supportAnilkumar Kolli1-0/+30
Ath11k driver supports PCI devices such as QCN9074/QCA6390. Ath11k firmware uses host DDR memory, DT entry is used to reserve host DDR memory regions, send these memory base addresses using DT entries. Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/1638789319-2950-1-git-send-email-akolli@codeaurora.org
2021-12-16Merge drm/drm-next into drm-misc-nextThomas Zimmermann10-18/+139
Backmerging for v5.16-rc5. Resolves a conflict between drm-misc-next and drm-misc-fixes in the vc4 driver. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2021-12-16dt-bindings: imx6q-pcie: Add PHY phandles and name propertiesRichard Zhu1-0/+6
i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties in the binding document. Link: https://lore.kernel.org/r/1638432158-4119-4-git-send-email-hongxing.zhu@nxp.com Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Rob Herring <robh@kernel.org>
2021-12-16dt-bindings: display: simple: Add Team Source Display TST043015CMHX panelMarek Vasut1-0/+2
Add Team Source Display TST043015CMHX 4.3" 480x272 DPI panel compatible string. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: devicetree@vger.kernel.org To: dri-devel@lists.freedesktop.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20211127031909.283383-2-marex@denx.de