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2021-12-09Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/nextDaniel Lezcano886-12122/+35139
"Add optional variant of of_reset_control_get_exclusive(). If the requested reset is not specified in the device tree, this function returns NULL instead of an error." This dependency is needed for the Generic Timer Module (a.k.a OSTM) support for RZ/G2L. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2021-12-09ASoC: dt-bindings: tegra: Document interconnects propertyThierry Reding1-0/+10
Add the interconnects and interconnect-names properties to the bindings for the sound card on various NVIDIA Tegra based boards. These are used to describe the device's memory paths to and from memory. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211206154624.229018-1-thierry.reding@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-09dt-bindings: i2c: exynos5: Add bus clockSam Protsenko1-6/+53
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a part of USIv2 block, there are two clocks provided to HSI2C controller: - PCLK: bus clock (APB), provides access to register interface - IPCLK: operating IP-core clock; SCL is derived from this one Both clocks have to be asserted for HSI2C to be functional in that case. Modify bindings doc to allow specifying bus clock in addition to already described operating clock. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-12-09dt-bindings: i2c: exynos5: Add exynosautov9-hsi2c compatibleJaewon Kim1-0/+6
This patch adds new "samsung,exynosautov9-hsi2c" compatible. It is for i2c compatible with HSI2C available on Exynos SoC with USI. Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-12-09dt-bindings: i2c: exynos5: Convert to dtschemaSam Protsenko2-53/+80
Convert Samsung Exynos High Speed I2C bindings doc to DT schema format. Changes during bindings conversion: 1. Added missing required clock properties (driver fails when it's unable to get the clock) 2. Removed properties and descriptions that can be found in schemas/i2c/i2c-controller.yaml [1] 3. Fixed the example so it can be validated by dtschema [1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-12-09dt-bindings: i2c: brcm,bcm2835-i2c: convert to YAML schemaDavid Heidelberg2-22/+54
Switch the DT binding to a YAML schema to enable the DT validation. Signed-off-by: David Heidelberg <david@ixit.cz> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-12-08Merge tag 'v5.15' into nextDmitry Torokhov899-13769/+34413
Sync up with the mainline to get the latest APIs and DT bindings.
2021-12-09dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driverLakshmi Sowjanya D1-0/+119
Add Device Tree bindings documentation and an entry in MAINTAINERS file for Intel Thunder Bay SoC's pin controller. Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Link: https://lore.kernel.org/r/20211201072626.19599-2-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-09dt-bindings: pinctrl: qcom: Add SM8450 pinctrl bindingsVinod Koul1-0/+143
Add device tree binding Documentation details for Qualcomm SM8450 TLMM device Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211201072434.3968768-2-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-08dt-bindings: i2c: tegra-bpmp: Convert to json-schemaThierry Reding2-42/+45
Convert the NVIDIA Tegra186 (and later) BPMP I2C bindings from the free-form text format to json-schema. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211208143306.534700-1-thierry.reding@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: arm: pmu: Document Denver and Carmel PMUsThierry Reding1-0/+2
Add compatible strings for the NVIDIA Denver and Carmel PMUs. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211207150746.444478-1-thierry.reding@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: arm: Catch up with Cortex/Neoverse CPUs againRobin Murphy2-0/+12
Add bindings for the 2020 and 2021 cohorts of Cortex-A and Neoverse CPUs, now featuring their Cortex-X cousins as well. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/a36014d06d308c73d3fa1ed55e8967fb8adadf0d.1638900542.git.robin.murphy@arm.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: net: Convert SYSTEMPORT to YAMLFlorian Fainelli2-38/+86
Convert the Broadcom SYSTEMPORT Ethernet controller Device Tree binding to YAML. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208202801.3706929-3-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: net: Convert AMAC to YAMLFlorian Fainelli2-30/+88
Convert the Broadcom AMAC Device Tree binding to YAML to help with schema and dtbs checking. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208202801.3706929-2-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: net: Convert iProc MDIO mux to YAMLFlorian Fainelli2-62/+80
Conver the Broadcom iProc MDIO mux Device Tree binding to YAML. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206180049.2086907-9-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: phy: Convert Northstar 2 PCIe PHY to YAMLFlorian Fainelli2-27/+41
Convert the Broadcom Northstar 2 PCIe PHY Device Tree binding to YAML and rename it accordingly in the process since it had nothing to do with a MDIO mux on the PCI(e) bus. This is a pre-requisite to updating another binding file to YAML. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206180049.2086907-8-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: net: Convert GENET binding to YAMLFlorian Fainelli2-125/+145
Convert the GENET binding to YAML, leveraging brcm,unimac-mdio.yaml and the standard ethernet-controller.yaml files. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206180049.2086907-5-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: net: Document moca PHY interfaceFlorian Fainelli1-0/+1
MoCA (Multimedia over Coaxial) is used by the internal GENET/MOCA cores and will be needed in order to convert GENET to YAML in subsequent changes. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206180049.2086907-4-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: net: brcm,unimac-mdio: Update maintainers for bindingFlorian Fainelli1-0/+2
Add Doug and myself as maintainers since this binding is used by the GENET Ethernet controller for its internal MDIO controller. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206180049.2086907-3-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: net: brcm,unimac-mdio: reg-names is optionalFlorian Fainelli1-1/+0
The UniMAC MDIO controller integrated into GENET does not provide a reg-names property since it is optional, reflect that in the binding. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206180049.2086907-2-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: PCI: brcmstb: compatible is requiredFlorian Fainelli1-0/+1
The compatible property is required, make sure the binding documents it as such. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211202223609.1171452-1-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08ASoC: dt-bindings: rt5682s: add AMIC delay time propertyShuming Fan1-0/+4
Add the AMIC delay time to control how much delay time (ms) to unmute the stereo1 ADC. Signed-off-by: Shuming Fan <shumingf@realtek.com> Link: https://lore.kernel.org/r/20211208101654.28925-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-08dt-bindings: clock: lan966x: Extend for clock gate supportHoratiu Vultur1-1/+4
Allow to add an optional resource to be able to access the clock gate registers. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103085102.1656081-3-horatiu.vultur@microchip.com
2021-12-08dt-bindings: clock: lan966x: Add LAN966X Clock ControllerKavyasree Kotagiri1-0/+57
This adds the DT bindings documentation for lan966x SoC generic clock controller. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103061935.25677-3-kavyasree.kotagiri@microchip.com
2021-12-08dt-bindings: net: can: add support for Allwinner R40 CAN controllerEvgeny Boger1-0/+24
Allwinner R40 (also known as A40i, T3, V40) has a CAN controller. The controller is the same as in earlier A10 and A20 SoCs, but needs reset line to be deasserted before use. This patch Introduces new compatible for R40 CAN controller with required resets property. Link: https://lore.kernel.org/all/20211122104616.537156-2-boger@wirenboard.com Signed-off-by: Evgeny Boger <boger@wirenboard.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-12-07dt-bindings: arm: renesas: Document Renesas Spider boardsYoshihiro Shimoda1-0/+8
Add device tree bindings documentation for Renesas R-Car S4-8 Spider CPU and BreakOut boards. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07regulator: Fix type of regulator-coupled-max-spread propertyThierry Reding1-1/+1
According to the description and the various uses of this property it is meant to be an array of unsigned 32-bit values, so fixup the type to match that. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211206153726.227464-1-thierry.reding@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-07regulator: maxim,max8973: Document interrupts propertyThierry Reding1-0/+3
One of the examples in the bindings has an interrupts property and the Linux kernel driver has support for requesting an interrupt as well. It looks like the absence from the bindings was just an oversight. Add the property to make sure the examples can be validated. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211206153432.226963-1-thierry.reding@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-07dt-bindings: phy: qcom,qmp: Add SM8450 UFS phy compatibleVinod Koul1-0/+1
Document the UFS phy compatible for QMP UFS phy found in SM8450 SoC. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Martin K. Petersen <martin.petersen@oracle.com> Link: https://lore.kernel.org/r/20211201074456.3969849-3-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-07scsi: ufs: dt-bindings: Add SM8450 compatible stringsVinod Koul1-0/+1
Document "qcom,sm8450-ufshc" compatible string. "qcom,sm8450-ufshc" is for UFS HC found in SM8450 SoC. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Martin K. Petersen <martin.petersen@oracle.com> Link: https://lore.kernel.org/r/20211201074456.3969849-2-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-07media: dt-bindings: media: Add compatible for D1Samuel Holland1-0/+1
D1 contains a video engine similar to the one in other sunxi SoCs. Add a compatible for it. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2021-12-07Merge tag 'v5.16-rc4' into media_treeMauro Carvalho Chehab1-2/+3
Linux 5.16-rc4 * tag 'v5.16-rc4': (984 commits) Linux 5.16-rc4 KVM: SVM: Do not terminate SEV-ES guests on GHCB validation failure KVM: SEV: Fall back to vmalloc for SEV-ES scratch area if necessary KVM: SEV: Return appropriate error codes if SEV-ES scratch setup fails parisc: Mark cr16 CPU clocksource unstable on all SMP machines parisc: Fix "make install" on newer debian releases sched/uclamp: Fix rq->uclamp_max not set on first enqueue preempt/dynamic: Fix setup_preempt_mode() return value cifs: avoid use of dstaddr as key for fscache client cookie cifs: add server conn_id to fscache client cookie cifs: wait for tcon resource_id before getting fscache super cifs: fix missed refcounting of ipc tcon x86/xen: Add xenpv_restore_regs_and_return_to_usermode() x86/entry: Use the correct fence macro after swapgs in kernel CR3 fget: check that the fd still exists after getting a ref to it x86/entry: Add a fence for kernel entry SWAPGS in paranoid_entry() x86/sev: Fix SEV-ES INS/OUTS instructions for word, dword, and qword powercap: DTPM: Drop unused local variable from init_dtpm() io-wq: don't retry task_work creation failure on fatal conditions serial: 8250_bcm7271: UART errors after resuming from S2 ...
2021-12-07dt-bindings: arm: apple: Add apple,pmgr bindingHector Martin1-0/+134
The PMGR block in Apple Silicon SoCs is responsible for SoC power management. There are two PMGRs in T8103, with different register layouts but compatible registers. In order to support this as well as future SoC generations with backwards-compatible registers, we declare these blocks as syscons and bind to individual registers in child nodes. Each register controls one SoC device. The respective apple compatibles are defined in case device-specific quirks are necessary in the future, but currently these nodes are expected to be bound by the generic syscon driver. Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-07dt-bindings: power: Add apple,pmgr-pwrstate bindingHector Martin1-0/+71
This syscon child node represents a single SoC device controlled by the PMGR block. This layout allows us to declare all device power state controls (power/clock gating and reset) in the device tree, including dependencies, instead of hardcoding it into the driver. The register layout is uniform. Each pmgr-pwrstate node provides genpd and reset features, to be consumed by downstream device nodes. Future SoCs are expected to use backwards compatible registers, and the "apple,pmgr-pwrstate" represents any such interfaces (possibly with additional features gated by the more specific compatible), allowing them to be bound without driver updates. If a backwards incompatible change is introduced in future SoCs, it will require a new compatible, such as "apple,pmgr-pwrstate-v2". Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-07dt-bindings: watchdog: Add Apple WatchdogSven Peter1-0/+52
Apple SoCs come with a simple embedded watchdog. This watchdog is also required in order to reset the SoC. Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sven Peter <sven@svenpeter.dev> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-07dt-bindings: vendor-prefixes: add YADROAndrei Kartashev1-0/+2
Add vendor prefix for YADRO (https://www.yadro.com/) Signed-off-by: Andrei Kartashev <a.kartashev@yadro.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211119120057.12118-2-a.kartashev@yadro.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-06dt-bindings: bq25980: Fixup the exampleThierry Reding1-1/+1
Use the ti,watchdog-timeout-ms property instead of the unsupported ti,watchdog-timer property to make the example validate correctly. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211206152905.226239-1-thierry.reding@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-06dt-bindings: Use correct vendor prefix for Asahi Kasei Corp.Thierry Reding3-3/+3
The old "ak" vendor prefix that was never officially accepted was still being used in some examples. Convert to the correct vendor prefix (i.e. "asahi-kasei"). Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211206144802.217073-1-thierry.reding@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-06dt-bindings: Only show unique unit address warning for enabled nodesSam Protsenko1-1/+3
There are valid cases when two nodes can have the same address. For example, in Exynos SoCs there is USI IP-core, which might be configured to provide UART, SPI or I2C block, all of which having the same base register address. But only one can be enabled at a time. That looks like this: usi@138200c0 { serial@13820000 { status = "okay"; }; i2c@13820000 { status = "disabled"; }; }; When running "make dt_binding_check", it reports next warning: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000) Disable "unique_unit_address" in DTC_FLAGS to suppress warnings like that, but enable "unique_unit_address_if_enabled" warning, so that dtc still reports a warning when two enabled nodes are having the same address. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211203183517.11390-1-semen.protsenko@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-06dt-bindings: input: gpio-keys: Fix interrupts in exampleGeert Uytterhoeven1-1/+1
The "interrupts" property in the example looks weird: - The type is not in the last cell, - Level interrupts don't work well with gpio-keys, as they keep the interrupt asserted as long as the key is pressed, causing an interrupt storm. Use a more realistic falling-edge interrupt instead. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/47ecd2d8efcf09f8ab47de87a7bcfafc82208776.1638538079.git.geert+renesas@glider.be Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-06dt-bindings: net: Reintroduce PHY no lane swap bindingAlexander Stein1-0/+8
This binding was already documented in phy.txt, commit 252ae5330daa ("Documentation: devicetree: Add PHY no lane swap binding"), but got accidently removed during YAML conversion in commit d8704342c109 ("dt-bindings: net: Add a YAML schemas for the generic PHY options"). Note: 'enet-phy-lane-no-swap' and the absence of 'enet-phy-lane-swap' are not identical, as the former one disable this feature, while the latter one doesn't change anything. Fixes: d8704342c109 ("dt-bindings: net: Add a YAML schemas for the generic PHY options") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20211130082756.713919-1-alexander.stein@ew.tq-group.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-06Merge tag 'spi-fix-v5.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spiLinus Torvalds1-0/+1
Pull spi fix from Mark Brown: "Just one trivial update adding a device ID to the DT bindings" * tag 'spi-fix-v5.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: spi-rockchip: Add rk3568-spi compatible
2021-12-06Merge branch 'icc-sc7280' into icc-nextGeorgi Djakov1-0/+1
Add Epoch Subsystem (EPSS) L3 provider support on SM7280 SoCs. * icc-sc7280 dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280 interconnect: qcom: Add EPSS L3 support on SC7280 Link: https://lore.kernel.org/r/1634812857-10676-1-git-send-email-okukatla@codeaurora.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-06ASoC: mediatek: support memory-region assignmentMark Brown1-0/+8
Merge series from Trevor Wu <trevor.wu@mediatek.com>: This series of patches adds support for memory-region assignment, so the access region of DMA engine could be restricted. Patches are based on broonie tree "for-next" branch. Trevor Wu (2): ASoC: mediatek: mt8195: support reserved memory assignment dt-bindings: mediatek: mt8195: add memory-region property .../devicetree/bindings/sound/mt8195-afe-pcm.yaml | 8 ++++++++ sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 7 +++++++ 2 files changed, 15 insertions(+) -- 2.18.0
2021-12-06Merge remote-tracking branch 'drm/drm-next' into msm-next-stagingRob Clark12-91/+616
Backmerge drm-next to pull in: 8f59ee9a570c ("drm/msm/dsi: Adjust probe order") Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-12-06Merge tag 'asoc-fix-v5.16-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linusTakashi Iwai1-0/+3
ASoC: Fixes for v5.16 A relatively large collection of updates, the size is increased quite a bit by there being some repetitive changes for similar issues that occur multiple times with both notifying control value changes and runtime PM. The Rockchip update looks at first glance like a cleanup but fixes instantiation of the hardware on some systems.
2021-12-06dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TXLaurent Pinchart1-0/+118
The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It can operate in either DSI or CSI-2 mode, with up to four data lanes. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-06dt-bindings: clock: Add RPMHCC bindings for SM8450Vinod Koul1-0/+1
Add bindings and update documentation for clock rpmh driver on SM8450. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072310.3968679-3-vkoul@kernel.org
2021-12-06ASoC: mediatek: mt8195: add memory-region propertyTrevor Wu1-0/+8
Add a required property "memory-region", which is used to specify memory for DMA usage. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20211130053905.28470-3-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-06ASoC: mediatek: mt8195: add adsp and dai-link propertyTrevor Wu1-0/+10
1. adsp phandle can be assigned to the machine driver if adsp is enabled. 2. dai-link supported in the sound card can be specified from DTS. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20211129141057.12422-5-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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