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2014-12-04clocksource: arch_timer: Fix code to use physical timers when requestedSonny Rao3-1/+22
This is a bug fix for using physical arch timers when the arch_timer_use_virtual boolean is false. It restores the arch_counter_get_cntpct() function after removal in 0d651e4e "clocksource: arch_timer: use virtual counters" We need this on certain ARMv7 systems which are architected like this: * The firmware doesn't know and doesn't care about hypervisor mode and we don't want to add the complexity of hypervisor there. * The firmware isn't involved in SMP bringup or resume. * The ARCH timer come up with an uninitialized offset between the virtual and physical counters. Each core gets a different random offset. * The device boots in "Secure SVC" mode. * Nothing has touched the reset value of CNTHCTL.PL1PCEN or CNTHCTL.PL1PCTEN (both default to 1 at reset) One example of such as system is RK3288 where it is much simpler to use the physical counter since there's nobody managing the offset and each time a core goes down and comes back up it will get reinitialized to some other random value. Fixes: 0d651e4e65e9 ("clocksource: arch_timer: use virtual counters") Cc: stable@vger.kernel.org Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04memory: Add NVIDIA Tegra memory controller supportThierry Reding16-1482/+3988
The memory controller on NVIDIA Tegra exposes various knobs that can be used to tune the behaviour of the clients attached to it. Currently this driver sets up the latency allowance registers to the HW defaults. Eventually an API should be exported by this driver (via a custom API or a generic subsystem) to allow clients to register latency requirements. This driver also registers an IOMMU (SMMU) that's implemented by the memory controller. It is supported on Tegra30, Tegra114 and Tegra124 currently. Tegra20 has a GART instead. The Tegra SMMU operates on memory clients and SWGROUPs. A memory client is a unidirectional, special-purpose DMA master. A SWGROUP represents a set of memory clients that form a logical functional unit corresponding to a single device. Typically a device has two clients: one client for read transactions and one client for write transactions, but there are also devices that have only read clients, but many of them (such as the display controllers). Because there is no 1:1 relationship between memory clients and devices the driver keeps a table of memory clients and the SWGROUPs that they belong to per SoC. Note that this is an exception and due to the fact that the SMMU is tightly integrated with the rest of the Tegra SoC. The use of these tables is discouraged in drivers for generic IOMMU devices such as the ARM SMMU because the same IOMMU could be used in any number of SoCs and keeping such tables for each SoC would not scale. Acked-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-03ARM: at91: remove unused board.h fileArnd Bergmann2-121/+0
All functions declared in this file are gone. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [nicolas.ferre@atmel.com: re-order patches so modify board-dt-sam9] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-12-03ARM: at91: remove unneeded header filesNicolas Ferre2-179/+0
These files were left behind with no reason. Remove them. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-12-03ARM: at91/clocksource: remove !DT PIT initializationsArnd Bergmann2-34/+0
As AT91 !DT code is now removed, cleanup the PIT clocksource driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [nicolas.ferre@atmel.com: split patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Boris BREZILLON <boris.brezillon@free-electrons.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-12-02ARM: at91: at91rm9200 ST initialization is now DT onlyArnd Bergmann3-27/+0
As at91rm9200 is now DT only, there is no need to keep old entry point in this at91rm9200 System Timer (ST) driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [nicolas.ferre@atmel.com: split patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-12-02ARM: at91: remove old AT91-specific driversArnd Bergmann8-1289/+3
GPIO and LED drivers were replaced by generic ones for DT boards. These drivers were remaining: delete them now. Modifications are also done on the corresponding header files. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [nicolas.ferre@atmel.com: split patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-12-02ARM: at91: cleanup initilisation code by removing dead codeArnd Bergmann3-73/+0
The AT91-specific SoC strucutre "struct at91_init_soc" was filled with specific !DT initilisation functions. Now that we got rid of the !DT board file description, remove unneeded functions. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [nicolas.ferre@atmel.com: split patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-12-02ARM: at91/Kconfig: select board files automaticallyArnd Bergmann1-12/+2
An explicit selection option is not needed for board files so now we select the board from SoC option. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [nicolas.ferre@atmel.com: remove option's comments; split patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-11-28bus: brcmstb_gisb: Add register offset tables for older chipsKevin Cernekee2-7/+51
This will select the appropriate register layout based on the DT "compatible" string. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-28bus: brcmstb_gisb: Look up register offsets in a tableKevin Cernekee1-8/+34
There are at least 4 incompatible variations of this hardware block, so let's use the ARB_* constants as a table index instead of hardcoding specific register offsets. Also, allow for the possibility of adding old devices that are missing some of the registers. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-28bus: brcmstb_gisb: Introduce wrapper functions for MMIO accessesKevin Cernekee1-7/+17
These will be used to abstract out chip-to-chip differences. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-28bus: brcmstb_gisb: Make the driver buildable on MIPSKevin Cernekee2-1/+5
BCM7xxx ARM and MIPS platforms share a similar hardware block for reporting GISB errors, so they both benefit from the use of this driver. Conditionally compile the ARM-specific bus error handler so that the GISB error IRQ handler works on other architectures. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-27ARM: at91: remove unused IRQ function declarationsNicolas Ferre1-4/+0
Since 3b26f39b0ab1 (ARM: at91: make use of the new AIC driver for dt enabled boards) the old IRQ initialisation functions aren't used anymore: remove their declaration in generic.h. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-27ARM: at91: remove legacy IRQ driver and related codeNicolas Ferre9-427/+0
Remove irc.c and associated header file. The related code was idendified by the CONFIG_OLD_IRQ_AT91 option that was removed previously. It has been spotted by following coccinelle semantic match: @rule1@ expression E; statement S; @@ ( - if (IS_ENABLED(CONFIG_OLD_IRQ_AT91)) S | - if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && E) S ) Cc: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91: remove old at91-specific clock driverNicolas Ferre5-1047/+0
This clock driver collection was specific to AT91 and only used in !DT cases. All clocks and the clock trees for all Atmel SoCs are now described by drivers using the common clock framework. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91: remove clock data in at91sam9n12.c and at91sam9x5.c filesNicolas Ferre2-520/+4
As the CONFIG_OLD_CLK_AT91 option is gone, let's completely remove the AT91 old clock driver related data. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91: remove all !DT related configuration optionsNicolas Ferre1-20/+7
OLD_CLK_AT91 & OLD_IRQ_AT91 were only selected by entries in Kconfig.non_dt that are now gone. So we remove all this legacy stuff and select the proper options in the SOC_ entries. As USE_OF is now selected directly in arch/arm/Kconfig AT91 entry, we can safely remove it everywhere in this file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91/trivial: update Kconfig comment to mention SAMA5Nicolas Ferre1-1/+1
Cortex-A5 SAMA5 processors were not listed, add this in the AT91 comment. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91: always USE_OF from now onNicolas Ferre1-1/+2
As we always use Device Tree now, we can add the configuration here. Also remove the condition for PINCTRL_AT91. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91/Kconfig: remove ARCH_AT91RM9200 option for driversNicolas Ferre3-4/+4
The precise selection is useless, so we simply remove these dependencies. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>