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All registers are located within 0x400 size from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add UniPhier AIDET (ARM Interrupt Detector) nodes to support
active low interrupts.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This reverts commit ddb56254ae52acff7bd7fbd8f963e79bffc324d4. The EMAC
bindings have not stabilized yet, so we can't commit to keeping them
stable.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Rockchip's rv1108-evb board has one usb otg controller and one usb
host controller, each usb controller connect with one usb-phy port
through UTMI+ interface. This patch enables them to support usb on
rv1108-evb board.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This patch adds usb otg/host controllers and phys nodes for RV1108 SoCs.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This patch adds the compatible of GRF and USBGRF for RV1108 SoCs.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The window of the Aspeed AST2400 SMC Controllers to map chips on the
AHB Bus has a 256MB size. The full window range is
[ 0x20000000 - 0x2FFFFFFF ] for the FMC controller
[ 0x30000000 - 0x3FFFFFFF ] for the SPI controller
This change requires CONFIG_VMSPLIT_2G to be set.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The cpu is powered by regulator vdd_core on RV1108 evalution
board. Add it to the cpu dt node.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add cpu opp table for rv1108 to support frequency
from 408MHZ to 1008MHZ.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This adds the operating points to the Ux500 device tree and
deletes the old special-purpose cpufreq node, as we can now
use the generic DT cpufreq driver.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add VPU/VDEC/VOP/IEP iommu nodes
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Earlyconsole is used for early kernel debugging that's why this option
shouldn't be enabled by default.
Earlyconsole is partially copying the part of the bootlog after
"bootconsole [uart0] disabled".
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Change the dtsi include code to use the C pre-processor #include instead
of the device tree /include/. This brings all Zynq device trees inline
with each other.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This will simplify dt overlay structure for the whole PL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Mention device-type = "ethernet-phy", as qemu will need this in absence
of compatible.
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Describe adv7511 on i2c bus.
Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This adds a new node for the LEGO MINDSTORMS EV3 LCD display.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Add dt node of bosch accelerometer bma250e on rv1108 evb.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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RK805 is used as the voltage regulator on rv1108 evaluation
board. Add device tree node for it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The BPI-M3 is an Allwinner A83T based SBC in the Bananapi/Bpi family.
It is roughly the same form factor as the BPI-M1+, with roughly the
same peripherals and connectors:
- 2GB LPDDR3 DRAM
- 8GB eMMC
- Micro-SD card slot
- HDMI output
- Headset (stereo + mic) jack
- Onboard mic
- Gigabit Ethernet with RTL8211E transceiver
- Ampak AP6212 WiFi + BT
- USB OTG connector
- USB-to-SATA bridge connected through a USB 2.0 hub
- Consumer IR receiver
- MIPI DSI LCD panel connector
- Camera interface (parallel and MIPI CSI) connector
- 3 LEDs (Red, Green, Blue), of which 2 are controllable (GB)
- Raspberry Pi 2 compatible GPIO header
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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RV1108 EVB uses pwm0 modulate the backlight, add dt
node to enable it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add pwm device tree node for rv1108 soc
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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dtc recently added PCI bus checks. Fix these warnings.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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dtc recently added PCI bus checks. Fix these warnings.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The h8homlet board has the A83T's standard USB 1.1/2.0 host pair routed
to a USB host port on the board. The other USB host port is routed to
USB OTG controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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The Cubietruck-plus has a GL830 USB-to-SATA bridge connected to EHCI0,
and a USB3503 HSIC USB 2.0 hub connected to EHCI1. The USB3503's I2C
control interface is not connected.
This patch enables both EHCI controllers, adds a device node for the
USB hub, and includes sunxi-common-regulators.dtsi for the VBUS
regulators. The existing reg_vcc3v3 is dropped as it is also available
in the set of common regulators. Other unused regulators are disabled.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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The USB OTG controller found on the A83T is compatible with the one
found on the A33.
Add a device node for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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The A83T has 3 USB PHYs, 1 for USB OTG, 1 for standard USB 2.0, 1 for
USB HSIC. EHCI0/OHCI0 are the standard USB host pair, while EHCI1 is
the host controller for HSIC. OTG is not added yet.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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This uses trigger-sources documented in commit 80dc6e1cd85fc ("dt-bindings:
leds: document new trigger-sources property") to specify USB ports. Such an
information can be used by operating system to setup LEDs behavior.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Add dt nodes for generic-ehci/ohci host controller.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Use serial0 alias to select stdout-path on Cygnus bcm911360_entphon
board.
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Add nodes for peripherals in Cygnus dtsi: sdhci, keypad, spi, dma,
pinmux configs.
Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Add PMU capability to Cygnus so trace and performance profiling
can be used.
Signed-off-by: Jason Uy <jason.uy@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Move v3d devicetree node to proper address ordered location in Cygnus
dtsi.
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Fix incorrect Cygnus UART2 register base.
Fixes: 0f0b21a83ad2 ("ARM: dts: Move all Cygnus peripherals into axi bus")
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Fixes commit 687c27676151 ("ARM: dts: Add minimal support for LogicPD
Torpedo DM3730 devkit")
This patch corrects an issue where the cd-gpios was improperly setup
using IRQ_TYPE_LEVEL_LOW instead of GPIO_ACTIVE_LOW.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Latest update to the BeagleBoard-X15 platform (revision C). This board contains
a silicon update (Rev 2.0), which includes a fix for the 2nd ethernet phy when
running at 1000 Mbps speeds.
This board can be indentified by the [C.00] after [BBRDX15_] in the at24 eeprom:
[BBRDX15_C.001731PX150249]
Rev C is now in full production and boards are available for end users.
https://beagleboard.org/x15
https://github.com/beagleboard/beagleboard-x15/
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Nishanth Menon <nm@ti.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Kishon Vijay Abraham I <kishon@ti.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Override the compatible string of the first USB controller to enable
device mode.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Override the compatible string of the first USB controller to enable
device mode.
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Override the compatible string of the first USB controller to enable
device mode.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Override the compatible string of the first USB controller to enable
device mode.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Use newly added R-Car SATA Gen2 fallback compat string
in the DT of the r8a7791 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before the fallback compat string is considered.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Use newly added R-Car SATA Gen2 fallback compat string
in the DT of the r8a7790 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before the fallback compat string is considered.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add needed information inside CPU0 for the generic cpufreq-cpu0 driver.
- clock-latency = 300 us
Approximate worst-case latency to do clock transition for every
OPPs. Using an arbitrary safe value similar to r8a7791(R-Car M2) Soc.
- operating-points = < kHz - uV >
List of 6 operating points. All of them are using the same voltage
since DVS is not supported in RZ/G1 Soc.
Note:This also fixes the below errors seen on kernel logs
[ 0.876877] cpu cpu0: dev_pm_opp_get_opp_count: OPP table not found (-19)
[ 0.883727] cpu cpu1: cpufreq_init: failed to get clk: -2
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add DT nodes for the Advanced Power Management Unit (APMU) and the
second CPU core. Use the enable-method to point out that the APMU
should be used for SMP support.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Document APMU and SMP enable method for RZ/G1M
(also known as r8a7743) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Document the iW-RainboW-G22D device tree bindings.
It is just a placeholder for the time being, the actual
implementation is not available yet.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Document the iW-RainboW-G22M-SM SODIMM System on Module device tree
bindings. It is just a placeholder for the time being, the actual
implementation is not available yet.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The adv7511 on the Koelsch board has a 12 MHz fixed clock
for the CEC block. Specify this in the dts to enable CEC support.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra71-evm.dts.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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