| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
- refactor i915/snd-hda interaction to use the component framework (Imre)
- psr cleanups and small fixes (Rodrigo)
- a few perf w/a from Ken Graunke
- switch to atomic plane helpers (Matt Roper)
- wc mmap support (Chris Wilson & Akash Goel)
- smaller things all over
* tag 'drm-intel-next-2015-01-17' of git://anongit.freedesktop.org/drm-intel: (40 commits)
drm/i915: Update DRIVER_DATE to 20150117
i915: reuse %ph to dump small buffers
drm/i915: Ensure the HiZ RAW Stall Optimization is on for Cherryview.
drm/i915: Enable the HiZ RAW Stall Optimization on Broadwell.
drm/i915: PSR link standby at debugfs
drm/i915: group link_standby setup and let this info visible everywhere.
drm/i915: Add missing vbt check.
drm/i915: PSR HSW/BDW: Fix inverted logic at sink main_link_active bit.
drm/i915: PSR VLV/CHV: Remove condition checks that only applies to Haswell.
drm/i915: VLV/CHV PSR needs to exit PSR on every flush.
drm/i915: Fix kerneldoc for i915 atomic plane code
drm/i915: Don't pretend SDVO hotplug works on 915
drm/i915: Don't register HDMI connectors for eDP ports on VLV/CHV
drm/i915: Remove I915_HAS_HOTPLUG() check from i915_hpd_irq_setup()
drm/i915: Make hpd arrays big enough to avoid out of bounds access
Revert "drm/i915/chv: Use timeout mode for RC6 on chv"
drm/i915: Improve HiZ throughput on Cherryview.
drm/i915: Reset CSB read pointer in ring init
drm/i915: Drop unused position fields (v2)
drm/i915: Move to atomic plane helpers (v9)
...
|
|
This adds the bindings for AC97 controller device tree support.
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-By Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
|
|
|
MT8173 is a 64-bit four core Soc.
And mt8173-evb is a evaluation board based on mt8173.
This commit add the devicetree binding document for
mediatek MT8173 SoC
MT8173 sysirq
MT8173 uart
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
|
|
During a recent cleanup of the arm64 DTs it has become clear that
the handling of PPIs in xxxx_set_type() is incorrect. The ARM TRMs
for GICv2 and later allow for "implementation defined" support for
setting the edge or level type of the PPI interrupts and don't restrict
the activation level of the signal. Current ARM implementations
do restrict the PPI level type to IRQ_TYPE_LEVEL_LOW, but licensees
of the IP can decide to shoot themselves in the foot at any time.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Marc Zyngier <Marc.Zyngier@arm.com>
Cc: LAKML <linux-arm-kernel@lists.infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: http://lkml.kernel.org/r/1421772779-25764-1-git-send-email-Liviu.Dudau@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
|
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/505a65c8861e5210d94227bc0eec89cab0593fca.1421317616.git.baruch@tkos.co.il
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
|
On dm81xx we have 128 interrupts like am33xx has. Let's add
compatible flags for dm814x and dm816x, and document the
existing binding.
As the dm81xx are booting in device tree only mode, we can now
also remove ti81xx_init_irq() legacy function.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1421187806-6804-2-git-send-email-tony@atomide.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
|
Add r8a7779 specific support for IRLM bit configuration
in the INTC-IRQPIN driver. Without this code we need
special workaround code in arch/arm/mach-shmobile.
The IRLM bit for the INTC hardware exists on various
older SH-based SoCs and is used to select between two
modes for the external interrupt pins IRQ0 to IRQ3:
IRLM = 0: (default from reset on r8a7779)
In this mode the pins IRQ0 to IRQ3 are used together
to give a value between 0 and 15 to the SoC. External
logic is required for masking. This mode is not
supported by the INTC-IRQPIN driver.
IRLM = 1: (needs this patch or configuration elsewhere)
In this mode IRQ0 to IRQ3 operate as 4 individual
external interrupt pins. In this mode the SMSC ethernet
chip can be used via IRQ1 on r8a7779 Marzen. This mode
is the only supported mode by the INTC-IRQPIN driver.
For this patch to work the r8a7779 DTS needs to pass
the ICR0 register as the last register bank.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: horms@verge.net.au
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/20141203121803.5936.35881.sendpatchset@w520
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
|
Add support for "ina231" as compatible string, and update
Documentation and Kconfig accordingly.
Tested with the Exynos5422-based odroid-xu3 board which has on-board
INA231 sensors.
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
|
|
This attribute allows to configure the update interval of ina226. Although
the bus and shunt voltage conversion times remain hardcoded to 1.1 ms, we can
now modify said interval by changing the averaging rate.
While we're at it - add an additional variable to ina2xx_data, which holds
the current configuration settings - this way we'll be able to restore the
configuration in case of an unexpected chip reset.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
|
|
The shunt resistance can only be set via platform_data or device tree. This
isn't suitable for devices in which the shunt resistance can change/isn't
known at boot-time.
Add a sysfs attribute that allows to read and set the shunt resistance.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
|
|
This adds vendor prefix and root compatible property for following boards
- Firefly, Firefly-RK3288 boards (both beta and mass production version)
- ChipSPARK, Rayeager PX2 board
PX2 SoC is fully compatible with RK3066.
Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Other drivers are following the following compatible string format for dts:
s/_/-/
Because some devices may still use the previous string, the new corrected
string is added to the of_device_id table.
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
|
|
Other drivers are following the following compatible string format for dts:
s/_/-/
Because some devices may still use the previous string, the new corrected
string is added to the of_device_id table.
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
|
|
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
|
The kernel forcefully applies MTU values received in router
advertisements provided the new MTU is less than the current. This
behavior is undesirable when the user space is managing the MTU. Instead
a sysctl flag 'accept_ra_mtu' is introduced such that the user space
can control whether or not RA provided MTU updates should be applied. The
default behavior is unchanged; user space must explicitly set this flag
to 0 for RA MTUs to be ignored.
Signed-off-by: Harout Hedeshian <harouth@codeaurora.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
Add the devicetree binding document for Cosmic Circuits 10001 ADC device.
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Phani Movva <Phani.Movva@imgtec.com>
Signed-off-by: Naidu Tellapati <Naidu.Tellapati@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
|
As no property for phy regulator was documented in this dt-binding documentation,
this commit adds an entry for the optional property phy-supply.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
Updating exynos-thermal.txt documentation entry for Exynos5440
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
|
|
Properties necessary for providing Exynos thermal configuration via device
tree.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
|
|
CLK_S_ICN_REG_0 hasn't existed for a while now. This was renamed
over a few commits, then finally removed in commit 5aa02b9 (ARM:
STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock).
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
|
|
This patch replaces all custom samsung,power-domain dt
properties with generic power domain bindings and updates
documentation Samsung's devices referring to old binding.
Suggested-by: Kevin Hilman <khilman@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
[javier.martinez@collabora.co.uk: tested on the Exynos5800 Peach Pi Chromebook]
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
|
|
Everything uses dmaengine now, so there is no reason to
keep this around any longer. Thanks to everyone who was involved
in moving the users over to use the dmaengine APIs.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
|
|
Pull platform driver fix from Darren Hart:
"Revert keyboard backlight sysfs support and documentation.
The support for the dell-laptop keyboard backlight was flawed and the
fix:
https://lkml.org/lkml/2015/1/14/539
was more invasive that I felt comfortable sending at RC5.
This series reverts the support for the dell-laptop keyboard backlight
as well as the documentation for the newly created sysfs attributes.
We'll get this implemented correctly for 3.20"
* tag 'platform-drivers-x86-v3.19-2' of git://git.infradead.org/users/dvhart/linux-platform-drivers-x86:
Revert "platform: x86: dell-laptop: Add support for keyboard backlight"
Revert "Documentation: Add entry for dell-laptop sysfs interface"
|
|
Merge "arm64: Add initial Tegra support" from Thierry Reding:
This adds support for the Tegra132 SoC, which is essentially a Tegra124
with a dual Denver CPU complex instead of the quad-Cortex-A15. There is
not much here, only the Kconfig entries, but it will allow us to more
easily get subsequent patches in (many of which have already been sent
for review).
* tag 'tegra-for-3.20-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: Add Tegra132 support
soc: tegra: Add thermal reset (thermtrip) support to PMC
ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
of: Add descriptions of thermtrip properties to Tegra PMC bindings
soc/tegra: pmc: Add Tegra132 support
soc/tegra: fuse: Add Tegra132 support
soc/tegra: fuse: Constify tegra_fuse_info structures
soc/tegra: Add Tegra132 support
clocksource: Build Tegra timer on 32-bit ARM only
soc/tegra: pmc: restrict compilation of suspend-related support to ARM
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Pull devicetree bug fixes and documentation updates from Grant Likely:
"A few bugfixes for the new DT overlay feature, documentation updates,
spelling corrections, and changes to MAINTAINERS. Nothing earth
shattering here"
* tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
of/unittest: Overlays with sub-devices tests
of/platform: Handle of_populate drivers in notifier
of/overlay: Do not generate duplicate nodes
devicetree: document the "qemu" and "virtio" vendor prefixes
devicetree: document ARM bindings for QEMU's Firmware Config interface
Documentation: of: fix typo in graph bindings
dma-mapping: fix debug print to display correct dma_pfn_offset
of: replace Asahi Kasei Corp vendor prefix
ARM: dt: GIC: Spelling s/specific/specifier/, s/flaggs/flags/
dt/bindings: arm-boards: Spelling s/pointong/pointing/
MAINTAINERS: Update DT website and git repository
MAINTAINERS: drop DT regex matching on of_get_property and of_match_table
|
|
Merge "ARM: tegra: Core code changes for v3.20" from Thierry Reding:
This contains a couple of preparatory patches for 64-bit support. A new
feature is implemented in the power-management controller which allows
it to switch off the SoC if it overheats.
* tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc: tegra: Add thermal reset (thermtrip) support to PMC
ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
of: Add descriptions of thermtrip properties to Tegra PMC bindings
soc/tegra: pmc: Add Tegra132 support
soc/tegra: fuse: Add Tegra132 support
soc/tegra: fuse: Constify tegra_fuse_info structures
soc/tegra: Add Tegra132 support
clocksource: Build Tegra timer on 32-bit ARM only
soc/tegra: pmc: restrict compilation of suspend-related support to ARM
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Merge "ARM: imx: device tree changes for 3.20" from Shawn Guo:
The i.MX device tree update for 3.20:
- Update i.MX6 operating-points setting in device tree to match the
latest i.MX6 data sheet
- Add i.MX6SX sabreauto board support
- Add imx6dl-udoo board support based off imx6q-udoo
- Update sabrelite board to include I2C and HDMI support
- Update the VPU compatible strings to also use cnm,coda<model>
- Remove the ocram clock from the VPU node, as the clock is already
provided inside the ocram node
- Add system reset controller and syscon-reboot for VF610
- Update VF610 device tree to use zero based naming for GPIO nodes,
so that the number scheme matches hardware manual
- A number of random device additions like watchdog for VF610, sahara
for i.MX53, QSPI for imx6sx-sdb board, etc.
Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.
* tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (28 commits)
ARM: dts: imx28-evk: remove duplicate property
ARM: vf610: use zero based naming for GPIO nodes
ARM: dts: imx6q: enable dma for ecspi5
ARM: dts: vfxxx: Add SNVS node
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: dts: imx6dl-udoo: Add board support based off imx6q-udoo
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: dts: imx6sx: add i.mx6sx sabreauto board support
ARM: dts: imx6sx-sdb: Add QSPI support
ARM: dts: imx6qdl: Remove OCRAM clock from VPU node
ARM: imx: apf51dev: add gpio-backlight support
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
ARM: i.MX53: dts: add sahara module
ARM: dts: imx6dl: correct cpufreq volt/freq table
ARM: dts: imx6q: update cpufreq volt/freq table
...
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Merge "ARM: imx: soc changes for 3.20" from Shawn Guo:
The i.MX SoC changes for 3.20:
- Add .disable_unused function hook for shared gate clock to ensure
the clock tree use count matches the hardware state
- Add a deeper idle state for i.MX6SX cpuidle driver powering off the
ARM core
- One correction on i.MX6Q esai_ipg parent clock setting
- Add a missing iounmap call for imx6q_opp_check_speed_grading()
- Add missing clocks for VF610 UART4, UART5 and SNVS blocks
- Expand VF610 device tree compatible matching table to cover more
Vybrid family SoCs
- Expand i.MX clk-pllv3 a bit with the shift for frequency multiplier
to support Vybrid's USB PLL oddity
* tag 'imx-soc-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: refine esai_ipg's parent
ARM i.MX6q: unmap memory mapped at imx6q_opp_check_speed_grading()
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Merge "mvebu/dt #2" from Andrew Lunn:
Second set of dt patches for mvebu for v3.20.
* tag 'mvebu-dt-3.20-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: make DTS comments reflect DEBUG_LL changes
ARM: mvebu: Armada 385 GP: Add regulators to the SATA port
ARM: Kirkwood: Added support for pogoplug e02 (pink/gray)
ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38x
dt: bindings: update mvebu-mbus DT binding with new compatible properties
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Merge "ARM: rockchip: soc updates for v3.20" from Heiko Stübner:
SoC parts of basic suspend support and removal of
Cortex-A9 reference from the machine name.
* tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: remove cpu-core name from machine name
ARM: rockchip: Add pmu-sram binding
ARM: rockchip: add suspend and resume for RK3288
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
This reverts commit 3161293ba6dfceee9c1efe75185677445def05d4.
This interface was determined to be flawed and required too invasive a
fix for the RC cycle. This will be revisited in 3.20.
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
|
|
Emulate deprecated 'setend' instruction for AArch32 bit tasks.
setend [le/be] - Sets the endianness of EL0
On systems with CPUs which support mixed endian at EL0, the hardware
support for the instruction can be enabled by setting the SCTLR_EL1.SED
bit. Like the other emulated instructions it is controlled by an entry in
/proc/sys/abi/. For more information see :
Documentation/arm64/legacy_instructions.txt
The instruction is emulated by setting/clearing the SPSR_EL1.E bit, which
will be reflected in the PSTATE.E in AArch32 context.
This patch also restores the native endianness for the execution of signal
handlers, since the process could have changed the endianness.
Note: All CPUs on the system must have mixed endian support at EL0. Once the
handler is registered, hotplugging a CPU which doesn't support mixed endian,
could lead to unexpected results/behavior in applications.
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
|
|
Add i2c-mux-idle-disconnect device tree property to PCA954x mux driver. The new
property forces the multiplexer to disconnect child buses in idle state. This is
used, for example, when there are several multiplexers on the same bus and the
devices on the underlying buses might have same I2C addresses.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nsn.com>
[wsa: added a newline]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
|
|
Hardware-triggered thermal reset requires configuring the I2C
reset procedure. This configuration is read from the device tree,
so document the relevant properties in the binding documentation.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
KVM: s390: fixes and features for kvm/next (3.20)
1. Generic
- sparse warning (make function static)
- optimize locking
- bugfixes for interrupt injection
- fix MVPG addressing modes
2. hrtimer/wakeup fun
A recent change can cause KVM hangs if adjtime is used in the host.
The hrtimer might wake up too early or too late. Too early is fatal
as vcpu_block will see that the wakeup condition is not met and
sleep again. This CPU might never wake up again.
This series addresses this problem. adjclock slowing down the host
clock will result in too late wakeups. This will require more work.
In addition to that we also change the hrtimer from REALTIME to
MONOTONIC to avoid similar problems with timedatectl set-time.
3. sigp rework
We will move all "slow" sigps to QEMU (protected with a capability that
can be enabled) to avoid several races between concurrent SIGP orders.
4. Optimize the shadow page table
Provide an interface to announce the maximum guest size. The kernel
will use that to make the pagetable 2,3,4 (or theoretically) 5 levels.
5. Provide an interface to set the guest TOD
We now use two vm attributes instead of two oneregs, as oneregs are
vcpu ioctl and we don't want to call them from other threads.
6. Protected key functions
The real HMC allows to enable/disable protected key CPACF functions.
Lets provide an implementation + an interface for QEMU to activate
this the protected key instructions.
|
|
Most SIGP orders are handled partially in kernel and partially in
user space. In order to:
- Get a correct SIGP SET PREFIX handler that informs user space
- Avoid race conditions between concurrently executed SIGP orders
- Serialize SIGP orders per VCPU
We need to handle all "slow" SIGP orders in user space. The remaining
ones to be handled completely in kernel are:
- SENSE
- SENSE RUNNING
- EXTERNAL CALL
- EMERGENCY SIGNAL
- CONDITIONAL EMERGENCY SIGNAL
According to the PoP, they have to be fast. They can be executed
without conflicting to the actions of other pending/concurrently
executing orders (e.g. STOP vs. START).
This patch introduces a new capability that will - when enabled -
forward all but the mentioned SIGP orders to user space. The
instruction counters in the kernel are still updated.
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
|
|
In order to get rid of the action_flags and to properly migrate pending SIGP
STOP irqs triggered e.g. by SIGP STOP AND STORE STATUS, we need to remember
whether to store the status when stopping.
For this reason, a new parameter (flags) for the SIGP STOP irq is introduced.
These flags further define details of the requested STOP and can be easily
migrated.
Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
|
|
With commit c6c956b80bdf ("KVM: s390/mm: support gmap page tables with less
than 5 levels") we are able to define a limit for the guest memory size.
As we round up the guest size in respect to the levels of page tables
we get to guest limits of: 2048 MB, 4096 GB, 8192 TB and 16384 PB.
We currently limit the guest size to 16 TB, which means we end up
creating a page table structure supporting guest sizes up to 8192 TB.
This patch introduces an interface that allows userspace to tune
this limit. This may bring performance improvements for small guests.
Signed-off-by: Dominik Dingel <dingel@linux.vnet.ibm.com>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
|
|
When IOMMU bypass is enabled, a PCI device can read and write memory
that was not mapped by the driver without causing an EEH. That might
cause memory corruption, for example.
When we disable bypass, DMA reads and writes to addresses not mapped by
the IOMMU will cause an EEH, allowing us to debug such issues.
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
|
|
Now that /proc/keys is used by libkeyutils to look up a key by type and
description, we should make it unconditional and remove
CONFIG_DEBUG_PROC_KEYS.
Reported-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: David Howells <dhowells@redhat.com>
Tested-by: Jiri Kosina <jkosina@suse.cz>
|
|
Add device tree bindings for DA9063 regulators; Real-Time Clock
and Watchdog.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
|
|
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
|
|
Patch "ath9k: Fix no-ack frame status" needs these mac80211 patches:
commit 5cf16616e152dd5c274a65954c77f64892d025a8
Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Date: Wed Dec 10 21:26:11 2014 +0530
mac80211: Fix accounting of multicast frames
commit 6b127c71fbdd3daacfd8b9f80b8e6ebfb70a889e
Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Date: Wed Dec 10 21:26:10 2014 +0530
mac80211: Move IEEE80211_TX_CTL_PS_RESPONSE
Conflicts:
drivers/net/wireless/ath/wil6210/cfg80211.c
drivers/staging/rtl8723au/os_dep/ioctl_cfg80211.c
|
|
Adds reset to sysfs which will PERST the card. If load_image_on_perst is set
to "user" or "factory", the PERST will cause that image to be loaded.
load_image_on_perst is set to "user" for production.
"none" could be used for debugging. The PSL trace arrays are preserved which
then can be read through debugfs.
PERST also triggers CAPP recovery. An HMI comes in, which is handled by EEH.
EEH unbinds the driver, calls into Sapphire to reinitialize the PHB, then
rebinds the driver.
Signed-off-by: Ryan Grimm <grimm@linux.vnet.ibm.com>
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
|
|
load_image_on_perst identifies whether a PERST will cause the image to be
flashed to the card. And if so, which image.
Valid entries are: "none", "user" and "factory".
A value of "none" means PERST will not cause the image to be flashed. A
power cycle to the pcie slot is required to load the image.
"user" loads the user provided image and "factory" loads the factory image upon
PERST.
sysfs updates the cxl struct in the driver then calls cxl_update_image_control
to write the vals in the VSEC.
Signed-off-by: Ryan Grimm <grimm@linux.vnet.ibm.com>
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
|
|
This fixes two typos and explains where shared attributes are stored.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
|
|
This adds the devicetree binding documentation for the LTC2941 and LTC2943
driver. These are I2C connected battery gas gauge ICs.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
|
|
The register bit fields are a little different, so add an entry and a
compatible string to accommodate them.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
|
|
Merge "Second Round of Renesas ARM Based SoC DT Updates for v3.20" from Simon
Horman:
* Support Renesas memory controllers
* Add SRC interrupt number on r8a779~ and r8a7791 SoCs
* Fix MSTP8 input clocks on r8a7791 SoC
* Add PM domain support to r8a7740
* Add DT bindings for the R-Mobile System Controller
* Use Add sh73a0-specific FSI2 compatible property
* tag 'renesas-dt2-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
PM / Domains: R-Mobile SYSC: Document SH-Mobile AG5 (sh73a0) binding
ARM: shmobile: sh73a0 dtsi: Add memory-controller nodes
ARM: shmobile: r8a7740 dtsi: Add memory-controller node
ARM: shmobile: r8a73a4 dtsi: Add memory-controller nodes
ARM: shmobile: Add DT bindings for Renesas memory controllers
ARM: shmobile: r8a7791: add SRC interrupt number on DTSI
ARM: shmobile: r8a7790: add SRC interrupt number on DTSI
ARM: shmobile: r8a7791: fix MSTP8 input clocks
ARM: shmobile: r8a7740 dtsi: Add PM domain support
PM / Domains: Add DT bindings for the R-Mobile System Controller
ARM: shmobile: sh73a0 dtsi: Add SoC-specific FSI2 compatible property
Signed-off-by: Olof Johansson <olof@lixom.net>
|
Dave Airlie
Alexander Stein
Joerg Roedel
Eddie Huang
Liviu Dudau
Baruch Siach
Tony Lindgren
Magnus Damm
Kevin Hilman
Bartosz Golaszewski
FUKAUMI Naoki
Christophe Ricard
Ezequiel Garcia
Harout Hedeshian
Phani Movva
Romain Perier
Lukasz Majewski
Lee Jones
Marek Szyprowski
Arnd Bergmann
Linus Torvalds
Olof Johansson
Darren Hart
Suzuki K. Poulose
Alexander Sverdlin
Mikko Perttunen
Paolo Bonzini
David Hildenbrand
Dominik Dingel
Thadeu Lima de Souza Cascardo
David Howells
Steve Twiss
Bjorn Andersson
Kalle Valo
Ryan Grimm
Philippe Bergheaud
Mike Looijmans
Kevin Cernekee