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2020-07-31dt-bindings: mfd: syscon: add compatible string for mstar,msc313-pmsleepDaniel Palmer1-0/+1
Add a compatible string for the pmsleep register region in the MStar MSC313 SoC. Link: https://lore.kernel.org/r/20200729150748.1945589-2-daniel@0x0f.com Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-31Merge tag 'qcom-drivers-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/driversArnd Bergmann2-64/+87
Qualcomm driver additional updates for 5.9 This fixes a potential race condition with remoteprocs by not sending acknowledgements until after registered drivers has processed the event. It adds IPQ6018 support to the SMD RPM driver, fixes kerneldoc in the same and converts the related DT binding to YAML. Finally it fixes a compilation warning in the geni serial engine driver when compiled without CONFIG_SERIAL_EARLYCON. * tag 'qcom-drivers-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: geni: Fix unused label warning soc: qcom: smd-rpm: Fix kerneldoc soc: qcom: pdr: Reorder the PD state indication ack dt-bindings: soc: qcom: smd-rpm: Convert binding to YAML schema soc: qcom: smd-rpm: Add IPQ6018 compatible dt-bindings: soc: qcom: smd-rpm: Add IPQ6018 compatible Link: https://lore.kernel.org/r/20200730051852.649761-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-31dt-bindings: RNG: Add Ingenic RNG bindings.周琰杰 (Zhou Yanjie)1-0/+36
Add the RNG bindings for the JZ4780 SoC and the X1000 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-30Merge remote-tracking branch 'regulator/for-5.9' into regulator-nextMark Brown11-322/+599
2020-07-31Merge branch 'for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu into core/rcuIngo Molnar12-396/+560
Pull the v5.9 RCU bits from Paul E. McKenney: - Documentation updates - Miscellaneous fixes - kfree_rcu updates - RCU tasks updates - Read-side scalability tests - SRCU updates - Torture-test updates Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-30regulator: add the sub node names for the MP5496 PMICKathiravan T1-0/+2
MP5496 PMIC is found on IPQ6018 SoC. SMPA2 regulator controls the APSS voltage scaling. Document the sub node name for the same. Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1596098964-19878-3-git-send-email-kathirav@codeaurora.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-30ASoC: dt-bindings: ak4613: switch to yaml base DocumentationKuninori Morimoto2-27/+49
This patch switches from .txt base to .yaml base Document. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/87mu4cxlo2.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87o8pf3923.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/873659bpbk.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-30ASoC: samsung: Document DT bindings for Midas sound subsystemSylwester Nawrocki1-0/+108
This patch adds documentation of DT biding for the Midas sound complex. Partially based on the *txt version by Simon Shields <simon@lineageos.org>. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200728131111.14334-1-s.nawrocki@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-30riscv: Select ARCH_HAS_DEBUG_VM_PGTABLEEmil Renner Berthing1-1/+1
This allows the pgtable tests to be built. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-07-30riscv: Add jump-label implementationEmil Renner Berthing1-1/+1
Add jump-label implementation based on the ARM64 version and add CONFIG_JUMP_LABEL=y to the defconfigs. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Björn Töpel <bjorn.topel@gmail.com> Tested-by: Björn Töpel <bjorn.topel@gmail.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-07-30Documentation: intel: Replace HTTP links with HTTPS onesAlexander A. Klimov6-7/+7
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-07-30drm/doc: device hot-unplug for userspacePekka Paalanen1-1/+113
Set up the expectations on how hot-unplugging a DRM device should look like to userspace. Written by Daniel Vetter's request and largely based on his comments in IRC and from https://lists.freedesktop.org/archives/dri-devel/2020-May/265484.html . A related Wayland protocol change proposal is at https://gitlab.freedesktop.org/wayland/wayland-protocols/-/merge_requests/35 Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Cc: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Cc: Dave Airlie <airlied@redhat.com> Cc: Sean Paul <sean@poorly.run> Cc: Simon Ser <contact@emersion.fr> Cc: Ben Skeggs <skeggsb@gmail.com> Cc: Karol Herbst <kherbst@redhat.com> Acked-by: Simon Ser <contact@emersion.fr> Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200707113805.30936-1-ppaalanen@gmail.com
2020-07-30dt-bindings: interrupt-controller: Update Loongson HTVEC descriptionHuacai Chen1-2/+2
Loongson HTVEC support 8 parents interrupts in maximum, so update the maxItems description. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Link: https://lore.kernel.org/r/1596099090-23516-2-git-send-email-chenhc@lemote.com
2020-07-30PM / devfreq: Add support delayed timer for polling modeChanwoo Choi1-0/+12
Until now, the devfreq driver using polling mode like simple_ondemand governor have used only deferrable timer for reducing the redundant power consumption. It reduces the CPU wake-up from idle due to polling mode which check the status of Non-CPU device. But, it has a problem for Non-CPU device like DMC device with DMA operation. Some Non-CPU device need to do monitor continuously regardless of CPU state in order to decide the proper next status of Non-CPU device. So, add support the delayed timer for polling mode to support the repetitive monitoring. The devfreq driver and user can select the kind of timer on either deferrable and delayed timer. For example, change the timer type of DMC device based on Exynos5422-based Odroid-XU3 as following: - If want to use deferrable timer as following: echo deferrable > /sys/class/devfreq/10c20000.memory-controller/timer - If want to use delayed timer as following: echo delayed > /sys/class/devfreq/10c20000.memory-controller/timer Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-07-30dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandleEnric Balletbo i Serra1-0/+2
The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU general register files to know the DRAM type, so add a phandle to the syscon that manages these registers. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gaël PORTAY <gael.portay@collabora.com> Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-07-30dt-bindings: arm: Add NVIDIA Tegra194 CPU Complex bindingSumit Gupta1-0/+69
Add device-tree binding documentation to represent Tegra194 CPU Complex with compatible string under 'cpus' node. This can be used by drivers like cpufreq which don't have their node or CPU Complex node to bind to. Also, documenting 'nvidia,bpmp' property which points to BPMP device. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-07-29dt-bindings: power: Add BQ28z610 compatibleDan Murphy1-0/+1
Add the Texas Instruments bq28z610 battery monitor to the bq27xxx binding. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-29dt-bindings: power: Add BQ27Z561 compatibleDan Murphy1-0/+1
Add the Texas Instruments bq27z561 battery monitor to the bq27xxx binding. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-29mlxsw: spectrum: Use different trap group for externally routed packetsIdo Schimmel1-0/+4
Cited commit mistakenly removed the trap group for externally routed packets (e.g., via the management interface) and grouped locally routed and externally routed packet traps under the same group, thereby subjecting them to the same policer. This can result in problems, for example, when FRR is restarted and suddenly all transient traffic is trapped to the CPU because of a default route through the management interface. Locally routed packets required to re-establish a BGP connection will never reach the CPU and the routing tables will not be re-populated. Fix this by using a different trap group for externally routed packets. Fixes: 8110668ecd9a ("mlxsw: spectrum_trap: Register layer 3 control traps") Reported-by: Alex Veber <alexve@mellanox.com> Tested-by: Alex Veber <alexve@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-29dt-bindings: power: Convert battery.txt to battery.yamlDan Murphy2-85/+145
Convert the battery.txt file to yaml and fix up the examples. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> [Fixed the regex for ocv-capacity-table and the DT example for it] Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-29dt-bindings: nvmem: SID: add binding for A100's SID controllerYangtao Li1-8/+11
Add a binding for A100's SID controller. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200722100705.7772-14-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-29dt-bindings: nvmem: Add properties needed for blowing fusesRavi Kumar Bokka1-2/+48
On some systems it's possible to actually blow the fuses in the qfprom from the kernel. Add properties to support that. NOTE: Whether this is possible depends on the BIOS settings and whether the kernel has permissions here, so not all boards will be able to blow fuses in the kernel. Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200722100705.7772-11-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-29dt-bindings: nvmem: qfprom: Convert to yamlRavi Kumar Bokka2-35/+50
This switches the bindings over from txt to yaml. Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200722100705.7772-10-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-29mei: add device kind to sysfsAlexander Usyskin1-0/+13
Some of the mei device heads are not generic and have a specific purpose, we need to announce it to the user space so it is possible to detect the correct device node via matching attributes. Generic heads are marked as 'mei' while special purpose heads have their own names. Currently we are adding 'itouch' string for Intel IPTS 1.0, 2.0 devices. This is done via new sysfs attribute 'kind'. Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Link: https://lore.kernel.org/r/20200728192242.3117779-1-tomas.winkler@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-29seqlock: Extend seqcount API with associated locksAhmed S. Darwish1-0/+52
A sequence counter write side critical section must be protected by some form of locking to serialize writers. If the serialization primitive is not disabling preemption implicitly, preemption has to be explicitly disabled before entering the write side critical section. There is no built-in debugging mechanism to verify that the lock used for writer serialization is held and preemption is disabled. Some usage sites like dma-buf have explicit lockdep checks for the writer-side lock, but this covers only a small portion of the sequence counter usage in the kernel. Add new sequence counter types which allows to associate a lock to the sequence counter at initialization time. The seqcount API functions are extended to provide appropriate lockdep assertions depending on the seqcount/lock type. For sequence counters with associated locks that do not implicitly disable preemption, preemption protection is enforced in the sequence counter write side functions. This removes the need to explicitly add preempt_disable/enable() around the write side critical sections: the write_begin/end() functions for these new sequence counter types automatically do this. Introduce the following seqcount types with associated locks: seqcount_spinlock_t seqcount_raw_spinlock_t seqcount_rwlock_t seqcount_mutex_t seqcount_ww_mutex_t Extend the seqcount read and write functions to branch out to the specific seqcount_LOCKTYPE_t implementation at compile-time. This avoids kernel API explosion per each new seqcount_LOCKTYPE_t added. Add such compile-time type detection logic into a new, internal, seqlock header. Document the proper seqcount_LOCKTYPE_t usage, and rationale, at Documentation/locking/seqlock.rst. If lockdep is disabled, this lock association is compiled out and has neither storage size nor runtime overhead. Signed-off-by: Ahmed S. Darwish <a.darwish@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200720155530.1173732-10-a.darwish@linutronix.de
2020-07-29Documentation: locking: Describe seqlock design and usageAhmed S. Darwish2-0/+171
Proper documentation for the design and usage of sequence counters and sequential locks does not exist. Complete the seqlock.h documentation as follows: - Divide all documentation on a seqcount_t vs. seqlock_t basis. The description for both mechanisms was intermingled, which is incorrect since the usage constrains for each type are vastly different. - Add an introductory paragraph describing the internal design of, and rationale for, sequence counters. - Document seqcount_t writer non-preemptibility requirement, which was not previously documented anywhere, and provide a clear rationale. - Provide template code for seqcount_t and seqlock_t initialization and reader/writer critical sections. - Recommend using seqlock_t by default. It implicitly handles the serialization and non-preemptibility requirements of writers. At seqlock.h: - Remove references to brlocks as they've long been removed from the kernel. - Remove references to gcc-3.x since the kernel's minimum supported gcc version is 4.9. References: 0f6ed63b1707 ("no need to keep brlock macros anymore...") References: 6ec4476ac825 ("Raise gcc version requirement to 4.9") Signed-off-by: Ahmed S. Darwish <a.darwish@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200720155530.1173732-2-a.darwish@linutronix.de
2020-07-29Merge remote-tracking branch 'spi/for-5.9' into spi-nextMark Brown12-116/+333
2020-07-29dt-bindings: lpspi: New property in document DT bindings for LPSPIClark Wang1-0/+7
Add "fsl,spi-only-use-cs1-sel" to fit i.MX8DXL-EVK. Spi common code does not support use of CS signals discontinuously. It only uses CS1 without using CS0. So, add this property to re-config chipselect value. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727031513.31774-1-xiaoning.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-29dt-bindings: tlv320adcx140: Add GPO config and drive configDan Murphy1-0/+28
Add properties for configuring the General Purpose Outputs (GPO). The GPOs. There are 2 settings for each GPO, configuration and the output drive type. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200728160833.24130-1-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-29Merge branches 'arm/renesas', 'arm/qcom', 'arm/mediatek', 'arm/omap', 'arm/exynos', 'arm/smmu', 'ppc/pamu', 'x86/vt-d', 'x86/amd' and 'core' into nextJoerg Roedel6-4/+41
2020-07-29staging/speakup: Move out of stagingSamuel Thibault2-0/+1950
The nasty TODO items are done. Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Link: https://lore.kernel.org/r/20200729003531.907370-1-samuel.thibault@ens-lyon.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-29Documentation/sysctl: Document uclamp sysctl knobsQais Yousef1-0/+54
Uclamp exposes 3 sysctl knobs: * sched_util_clamp_min * sched_util_clamp_max * sched_util_clamp_min_rt_default Document them in sysctl/kernel.rst. Signed-off-by: Qais Yousef <qais.yousef@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200716110347.19553-3-qais.yousef@arm.com
2020-07-29powerpc/book3s64/radix: Add kernel command line option to disable radix GTSEAneesh Kumar K.V1-0/+4
This adds a kernel command line option that can be used to disable GTSE support. Disabling GTSE implies kernel will make hcalls to invalidate TLB entries. This was done so that we can do VM migration between configs that enable/disable GTSE support via hypervisor. To migrate a VM from a system that supports GTSE to a system that doesn't, we can boot the guest with radix_hcall_invalidate=on, thereby forcing the guest to use hcalls for TLB invalidates. The check for hcall availability is done in pSeries_setup_arch so that the panic message appears on the console. This should only happen on a hypervisor that doesn't force the guest to hash translation even though it can't handle the radix GTSE=0 request via CAS. With radix_hcall_invalidate=on if the hypervisor doesn't support hcall_rpt_invalidate hcall it should force the LPAR to hash translation. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Tested-by: Bharata B Rao <bharata@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200727085908.420806-1-aneesh.kumar@linux.ibm.com
2020-07-28ACPI: NFIT: Add runtime firmware activate supportDan Williams1-0/+19
Plumb the platform specific backend for the generic libnvdimm firmware activate interface. Register dimm level operations to arm/disarm activation, and register bus level operations to report the dynamic platform-quiesce time relative to the number of dimms armed for firmware activation. A new nfit-specific bus attribute "firmware_activate_noidle" is added to allow the activation to switch between platform enforced, and OS opportunistic device quiesce. In other words, let the hibernate cycle handle in-flight device-dma rather than the platform attempting to increase PCI-E timeouts and the like. Cc: Dave Jiang <dave.jiang@intel.com> Cc: Ira Weiny <ira.weiny@intel.com> Cc: Vishal Verma <vishal.l.verma@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
2020-07-28PM, libnvdimm: Add runtime firmware activation supportDan Williams2-0/+88
Abstract platform specific mechanics for nvdimm firmware activation behind a handful of generic ops. At the bus level ->activate_state() indicates the unified state (idle, busy, armed) of all DIMMs on the bus, and ->capability() indicates the system state expectations for activate. At the DIMM level ->activate_state() indicates the per-DIMM state, ->activate_result() indicates the outcome of the last activation attempt, and ->arm() attempts to transition the DIMM from 'idle' to 'armed'. A new hibernate_quiet_exec() facility is added to support firmware activation in an OS defined system quiesce state. It leverages the fact that the hibernate-freeze state wants to assert that a memory hibernation snapshot can be taken. This is in contrast to a platform firmware defined quiesce state that may forcefully quiet the memory controller independent of whether an individual device-driver properly supports hibernate-freeze. The libnvdimm sysfs interface is extended to support detection of a firmware activate capability. The mechanism supports enumeration and triggering of firmware activate, optionally in the hibernate_quiet_exec() context. [rafael: hibernate_quiet_exec() proposal] [vishal: fix up sparse warning, grammar in Documentation/] Cc: Pavel Machek <pavel@ucw.cz> Cc: Ira Weiny <ira.weiny@intel.com> Cc: Len Brown <len.brown@intel.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Vishal Verma <vishal.l.verma@intel.com> Reported-by: kernel test robot <lkp@intel.com> Co-developed-by: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Signed-off-by: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
2020-07-28Input: uinput - fix typo in function name documentationPavel Machek1-3/+3
Fix non-existing constant in documentation. Signed-off-by: Pavel Machek (CIP) <pavel@denx.de> Link: https://lore.kernel.org/r/20200724084025.GB31930@amd Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2020-07-28Documentation: bareudp: Corrected description of bareudp module.Martin Varghese1-3/+2
Removed redundant words. Fixes: 571912c69f0e ("net: UDP tunnel encapsulation module for tunnelling different protocols like MPLS, IP, NSH etc.") Signed-off-by: Martin Varghese <martin.varghese@nokia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-28dt-bindings: remoteproc: k3-dsp: Update bindings for C71x DSPsSuman Anna1-13/+55
Some Texas Instruments K3 family of SoCs have one of more newer generation TMS320C71x CorePac processor subsystem in addition to the existing TMS320C66x CorePac processor subsystems. Update the device tree bindings document for the C71x DSP devices. The example is also updated to show the single C71 DSP present on J721E SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200612225357.8251-2-s-anna@ti.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28Add pldmfw library for PLDM firmware updateJacob Keller4-0/+332
The pldmfw library is used to implement common logic needed to flash devices based on firmware files using the format described by the PLDM for Firmware Update standard. This library consists of logic to parse the PLDM file format from a firmware file object, as well as common logic for sending the relevant PLDM header data to the device firmware. A simple ops table is provided so that device drivers can implement device specific hardware interactions while keeping the common logic to the pldmfw library. This library will be used by the Intel ice networking driver as part of implementing device flash update via devlink. The library aims to be vendor and device agnostic. For this reason, it has been placed in lib/pldmfw, in the hopes that other devices which use the PLDM firmware file format may benefit from it in the future. However, do note that not all features defined in the PLDM standard have been implemented. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-28dt-bindings: remoteproc: Add bindings for C66x DSPs on TI K3 SoCsSuman Anna1-0/+142
Some Texas Instruments K3 family of SoCs have one of more Digital Signal Processor (DSP) subsystems that are comprised of either a TMS320C66x CorePac and/or a next-generation TMS320C71x CorePac processor subsystem. Add the device tree bindings document for the C66x DSP devices on these SoCs. The added example illustrates the DT nodes for the first C66x DSP device present on the K3 J721E family of SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200721223617.20312-5-s-anna@ti.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28dt-bindings: arm: keystone: Add common TI SCI bindingsSuman Anna1-0/+44
Add a bindings document that defines the common TI SCI properties used by various K3 device management nodes such as clock controllers, interrupt controllers, reset controllers or remoteproc devices. The required properties for each device management node shall be specified in the respective binding document. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200721223617.20312-2-s-anna@ti.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28Merge tag 'arm-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into masterLinus Torvalds1-0/+3
Pull ARM SoC DT fixes from Arnd Bergmann: "These are the latest device tree fixes for Arm SoCs: - TI Keystone2 ethernet regressed after a driver change broke with incorrect phy-mode in a board's DT source. - A similar fix is needed for two i.MX boards that were missed in an earlier bugfix. - DT change for Armada 38x allowing to add the register needed to fix NETA lockup when repeatedly switching speed. - One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card detect work correctly. - Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that were failing on older SoCs and one to fix Cedrus on the H6" * tag 'arm-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: dts: keystone-k2g-evm: fix rgmii phy-mode for ksz9031 phy ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2 ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2 arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage ARM: dts sunxi: Relax a bit the CMA pool allocation range
2020-07-28dt-bindings: Add DT bindings for Powertip PH800480T013Marek Vasut1-0/+2
Add DT bindings for Powertip PH800480T013 800x480 parallel LCD, this one is used in the Raspberry Pi 7" touchscreen display unit. Signed-off-by: Marek Vasut <marex@denx.de> To: dri-devel@lists.freedesktop.org Cc: Eric Anholt <eric@anholt.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: devicetree@vger.kernel.org Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200728121246.23304-2-marex@denx.de
2020-07-28dt-bindings: Add vendor prefix for PowertipMarek Vasut1-0/+2
The Powertip Tech. Corp. is an LCD panel manufacturer. Signed-off-by: Marek Vasut <marex@denx.de> To: dri-devel@lists.freedesktop.org Cc: Eric Anholt <eric@anholt.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: devicetree@vger.kernel.org Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200728121246.23304-1-marex@denx.de
2020-07-28ASoC: ak4613: Undo conversion to YAML bindingsMark Brown2-65/+27
Revert 5b235b5522bf38 ("ASoC: dt-bindings: ak4613: switch to yaml base Documentation") for the time being since it depends on other conversions. Reported-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-28ASoC: tas2562: Convert the tas2562 binding to yamlDan Murphy1-0/+69
Convert the TAS2562 text file to yaml format. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200723160838.9738-1-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-28ASoC: convert Everest ES8316 binding to yamlKatsuhiro Suzuki2-23/+50
This patch converts Everest Semiconductor ES8316 low power audio CODEC binding to DT schema. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200724155933.1040501-1-katsuhiro@katsuster.net Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-28dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc busLaurentiu Tudor1-6/+44
The existing bindings cannot be used to specify the relationship between fsl-mc devices and GIC ITSes. Add a generic binding for mapping fsl-mc devices to GIC ITSes, using msi-map property. In addition, deprecate msi-parent property which no longer makes sense now that we support translating the MSIs. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Diana Craciun <diana.craciun@oss.nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Link: https://lore.kernel.org/r/20200619082013.13661-9-lorenzo.pieralisi@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-28Merge tag 'v5.8-rc7' into perf/core, to pick up fixesIngo Molnar52-85/+228
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-28dt-bindings: arm: mstar: Move existing MStar binding descriptionsDaniel Palmer2-2/+2
Now there is an mstar directory move the existing MStar specific descriptions into that directory. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>