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2022-07-20dt-bindings: arm: qcom: add missing MSM8916 board compatiblesKrzysztof Kozlowski1-0/+6
Document several board compatibles already present in Linux kernel. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20220520123252.365762-5-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20dt-bindings: arm: qcom: fix MSM8994 boards compatiblesKrzysztof Kozlowski1-2/+5
The compatibles for APQ8094/MSM8994 boards are different than specified in bindings. None of them use fallback to other SoC variant. Fixes: 9ad3c08f6f1b ("dt-bindings: arm: qcom: Document sony boards for apq8094") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220520123252.365762-4-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20dt-bindings: arm: qcom: fix MSM8916 MTP compatiblesKrzysztof Kozlowski1-1/+1
The order of compatibles for MSM8916 MTP board is different: msm8916-mtp.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,msm8916-mtp', 'qcom,msm8916-mtp/1', 'qcom,msm8916'] is too long Fixes: 9d3ef77fe568 ("dt-bindings: arm: Convert QCom board/soc bindings to json-schema") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220520123252.365762-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20dt-bindings: arm: qcom: fix Longcheer L8150 compatiblesKrzysztof Kozlowski1-1/+5
The MSM8916 Longcheer L8150 uses a fallback in compatible: msm8916-longcheer-l8150.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed: ['longcheer,l8150', 'qcom,msm8916-v1-qrd/9-v1', 'qcom,msm8916'] is too long Fixes: b72160fa886d ("dt-bindings: qcom: Document bindings for new MSM8916 devices") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20220520123252.365762-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20dt-bindings: arm: qcom: fix Alcatel OneTouch Idol 3 compatiblesKrzysztof Kozlowski1-2/+1
The MSM8916 Alcatel OneTouch Idol 3 does not use MTP fallbacks in compatibles: msm8916-alcatel-idol347.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed: ['alcatel,idol347', 'qcom,msm8916'] is too short Reported-by: Rob Herring <robh@kernel.org> Fixes: e9dd2f7204ed ("dt-bindings: arm: qcom: Document alcatel,idol347 board") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20220520123252.365762-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20dt-bindings: soc: qcom: qcom,smd-rpm: add power-controllerKrzysztof Kozlowski1-0/+3
Document power-controller child of Qualcomm RPM over SMD to fix dtbs_check warnings like: msm8916-huawei-g7.dtb: rpm-requests: 'power-controller' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220504131923.214367-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmpKrzysztof Kozlowski1-0/+1
Add compatible for qcom,sm8450-aoss-qmp with qcom,aoss-qmp as a fallback. This fixes dtbs_check warnings like: sm8450-hdk.dtb: power-controller@c300000: compatible:0: 'qcom,sm8450-aoss-qmp' is not one of ['qcom,sc7180-aoss-qmp', 'qcom,sc7280-aoss-qmp', 'qcom,sc8180x-aoss-qmp', 'qcom,sdm845-aoss-qmp', 'qcom,sm6350-aoss-qmp', 'qcom,sm8150-aoss-qmp', 'qcom,sm8250-aoss-qmp', 'qcom,sm8350-aoss-qmp'] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220504131923.214367-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20dt-bindings: soc: qcom,rpmh-rsc: simplify qcom,tcs-configKrzysztof Kozlowski1-22/+11
The schema for "qcom,tcs-config" property can be a little bit simpler, without the need of defining each item. Also move the description of each part of "qcom,tcs-config" tupple to the tupple items description. Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220426110757.80603-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2022-07-20regulator: Add missing type for 'regulator-microvolt-offset'Rob Herring1-0/+1
'regulator-microvolt-offset' is missing a type definition. The type should be 'uint32'. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220719215010.1875363-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-07-20ASoC: dt-bindings: atmel-classd: PDMIC convert to json-schemaRyan Wanner2-55/+98
Convert Atmel PDMIC devicetree binding to json-schema. Change file naming to match json-schema naming. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220715162922.660859-3-Ryan.Wanner@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-07-20ASoC: dt-bindings: atmel-classd: Convert to json-schemaRyan Wanner2-55/+100
Convert atmel CLASSD devicetree binding to json-schema. Change file name to match json-scheme naming. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220715162922.660859-2-Ryan.Wanner@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-07-20watchdog/pseries-wdt: initial support for H_WATCHDOG-based watchdog timersScott Cheloha1-0/+12
PAPR v2.12 defines a new hypercall, H_WATCHDOG. The hypercall permits guest control of one or more virtual watchdog timers. The timers have millisecond granularity. The guest is terminated when a timer expires. This patch adds a watchdog driver for these timers, "pseries-wdt". pseries_wdt_probe() currently assumes the existence of only one platform device and always assigns it watchdogNumber 1. If we ever expose more than one timer to userspace we will need to devise a way to assign a distinct watchdogNumber to each platform device at device registration time. Signed-off-by: Scott Cheloha <cheloha@linux.ibm.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220713202335.1217647-5-cheloha@linux.ibm.com
2022-07-20arm64/hwcap: Support FEAT_EBF16Mark Brown1-0/+4
The v9.2 feature FEAT_EBF16 provides support for an extended BFloat16 mode. Allow userspace to discover system support for this feature by adding a hwcap for it. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220707103632.12745-4-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2022-07-20KVM: s390: resetting the Topology-Change-ReportPierre Morel1-0/+25
During a subsystem reset the Topology-Change-Report is cleared. Let's give userland the possibility to clear the MTCR in the case of a subsystem reset. To migrate the MTCR, we give userland the possibility to query the MTCR state. We indicate KVM support for the CPU topology facility with a new KVM capability: KVM_CAP_S390_CPU_TOPOLOGY. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Janis Schoetterl-Glausch <scgl@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-Id: <20220714194334.127812-1-pmorel@linux.ibm.com> Link: https://lore.kernel.org/all/20220714194334.127812-1-pmorel@linux.ibm.com/ [frankja@linux.ibm.com: Simple conflict resolution in Documentation/virt/kvm/api.rst] Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
2022-07-20dt-bindings: mfd: st,stm32-timers: Correct 'resets' property nameRob Herring1-1/+1
The correct property name for the reset binding is 'resets', not 'reset'. Fix the name. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220719215125.1877138-1-robh@kernel.org
2022-07-19Documentation: fix udp_wmem_min in ip-sysctl.rstXin Long1-5/+1
UDP doesn't support tx memory accounting, and sysctl udp_wmem_min is not really used anywhere. So we should fix the description in ip-sysctl.rst accordingly. Fixes: 95766fff6b9a ("[UDP]: Add memory accounting.") Signed-off-by: Xin Long <lucien.xin@gmail.com> Link: https://lore.kernel.org/r/c880a963d9b1fb5f442ae3c9e4dfa70d45296a16.1658167019.git.lucien.xin@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19Documentation/cxl: Use a double line break between entriesDan Williams1-0/+16
Make it easier to read delineations between the "Description" line break, new paragraph line breaks, and new entries. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/165784324750.1758207.10379257962719807754.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19cxl/port: Read CDAT tableIra Weiny1-0/+10
The per-device CDAT data provides performance data that is relevant for mapping which CXL devices can participate in which CXL ranges by QTG (QoS Throttling Group) (per ECN: CXL 2.0 CEDT CFMWS & QTG_DSM) [1]. The QTG association specified in the ECN is advisory. Until the cxl_acpi driver grows support for invoking the QTG _DSM method the CDAT data is only of interest to userspace that may need it for debug purposes. Search the DOE mailboxes available, query CDAT data, cache the data and make it available via a sysfs binary attribute per endpoint at: /sys/bus/cxl/devices/endpointX/CDAT ...similar to other ACPI-structured table data in /sys/firmware/ACPI/tables. The CDAT is relative to 'struct cxl_port' objects since switches in addition to endpoints can host a CDAT instance. Switch CDAT support is not implemented. This does not support table updates at runtime. It will always provide whatever was there when first cached. It is also the case that table updates are not expected outside of explicit DPA address map affecting commands like Set Partition with the immediate flag set. Given that the driver does not support Set Partition with the immediate flag set there is no current need for update support. Link: https://www.computeexpresslink.org/spec-landing [1] Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> [djbw: drop in-kernel parsing infra for now, and other minor fixups] Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20220719205249.566684-7-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19dt-bindings: can: nxp,sja1000: Document RZ/N1{D,S} supportBiju Das1-4/+35
Add CAN binding documentation for Renesas RZ/N1 SoC. The SJA1000 CAN controller on RZ/N1 SoC has some differences compared to others like it has no clock divider register (CDR) support and it has no HW loopback (HW doesn't see tx messages on rx), so introduced a new compatible 'renesas,rzn1-sja1000' to handle these differences. Link: https://lore.kernel.org/all/20220710115248.190280-3-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19dt-bindings: can: sja1000: Convert to json-schemaBiju Das2-58/+101
Convert the NXP SJA1000 CAN Controller Device Tree binding documentation to json-schema. Update the example to match reality. Link: https://lore.kernel.org/all/20220710115248.190280-2-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19rcu/nocb: Add an option to offload all CPUs on bootJoel Fernandes1-0/+6
Systems built with CONFIG_RCU_NOCB_CPU=y but booted without either the rcu_nocbs= or rcu_nohz_full= kernel-boot parameters will not have callback offloading on any of the CPUs, nor can any of the CPUs be switched to enable callback offloading at runtime. Although this is intentional, it would be nice to have a way to offload all the CPUs without having to make random bootloaders specify either the rcu_nocbs= or the rcu_nohz_full= kernel-boot parameters. This commit therefore provides a new CONFIG_RCU_NOCB_CPU_DEFAULT_ALL Kconfig option that switches the default so as to offload callback processing on all of the CPUs. This default can still be overridden using the rcu_nocbs= and rcu_nohz_full= kernel-boot parameters. Reviewed-by: Kalesh Singh <kaleshsingh@google.com> Reviewed-by: Uladzislau Rezki <urezki@gmail.com> (In v4.1, fixed issues with CONFIG maze reported by kernel test robot). Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Joel Fernandes <joel@joelfernandes.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Reviewed-by: Neeraj Upadhyay <quic_neeraju@quicinc.com>
2022-07-19srcu: Make expedited RCU grace periods block even less frequentlyNeeraj Upadhyay1-0/+18
The purpose of commit 282d8998e997 ("srcu: Prevent expedited GPs and blocking readers from consuming CPU") was to prevent a long series of never-blocking expedited SRCU grace periods from blocking kernel-live-patching (KLP) progress. Although it was successful, it also resulted in excessive boot times on certain embedded workloads running under qemu with the "-bios QEMU_EFI.fd" command line. Here "excessive" means increasing the boot time up into the three-to-four minute range. This increase in boot time was due to the more than 6000 back-to-back invocations of synchronize_rcu_expedited() within the KVM host OS, which in turn resulted from qemu's emulation of a long series of MMIO accesses. Commit 640a7d37c3f4 ("srcu: Block less aggressively for expedited grace periods") did not significantly help this particular use case. Zhangfei Gao and Shameerali Kolothum Thodi did experiments varying the value of SRCU_MAX_NODELAY_PHASE with HZ=250 and with various values of non-sleeping per phase counts on a system with preemption enabled, and observed the following boot times: +──────────────────────────+────────────────+ | SRCU_MAX_NODELAY_PHASE | Boot time (s) | +──────────────────────────+────────────────+ | 100 | 30.053 | | 150 | 25.151 | | 200 | 20.704 | | 250 | 15.748 | | 500 | 11.401 | | 1000 | 11.443 | | 10000 | 11.258 | | 1000000 | 11.154 | +──────────────────────────+────────────────+ Analysis on the experiment results show additional improvements with CPU-bound delays approaching one jiffy in duration. This improvement was also seen when number of per-phase iterations were scaled to one jiffy. This commit therefore scales per-grace-period phase number of non-sleeping polls so that non-sleeping polls extend for about one jiffy. In addition, the delay-calculation call to srcu_get_delay() in srcu_gp_end() is replaced with a simple check for an expedited grace period. This change schedules callback invocation immediately after expedited grace periods complete, which results in greatly improved boot times. Testing done by Marc and Zhangfei confirms that this change recovers most of the performance degradation in boottime; for CONFIG_HZ_250 configuration, specifically, boot times improve from 3m50s to 41s on Marc's setup; and from 2m40s to ~9.7s on Zhangfei's setup. In addition to the changes to default per phase delays, this change adds 3 new kernel parameters - srcutree.srcu_max_nodelay, srcutree.srcu_max_nodelay_phase, and srcutree.srcu_retry_check_delay. This allows users to configure the srcu grace period scanning delays in order to more quickly react to additional use cases. Fixes: 640a7d37c3f4 ("srcu: Block less aggressively for expedited grace periods") Fixes: 282d8998e997 ("srcu: Prevent expedited GPs and blocking readers from consuming CPU") Reported-by: Zhangfei Gao <zhangfei.gao@linaro.org> Reported-by: yueluck <yueluck@163.com> Signed-off-by: Neeraj Upadhyay <quic_neeraju@quicinc.com> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org> Link: https://lore.kernel.org/all/20615615-0013-5adc-584f-2b1d5c03ebfc@linaro.org/ Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2022-07-19arm64: errata: Remove AES hwcap for COMPAT tasksJames Morse1-0/+4
Cortex-A57 and Cortex-A72 have an erratum where an interrupt that occurs between a pair of AES instructions in aarch32 mode may corrupt the ELR. The task will subsequently produce the wrong AES result. The AES instructions are part of the cryptographic extensions, which are optional. User-space software will detect the support for these instructions from the hwcaps. If the platform doesn't support these instructions a software implementation should be used. Remove the hwcap bits on affected parts to indicate user-space should not use the AES instructions. Acked-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: James Morse <james.morse@arm.com> Link: https://lore.kernel.org/r/20220714161523.279570-3-james.morse@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2022-07-19bpf, docs: document BPF_MAP_TYPE_HASH and variantsDonald Hunter1-0/+185
Add documentation for BPF_MAP_TYPE_HASH including kernel version introduced, usage and examples. Document BPF_MAP_TYPE_PERCPU_HASH, BPF_MAP_TYPE_LRU_HASH and BPF_MAP_TYPE_LRU_PERCPU_HASH variations. Note that this file is included in the BPF documentation by the glob in Documentation/bpf/maps.rst v3: Fix typos reported by Stanislav Fomichev and Yonghong Song. Add note about iteration and deletion as requested by Yonghong Song. v2: Describe memory allocation semantics as suggested by Stanislav Fomichev. Fix u64 typo reported by Stanislav Fomichev. Cut down usage examples to only show usage in context. Updated patch description to follow style recommendation, reported by Bagas Sanjaya. Signed-off-by: Donald Hunter <donald.hunter@gmail.com> Reviewed-by: Stanislav Fomichev <sdf@google.com> Acked-by: Yonghong Song <yhs@fb.com> Link: https://lore.kernel.org/r/20220718125847.1390-1-donald.hunter@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2022-07-19dt-bindings: arm-smmu: Add compatible for Qualcomm SM6375Konrad Dybcio1-0/+1
Add a compatible for Qualcomm SM6375's broken-as-usual MMU500 impl. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20220716193223.455859-1-konrad.dybcio@somainline.org Signed-off-by: Will Deacon <will@kernel.org>
2022-07-19docs/bpf: Update documentation for BTF_KIND_FUNCIndu Bhagat1-1/+5
The vlen bits in the BTF type of kind BTF_KIND_FUNC are used to convey the linkage information for functions. The Linux kernel only supports linkage values of BTF_FUNC_STATIC and BTF_FUNC_GLOBAL at this time. Signed-off-by: Indu Bhagat <indu.bhagat@oracle.com> Acked-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Martin KaFai Lau <kafai@fb.com> Link: https://lore.kernel.org/r/20220714223310.1140097-1-indu.bhagat@oracle.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2022-07-19s390/Docs: new doc describing lock usage by the vfio_ap device driverTony Krowiak1-0/+105
Introduces a new document describing the locks used by the vfio_ap device driver and how to use them so as to avoid lockdep reports and deadlock situations. Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-07-19s390/vfio-ap: update docs to include dynamic config supportTony Krowiak1-146/+346
Update the documentation in vfio-ap.rst to include information about the AP dynamic configuration support (e.g., hot plug of adapters, domains and control domains via the matrix mediated device's sysfs assignment attributes). This patch also makes a few minor tweaks to make corrections and clarifications. Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-07-19Merge branch 'nuvoton/newsoc' into arm/newsocArnd Bergmann6-2/+71
Merge the new SoC support from Tomer Maimon: "This patchset adds initial support for the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC family. The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. The NPCM8XX computing subsystem comprises a quadcore ARM Cortex A35 ARM-V8 architecture. This patchset adds minimal architecture and drivers such as: Clocksource, Clock, Reset, and WD. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board." I'm leaving out the clk controller driver, which is still under review. * nuvoton/newsoc: arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string
2022-07-19dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible stringTomer Maimon1-0/+1
Add a compatible string for Nuvoton BMC NPCM845 global control registers. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible stringTomer Maimon1-0/+6
Add a compatible string for Nuvoton BMC NPCM845 SoC and a board specific device tree for the NPCM845 (Arbel) evaluation board. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19dt-bindings: arm: npcm: Add maintainerTomer Maimon2-0/+2
Add Tomer Maimon to the maintainers list. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19dt-bindings: reset: npcm: Add support for NPCM8XXTomer Maimon1-1/+3
Add binding document and device tree binding constants for Nuvoton BMC NPCM8XX reset controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19dt-bindings: reset: npcm: add GCR syscon propertyTomer Maimon1-0/+6
Describe syscon property that handles general control registers (GCR) in Nuvoton BMC NPCM reset driver. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX ClockTomer Maimon1-0/+49
Add binding for the Arbel BMC NPCM8XX Clock controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19dt-bindings: watchdog: npcm: Add npcm845 compatible stringTomer Maimon1-1/+2
Add a compatible string for Nuvoton BMC NPCM845 watchdog. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19dt-bindings: timer: npcm: Add npcm845 compatible stringTomer Maimon1-0/+2
Add a compatible string for Nuvoton BMC NPCM845 timer. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19Merge tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dtArnd Bergmann1-0/+32
mvebu dt64 for 5.20 (part 1) Add support for Marvell 98DX2530 (and variants) * tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: marvell: enable the 98DX2530 pinctrl driver arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board dt-bindings: marvell: Document the AC5/AC5X compatibles Link: https://lore.kernel.org/r/87cze1qlg3.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19KVM: stats: Fix value for KVM_STATS_UNIT_MAX for boolean statsOliver Upton1-1/+1
commit 1b870fa5573e ("kvm: stats: tell userspace which values are boolean") added a new stat unit (boolean) but failed to raise KVM_STATS_UNIT_MAX. Fix by pointing UNIT_MAX at the new max value of UNIT_BOOLEAN. Fixes: 1b870fa5573e ("kvm: stats: tell userspace which values are boolean") Reported-by: Janis Schoetterl-Glausch <scgl@linux.ibm.com> Signed-off-by: Oliver Upton <oupton@google.com> Message-Id: <20220719125229.2934273-1-oupton@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-19dt-bindings: iio: adc: Add compatible for MT8188Hui.Liu1-0/+1
Add dt-binding documentation of auxadc for MediaTek MT8188 SoC platform. Signed-off-by: Hui.Liu <hui.liu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220719014657.28714-2-hui.liu@mediatek.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-07-19Merge tag 'phy-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-nextGreg Kroah-Hartman13-10/+217
Vinod writes: phy-for-5.20 - New support: - Samsung FSD ufs phy - Mediatek MT8365 dsi and tphy support - Amlogic G12A Analog D-PHY driver - Mediatek MT8188 tphy support - Mediatek PCIe phy driver - Cadence J721e DPHY support - Qualcomm IPQ8074 PCIe Gen3 PHY support - Nvidia Tegra PCIe PIPE2UPHY support - Updates: - Split of Qualcomm combo qmp phy driver to ufs, usb, pcie phy drivers and associated cleanup of these drivers * tag 'phy-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (115 commits) dt-bindings: phy: mediatek: tphy: add compatible for mt8188 phy: rockchip-inno-usb2: Ignore OTG IRQs in host mode phy: qcom-qmp-usb: statify qmp_phy_vreg_l phy: stm32: fix error return in stm32_usbphyc_phy_init phy: phy-mtk-dp: change mtk_dp_phy_driver to static phy: freescale: Add i.MX8qm Mixel LVDS PHY support dt-bindings: phy: Add Freescale i.MX8qm Mixel LVDS PHY binding dt-bindings: vendor-prefixes: Add prefix for Mixel, Inc. phy: cadence-torrent: Remove unused `regmap` field from state struct phy: cadence: Sierra: Remove unused `regmap` field from state struct phy: samsung-ufs: ufs: change phy on/off control phy: samsung-ufs: convert phy clk usage to clk_bulk API phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register phy: qcom-qmp-usb: replace FLL layout writes for msm8996 phy: qcom-qmp: pcs-pcie-v4: add missing registers phy: qcom-qmp: pcs-v3: add missing registers phy: qcom-qmp: qserdes-com-v5: add missing registers phy: qcom-qmp: qserdes-com-v4: add missing registers phy: qcom-qmp: qserdes-com-v3: add missing registers phy: qcom-qmp: qserdes-com: add missing registers ...
2022-07-19Merge branch irq/renesas-irqc into irq/irqchip-nextMarc Zyngier2-0/+149
* irq/renesas-irqc: : . : New Renesas RZ/G2L IRQC driver from Lad Prabhakar, equipped with : its companion GPIO driver. : . dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/V2L SoC gpio: thunderx: Don't directly include asm-generic/msi.h pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document the properties to handle GPIO IRQ gpio: gpiolib: Allow free() callback to be overridden irqchip: Add RZ/G2L IA55 Interrupt Controller driver dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt Controller gpio: Remove dynamic allocation from populate_parent_alloc_arg() Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-19dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/V2L SoCLad Prabhakar1-1/+2
Document RZ/V2L (R9A07G054) IRQC bindings. The RZ/V2L IRQC block is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-irqc" will be used as a fallback. While at it, update the comment "# RZ/G2L" to "# RZ/G2{L,LC}" for "renesas,r9a07g044-irqc" compatible string as both RZ/G2L and RZ/G2LC SoC's use the common SoC DTSI and have the same IRQC block. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220718193745.7472-1-prabhakar.mahadev-lad.rj@bp.renesas.com
2022-07-19dt-bindings: mfd: syscon: Update Lee Jones' email addressLee Jones1-1/+1
Going forward, I'll be using my kernel.org for upstream work. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: devicetree@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220714112533.539910-8-lee@kernel.org
2022-07-19dt-bindings: mfd: Add i.MX8qm/qxp Control and Status Registers module bindingLiu Ying1-0/+192
This patch adds bindings for i.MX8qm/qxp Control and Status Registers module. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220611141421.718743-14-victor.liu@nxp.com
2022-07-19dt-bindings: mfd: mt6397: Add compatibles for MT6331 RTC and keysAngeloGioacchino Del Regno1-2/+5
The MT6331 PMIC provides many sub modules: regulators, audio codec, LED controller, keys, RTC and some GPIOs. It is always paired with a MT6332 Companion PMIC, which provides thermistors, WLEDs (display LED backlight), secondary AP cluster regulators, modem clocks, battery charger and fuel gauge. Add the necessary compatibles to start implementing the basics. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220617110728.90132-2-angelogioacchino.delregno@collabora.com
2022-07-19dt-bindings: mfd: qcom-pm8xxx: Update the maintainers sectionSatya Priya1-1/+1
Update the maintainers section with latest mail ID. Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/1655874639-11273-2-git-send-email-quic_c_skakit@quicinc.com
2022-07-19dt-bindings: mfd: Add mp2733 compatibleSaravanan Sekar1-1/+3
Add new compatible for mp2733 mfd driver. Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220615145357.2370044-3-sravanhome@gmail.com
2022-07-19dt-bindings: mfd: qcom,tcsr: Add qcom,tcsr-mdm9615Krzysztof Kozlowski1-0/+1
Document the (already used) TCSR on MDM9615. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220607133443.182468-2-krzysztof.kozlowski@linaro.org
2022-07-19dt-bindings: mfd: qcom,tcsr: Convert to dtschemaKrzysztof Kozlowski2-24/+49
Convert the Qualcomm Top Control and Status Register to DT Schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220607133443.182468-1-krzysztof.kozlowski@linaro.org
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