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2022-05-05dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dlMax Krummenacher1-0/+3
Add bindings for Aster, Iris and Iris V2 carrier boards our Colibri iMX6S/DL may be mated with. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindingsMax Krummenacher1-8/+0
The dedicated device tree for V1.1 modules has been dropped. Remove its bindings too. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add toradex,verdin-imx8mp et al.Marcel Ziswiler1-0/+21
Add toradex,verdin-imx8mp for the Verdin iMX8M Plus modules, its nonwifi and wifi variants and the carrier boards (both Dahlia and the Verdin Development Board) they may be mated in. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: Add i.MX53 based Menlo board commentMarek Vasut1-1/+1
Add comment regarding the i.MX53 based Menlo board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add PHYTEC phyGATE Tauri i.MX6 ULLAndrej Picej1-0/+9
Add devicetree bindings for phyGATE Tauri board with phyCORE-i.MX6 ULL. Signed-off-by: Andrej Picej <andrej.picej@norik.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: soc: Add i.MX8MP media block control DT bindingsPaul Elder1-0/+104
The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral providing access to the NoC and ensuring proper power sequencing of the peripherals within the MEDIAMIX domain. Add DT bindings for it. There is already a driver for block controls of other SoCs in the i.MX8M family, so these bindings will expand upon that. Signed-off-by: Paul Elder <paul.elder@ideasonboard.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: fsl: add TQ Systems boards based on i.MX6UL(L)Matthias Schiffer1-0/+37
TQMa6ULx is a SOM family using NXP i.MX6UL CPU family. TQMa6ULLx is a SOM family using NXP i.MX6ULL CPU family. Both are available as a socket type as well as an LGA type. For both variants there are the mainboards MBa6ULx and MBa6ULxL, trailing 'L' is LGA version. Finally there is the possibility to use the socket module with an LGA adapter on the MBa6ULxL. The SOM needs a mainboard, therefore we provide compatibles using this naming schema: "tq,imx6ul-<SOM>" for the module and "tq,imx6ul-<SOM>-<SBC>" for when mounted on the mainboard. The i.MX6ULL version is done similar. Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: arm: Add Data Modul i.MX8M Mini eDM SBCMarek Vasut1-0/+1
Add DT compatible string for Data Modul i.MX8M Mini eDM SBC board into YAML DT binding document. This system is an evaluation board for various custom display units. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05dt-bindings: soc: add binding for i.MX8MP HDMI blk-ctrlLucas Stach1-0/+84
Add the DT binding for the HDMI blk-ctrl found on the i.MX8MP SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-04dt-bindings: pci: apple,pcie: Drop max-link-speed from exampleHector Martin1-3/+0
We no longer use these since 111659c2a570 (and they never worked anyway); drop them from the example to avoid confusion. Fixes: 111659c2a570 ("arm64: dts: apple: t8103: Remove PCIe max-link-speed properties") Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220502091308.28233-1-marcan@marcan.st
2022-05-04dt-bindings: pinctrl: aspeed: Drop referenced nodes in examplesRob Herring1-63/+14
The additional nodes in the example referenced from the pinctrl node 'aspeed,external-nodes' properties are either incorrect (aspeed,ast2500-lpc) or not documented with a schema (aspeed,ast2500-gfx). There's no need to show these nodes as part of the pinctrl example, so just remove them. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220422192139.2592632-1-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-04dt-bindings: Drop redundant 'maxItems/minItems' in if/then schemasRob Herring13-68/+5
Another round of removing redundant minItems/maxItems when 'items' list is specified. This time it is in if/then schemas as the meta-schema was failing to check this case. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. Signed-off-by: Rob Herring <robh@kernel.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for IIO Link: https://lore.kernel.org/r/20220503162738.3827041-1-robh@kernel.org
2022-05-04dt-bindings: pinctrl: Allow values for drive-push-pull and drive-open-drainRob Herring1-2/+10
A few platforms, at91 and tegra, use drive-push-pull and drive-open-drain with a 0 or 1 value. There's not really a need for values as '1' should be equivalent to no value (it wasn't treated that way) and drive-push-pull disabled is equivalent to drive-open-drain. So dropping the value can't be done without breaking existing OSs. As we don't want new cases, mark the case with values as deprecated. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220429194610.2741437-1-robh@kernel.org
2022-05-04regulator: dt-bindings: qcom,rpmh: minor cleanups and extend suppliesMark Brown1-15/+245
Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>: Extend the RPMH regulator bindings with minor fixes and adding narrow supply matching.
2022-05-04docs: i2c: reference simple probesStephen Kitt1-5/+8
Instead of documenting old-style probes, reference "simple probes" and document the i2c_match_id function. This might help reduce the use of two-argument probes in new code. Signed-off-by: Stephen Kitt <steve@sk2.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-05-04dt-bindings: i2c: renesas,rcar-i2c: R-Car V3U is R-Car Gen4Geert Uytterhoeven1-1/+1
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. I2C on R-Car V3U also supports some extra features (e.g. Slave Clock Stretch Select), which are supported by other R-Car Gen4 SoCs, but not by any other R-Car Gen3 SoC. Hence move its compatible value to the R-Car Gen4 section. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-05-04dt-bindings: leds: Add pm8350c pmic supportSatya Priya1-0/+1
Add pm8350c pmic pwm support. Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-04dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatiblesBjorn Andersson1-0/+2
Add compatibles for the SC8180X and SC8280XP platforms to the existing LLCC binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220502215406.612967-2-bjorn.andersson@linaro.org
2022-05-04Merge branch irq/gic-v3-5.19 into irq/irqchip-nextMarc Zyngier1-2/+6
* irq/gic-v3-5.19: : . : Misc improvements for GICv3: : : - Minimise the number of cases where we need to poll RWP : : - Allow the use of MMIO-based invalidation for LPIs : : - Track GICD/GICR mappings in /proc/iomem : : - Tighten the GICv3 DT binding to avoid endless discussions : on the list... : . irqchip/gic-v3: Claim iomem resources dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP irqchip/gic-v3: Detect LPI invalidation MMIO registers irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR, CES} Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-05-04dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicitMarc Zyngier1-2/+6
A common mistake when writing a device tree for a platform that is using GICv3 with ancient CPUs is to overlook the MMIO frames that implement the GICv2 compatibility feature, because this feature is implemented by the CPUs and not by the GIC itself. The compatibility feature itself is optional (all the modern implementations have dropped it), but is present in all the ARM Ltd implementations of the ARMv8.0 architecture (A3x, A53, A57, A72, A73), and many others from various implementers. Make it explicit that GICC, GICH and GICV are required for these CPUs. Also take this opportunity to update my email address, as people keep sending them to the wrong place... Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220409101617.268796-1-maz@kernel.org
2022-05-04regulator: core: Add error flags to sysfs attributesZev Weiss1-0/+81
If a regulator provides a get_error_flags() operation, its sysfs attributes will now include an entry for each defined REGULATOR_ERROR_* flag. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Link: https://lore.kernel.org/r/20220504065252.6955-3-zev@bewilderbeest.net Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04regulator: dt-bindings: qcom,rpmh: document vdd-l7-bob-supply on PMR735AKrzysztof Kozlowski1-0/+1
The PMR735A comes with vdd-l7-bob-supply supply which was previously not documented. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220426105501.73200-4-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04regulator: dt-bindings: qcom,rpmh: document supplies per variantKrzysztof Kozlowski1-14/+242
The RPMH regulator binding covers several devices with different regulator supplies, so it uses patterns matching broad range of these supplies. This works fine but is not specific and might miss actual mistakes when a wrong supply property is used for given variant. Describe the supplies depending on the compatible, using a defs-allOf method. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220426105501.73200-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04regulator: dt-bindings: qcom,rpmh: update maintainersKrzysztof Kozlowski1-1/+2
David Collins' email bounces ("Recipient address rejected: undeliverable address: No such user here"). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220426105501.73200-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04regulator: mt6315: Enforce regulator-compatible, not nameNĂ­colas F. R. A. Prado1-1/+1
The MT6315 PMIC dt-binding should enforce that one of the valid regulator-compatible is set in each regulator node. However it was mistakenly matching against regulator-name instead. Fix the typo. This not only fixes the compatible verification, but also lifts the regulator-name restriction, so that more meaningful names can be set for each platform. Signed-off-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220429201325.2205799-1-nfraprado@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-05-04Documentation: Fix index.rst after psci.rst renamingMarc Zyngier1-1/+1
Fix the TOC in index.rst after psci.rst has been renamed to hypercalls.rst. Signed-off-by: Marc Zyngier <maz@kernel.org> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220504205627.18f46380@canb.auug.org.au
2022-05-04dt-bindings: display: rockchip: dw-hdmi: fix ports descriptionSascha Hauer1-15/+9
Current port description doesn't cover all possible cases. It currently expects one single port with two endpoints. When the HDMI connector is described in the device tree there can be two ports, first one going to the VOP and the second one going to the connector. Also on SoCs which only have a single VOP there will be only one endpoint instead of two. This patch addresses both issues. With this there can either be a single port ("port") , or two of them ("port@0", "port@1") when the connector is also in the device tree. Also the first or only port can either have one endpoint ("endpoint") for single VOP SoCs or two ("endpoint@0", "endpoint@1") for dual VOP SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-25-s.hauer@pengutronix.de
2022-05-04dt-bindings: display: rockchip: Add binding for VOP2Sascha Hauer1-0/+140
The VOP2 is found on newer Rockchip SoCs like the rk3568 or the rk3566. The binding differs slightly from the existing VOP binding, so add a new binding file for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-24-s.hauer@pengutronix.de
2022-05-04dt-bindings: mmc: sdhci-msm: Document the SDX65 compatibleRohit Agarwal1-0/+1
The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence, document the compatible with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1651480665-14978-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: sdhci-msm: Add compatible string for sm8150Bhupesh Sharma1-0/+1
Add sm8150 SoC specific compatible strings for qcom-sdhci controller. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20220429220833.873672-4-bhupesh.sharma@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: sdhci-msm: Convert bindings to yamlBhupesh Sharma2-123/+192
Convert Qualcomm sdhci-msm devicetree binding to YAML. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20220429220833.873672-2-bhupesh.sharma@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: brcm,sdhci-brcmstb: cleanup exampleKrzysztof Kozlowski1-9/+9
Cleanup indentation and order of entries in example DTS. The most important when reading the DTS are compatible and reg. By convention they are usually to first entries. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220428081817.35382-2-krzysztof.kozlowski@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: brcm,sdhci-brcmstb: correct number of reg entriesKrzysztof Kozlowski1-1/+1
The binding should not allow infinite number of 'reg' entries, so add strict limit. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220428081817.35382-1-krzysztof.kozlowski@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04dt-bindings: mmc: sdhci-of-dwcmhsc: Add rk3588Sebastian Reichel1-0/+1
Add compatible value for the Rockchip rk3588 dwcmshc controller. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220422170920.401914-8-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04Documentation: Fix typo in testing/sysfs-class-cxlSohaib Mohamed1-2/+2
Remove repeated words: "the the lowest" and "this this kernel" Signed-off-by: Sohaib Mohamed <sohaib.amhmd@gmail.com> Acked-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211006155017.135592-1-sohaib.amhmd@gmail.com
2022-05-04dt-bindings: Add HTE bindingsDipen Patel3-0/+156
Introduces HTE devicetree binding details for the HTE subsystem. It includes examples for the consumers, binding details for the providers and specific binding details for the Tegra194 based HTE providers. Signed-off-by: Dipen Patel <dipenp@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04hte: Add Tegra194 HTE kernel providerDipen Patel3-0/+72
Tegra194 device has multiple HTE instances also known as GTE (Generic Hardware Timestamping Engine) which can timestamp subset of SoC lines and signals. This provider driver focuses on IRQ and GPIO lines and exposes timestamping ability on those lines to the consumers through HTE subsystem. Also, with this patch, added: - documentation about this provider and its capabilities at Documentation/hte. - Compilation support in Makefile and Kconfig Signed-off-by: Dipen Patel <dipenp@nvidia.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)Alexandre Torgue1-0/+17
Add a "secure" version based on SCMI of STM32 boards. Only boards provided by STMicroelectronics are concerned: -STM32MP157A-DK1 -STM32MP157C-DK2 -STM32MP157C-ED1 -STM32MP157C-EV1 Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Rob Herring <robh@kernel.org>
2022-05-04dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"Alexandre Torgue1-8/+34
In case of "st,stm32mp1-rcc-secure" (stm32mp1 clock driver with RCC security support hardened), "clocks" and "clock-names" describe oscillators and are required. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org>
2022-05-04dt-bindings: rcc: Add optional external ethernet RX clock propertiesMarek Vasut1-0/+8
Describe optional external ethernet RX clock in the DT binding to fix dtbs_check warnings like: arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dt.yaml: rcc@50000000: 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks', 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Rob Herring <robh+dt@kernel.org> To: devicetree@vger.kernel.org Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220410220514.21779-1-marex@denx.de Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-05-04Merge branch kvm-arm64/wfxt into kvmarm-master/nextMarc Zyngier2-0/+6
* kvm-arm64/wfxt: : . : Add support for the WFET/WFIT instructions that provide the same : service as WFE/WFI, only with a timeout. : . KVM: arm64: Expose the WFXT feature to guests KVM: arm64: Offer early resume for non-blocking WFxT instructions KVM: arm64: Handle blocking WFIT instruction KVM: arm64: Introduce kvm_counter_compute_delta() helper KVM: arm64: Simplify kvm_cpu_has_pending_timer() arm64: Use WFxT for __delay() when possible arm64: Add wfet()/wfit() helpers arm64: Add HWCAP advertising FEAT_WFXT arm64: Add RV and RN fields for ESR_ELx_WFx_ISS arm64: Expand ESR_ELx_WFx_ISS_TI to match its ARMv8.7 definition Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-05-04dt-bindings: mediatek: mt8186: Add binding for MM iommuYong Wu1-0/+4
Add mt8186 iommu binding. "-mm" means the iommu is for Multimedia. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220503071427.2285-4-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04dt-bindings: mediatek: mt8195: Add binding for infra IOMMUYong Wu1-1/+12
In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters mainly are PCIe and USB. Different with MM IOMMU, all these masters connect with IOMMU directly, there is no mediatek,larbs property for infra IOMMU. Another thing is about PCIe ports. currently the function "of_iommu_configure_dev_id" only support the id number is 1, But our PCIe have two ports, one is for reading and the other is for writing. see more about the PCIe patch in this patchset. Thus, I only list the reading id here and add the other id in our driver. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220503071427.2285-3-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04dt-bindings: mediatek: mt8195: Add binding for MM IOMMUYong Wu1-0/+7
This patch adds descriptions for mt8195 IOMMU which also use ARM Short-Descriptor translation table format. In mt8195, there are two smi-common HW and IOMMU, one is for vdo(video output), the other is for vpp(video processing pipe). They connects with different smi-larbs, then some setting(larbid_remap) is different. Differentiate them with the compatible string. Something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON_VDO SMI_COMMON_VPP --------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... Another change is that we have a new IOMMU that is for infra master like PCIe and USB. The infra master don't have the larb and ports, thus we rename the port header file to mt8195-memory-port.h rather than mt8195-larb-port.h. Also, the IOMMU is not only for MM, thus, we don't call it "m4u" which means "MultiMedia Memory Management UNIT". thus, use the "iommu" as the compatiable string. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220503071427.2285-2-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04Merge remote-tracking branch 'arm64/for-next/sme' into kvmarm-master/nextMarc Zyngier4-10/+522
Merge arm64's SME branch to resolve conflicts with the WFxT branch. Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-05-04KVM: arm64: Implement PSCI SYSTEM_SUSPENDOliver Upton1-0/+39
ARM DEN0022D.b 5.19 "SYSTEM_SUSPEND" describes a PSCI call that allows software to request that a system be placed in the deepest possible low-power state. Effectively, software can use this to suspend itself to RAM. Unfortunately, there really is no good way to implement a system-wide PSCI call in KVM. Any precondition checks done in the kernel will need to be repeated by userspace since there is no good way to protect a critical section that spans an exit to userspace. SYSTEM_RESET and SYSTEM_OFF are equally plagued by this issue, although no users have seemingly cared for the relatively long time these calls have been supported. The solution is to just make the whole implementation userspace's problem. Introduce a new system event, KVM_SYSTEM_EVENT_SUSPEND, that indicates to userspace a calling vCPU has invoked PSCI SYSTEM_SUSPEND. Additionally, add a CAP to get buy-in from userspace for this new exit type. Only advertise the SYSTEM_SUSPEND PSCI call if userspace has opted in. If a vCPU calls SYSTEM_SUSPEND, punt straight to userspace. Provide explicit documentation of userspace's responsibilites for the exit and point to the PSCI specification to describe the actual PSCI call. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Oliver Upton <oupton@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220504032446.4133305-8-oupton@google.com
2022-05-04KVM: arm64: Add support for userspace to suspend a vCPUOliver Upton1-2/+35
Introduce a new MP state, KVM_MP_STATE_SUSPENDED, which indicates a vCPU is in a suspended state. In the suspended state the vCPU will block until a wakeup event (pending interrupt) is recognized. Add a new system event type, KVM_SYSTEM_EVENT_WAKEUP, to indicate to userspace that KVM has recognized one such wakeup event. It is the responsibility of userspace to then make the vCPU runnable, or leave it suspended until the next wakeup event. Signed-off-by: Oliver Upton <oupton@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220504032446.4133305-7-oupton@google.com
2022-05-04leds: Add driver for Qualcomm LPGBjorn Andersson1-0/+76
The Light Pulse Generator (LPG) is a PWM-block found in a wide range of PMICs from Qualcomm. These PMICs typically comes with 1-8 LPG instances, with their output being routed to various other components, such as current sinks or GPIOs. Each LPG instance can operate on fixed parameters or based on a shared lookup-table, altering the duty cycle over time. This provides the means for hardware assisted transitions of LED brightness. A typical use case for the fixed parameter mode is to drive a PWM backlight control signal, the driver therefor allows each LPG instance to be exposed to the kernel either through the LED framework or the PWM framework. A typical use case for the LED configuration is to drive RGB LEDs in smartphones etc, for which the driver supports multiple channels to be ganged up to a MULTICOLOR LED. In this configuration the pattern generators will be synchronized, to allow for multi-color patterns. The idea of modelling this as a LED driver ontop of a PWM driver was considered, but setting the properties related to patterns does not fit in the PWM API. Similarly the idea of just duplicating the lower bits in a PWM and LED driver separately was considered, but this would not allow the PWM channels and LEDs to be configured on a per-board basis. The driver implements the more complex LED interface, and provides a PWM interface on the side of that, in the same driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> [On the Sony Xperia Nile Discovery, SDM630] Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-04dt-bindings: leds: Add Qualcomm Light Pulse Generator bindingBjorn Andersson1-0/+173
This adds the binding document describing the three hardware blocks related to the Light Pulse Generator found in a wide range of Qualcomm PMICs. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Pavel Machek <pavel@ucw.cz>
2022-05-03Merge tag 'wireless-next-2022-05-03' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-nextJakub Kicinski2-110/+253
Kalle Valo says: ==================== wireless-next patches for v5.19 First set of patches for v5.19 and this is a big one. We have two new drivers, a change in mac80211 STA API affecting most drivers and ath11k getting support for WCN6750. And as usual lots of fixes and cleanups all over. Major changes: new drivers - wfx: silicon labs devices - plfxlc: pureLiFi X, XL, XC devices mac80211 - host based BSS color collision detection - prepare sta handling for IEEE 802.11be Multi-Link Operation (MLO) support rtw88 - support TP-Link T2E devices rtw89 - support firmware crash simulation - preparation for 8852ce hardware support ath11k - Wake-on-WLAN support for QCA6390 and WCN6855 - device recovery (firmware restart) support for QCA6390 and WCN6855 - support setting Specific Absorption Rate (SAR) for WCN6855 - read country code from SMBIOS for WCN6855/QCA6390 - support for WCN6750 wcn36xx - support for transmit rate reporting to user space * tag 'wireless-next-2022-05-03' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next: (228 commits) rtw89: 8852c: rfk: add DPK rtw89: 8852c: rfk: add IQK rtw89: 8852c: rfk: add RX DCK rtw89: 8852c: rfk: add RCK rtw89: 8852c: rfk: add TSSI rtw89: 8852c: rfk: add LCK rtw89: 8852c: rfk: add DACK rtw89: 8852c: rfk: add RFK tables plfxlc: fix le16_to_cpu warning for beacon_interval rtw88: remove a copy of the NAPI_POLL_WEIGHT define carl9170: tx: fix an incorrect use of list iterator wil6210: use NAPI_POLL_WEIGHT for napi budget ath10k: remove a copy of the NAPI_POLL_WEIGHT define ath11k: Add support for WCN6750 device ath11k: Datapath changes to support WCN6750 ath11k: HAL changes to support WCN6750 ath11k: Add QMI changes for WCN6750 ath11k: Fetch device information via QMI for WCN6750 ath11k: Add register access logic for WCN6750 ath11k: Add HW params for WCN6750 ... ==================== Link: https://lore.kernel.org/r/20220503153622.C1671C385A4@smtp.kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>