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2016-04-21dt-bindings: Add Oxford Semiconductor OXNAS Standard Clocks bindingsNeil Armstrong1-0/+35
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-04-21Merge branches 'doc.2016.04.19a', 'exp.2016.03.31d', 'fixes.2016.03.31d' and 'torture.2016.04.21a' into HEADPaul E. McKenney2-5/+43
doc.2016.04.19a: Documentation updates exp.2016.03.31d: Expedited grace-period updates fixes.2016.03.31d: Miscellaneous fixes torture.2016.004.21a Torture-test updates
2016-04-21Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds1-2/+5
Pull networking fixes from David Miller: 1) Fix memory leak in iwlwifi, from Matti Gottlieb. 2) Add missing registration of netfilter arp_tables into initial namespace, from Florian Westphal. 3) Fix potential NULL deref in DecNET routing code. 4) Restrict NETLINK_URELEASE to truly bound sockets only, from Dmitry Ivanov. 5) Fix dst ref counting in VRF, from David Ahern. 6) Fix TSO segmenting limits in i40e driver, from Alexander Duyck. 7) Fix heap leak in PACKET_DIAG_MCLIST, from Mathias Krause. 8) Ravalidate IPV6 datagram socket cached routes properly, particularly with UDP, from Martin KaFai Lau. 9) Fix endian bug in RDS dp_ack_seq handling, from Qing Huang. 10) Fix stats typing in bcmgenet driver, from Eric Dumazet. 11) Openvswitch needs to orphan SKBs before ipv6 fragmentation handing, from Joe Stringer. 12) SPI device reference leak in spi_ks8895 PHY driver, from Mark Brown. 13) atl2 doesn't actually support scatter-gather, so don't advertise the feature. From Ben Hucthings. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (72 commits) openvswitch: use flow protocol when recalculating ipv6 checksums Driver: Vmxnet3: set CHECKSUM_UNNECESSARY for IPv6 packets atl2: Disable unimplemented scatter/gather feature net/mlx4_en: Split SW RX dropped counter per RX ring net/mlx4_core: Don't allow to VF change global pause settings net/mlx4_core: Avoid repeated calls to pci enable/disable net/mlx4_core: Implement pci_resume callback net: phy: spi_ks8895: Don't leak references to SPI devices net: ethernet: davinci_emac: Fix platform_data overwrite net: ethernet: davinci_emac: Fix Unbalanced pm_runtime_enable qede: Fix single MTU sized packet from firmware GRO flow qede: Fix setting Skb network header qede: Fix various memory allocation error flows for fastpath tcp: Merge tx_flags and tskey in tcp_shifted_skb tcp: Merge tx_flags and tskey in tcp_collapse_retrans drivers: net: cpsw: fix wrong regs access in cpsw_ndo_open tcp: Fix SOF_TIMESTAMPING_TX_ACK when handling dup acks openvswitch: Orphan skbs before IPv6 defrag Revert "Prevent NUll pointer dereference with two PHYs on cpsw" VSOCK: Only check error on skb_recv_datagram when skb is NULL ...
2016-04-21ASoC: mediatek: Add HDMI dai-links in the mt8173-rt5650-rt5676 machine driverKoro Chen1-2/+3
This creates pcmC0D2p for the HDMI playback in the same card. Signed-off-by: Koro Chen <koro.chen@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-21ASoC: mediatek: Add second I2S on mt8173-rt5650 machine driverPC Liao1-0/+10
This patch adds second I2S connection to rt5650 codec for capture path on mt8173-rt5650 machine driver. Signed-off-by: PC Liao <pc.liao@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-21LSM: LoadPin for kernel file loading restrictionsKees Cook1-0/+17
This LSM enforces that kernel-loaded files (modules, firmware, etc) must all come from the same filesystem, with the expectation that such a filesystem is backed by a read-only device such as dm-verity or CDROM. This allows systems that have a verified and/or unchangeable filesystem to enforce module and firmware loading restrictions without needing to sign the files individually. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Serge Hallyn <serge.hallyn@canonical.com> Signed-off-by: James Morris <james.l.morris@oracle.com>
2016-04-21pinctrl: Add resource management devm_pinctrl_{register, unregister}Laxman Dewangan1-0/+2
Add new member of devm wrappers for the pinctrl_register and pinctrl_unregister in list of managed interfaces. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-20Input: bcm_iproc_tsc - DT spelling s/clock-name/clock-names/Geert Uytterhoeven1-1/+1
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2016-04-20[media] v4l2-rect.h: new header with struct v4l2_rect helper functionsHans Verkuil1-0/+1
This makes it easier to share this code with any driver that needs to manipulate the v4l2_rect datastructure. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2016-04-20[media] vidioc-dv-timings-cap.xml: explicitly state that pad and reserved should be zeroedHans Verkuil1-5/+7
The DV_TIMINGS_CAP documentation didn't state clearly that the pad and reserved fields should be zeroed by the application. For subdev pad can be other values as well. It also mistakenly said that only drivers would have to zero the reserved field, that's not correct. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2016-04-20[media] vidioc-enum-dv-timings.xml: explicitly state that pad and reserved should be zeroedHans Verkuil1-2/+3
The ENUM_DV_TIMINGS documentation did not clearly state that the pad and reserved fields should be zeroed (pad only when used with a video device node). Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2016-04-20[media] vidioc-g-edid.xml: be explicit about zeroing the reserved arrayHans Verkuil1-4/+6
The G/S_EDID documentation did not explicitly state that the reserved array should be zeroed by the application. Also add the missing VIDIOC_SUBDEV_G/S_EDID ioctl names to the header. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2016-04-20regulator: ti-abb: DT spelling s/#{address,size}-cell/#{address,size}-cells/Geert Uytterhoeven1-5/+5
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-20dt-bindings: modify document of Rockchip power domainsElaine Zhang1-0/+10
Rockchip Socs contain quality of service (qos) blocks managing priority, bandwidth, etc of the connection of each domain to the interconnect. These blocks loose state when their domain gets disabled and therefore need to be saved when disabling and restored when enabling a power-domain. These qos blocks also are similar over all currently available Rockchip SoCs. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-20KVM: s390: add clear I/O irq operation for FLICHalil Pasic1-0/+6
Introduce a FLIC operation for clearing I/O interrupts for a subchannel. Rationale: According to the platform specification, pending I/O interruption requests have to be revoked in certain situations. For instance, according to the Principles of Operation (page 17-27), a subchannel put into the installed parameters initialized state is in the same state as after an I/O system reset (just parameters possibly changed). This implies that any I/O interrupts for that subchannel are no longer pending (as I/O system resets clear I/O interrupts). Therefore, we need an interface to clear pending I/O interrupts. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2016-04-20KVM: s390: document FLIC behavior on unsupportedHalil Pasic1-0/+6
FLIC behavior deviates from the API documentation in reporting EINVAL instead of ENXIO for KVM_SET_DEVICE_ATTR/KVM_GET_DEVICE_ATTR when the group or attribute is unknown/unsupported. Unfortunately this can not be fixed for historical reasons. Let us at least have it documented. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2016-04-20dt-bindings: MediaTek: Add binding document for the AUXADCSascha Hauer1-0/+21
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2016-04-20dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC wrapper docJohn Crispin1-0/+1
Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2016-04-20crypto: s5p-sss - Remove useless hash interrupt handlerKrzysztof Kozlowski1-4/+2
Beside regular feed control interrupt, the driver requires also hash interrupt for older SoCs (samsung,s5pv210-secss). However after requesting it, the interrupt handler isn't doing anything with it, not even clearing the hash interrupt bit. Driver does not provide hash functions so it is safe to remove the hash interrupt related code and to not require the interrupt in Device Tree. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-04-19PCI: imx6: Add DT property for link gen, default to Gen1Tim Harvey1-0/+4
Freescale has stated [1] that the LVDS clock source of the IMX6 does not pass the PCI Gen2 clock jitter test, therefore unless an external Gen2 compliant external clock source is present and supplied back to the IMX6 PCIe core via LVDS CLK1/CLK2 you can not claim Gen2 compliance. Add a DT property to specify Gen1 vs Gen2 and check this before allowing a Gen2 link. We default to Gen1 if the property is not present because at this time there are no IMX6 boards in mainline that 'input' a clock on LVDS CLK1/CLK2. In order to be Gen2 compliant on IMX6 you need to: - Have a Gen2 compliant external clock generator and route that clock back to either LVDS CLK1 or LVDS CLK2 as an input (see IMX6SX-SabreSD reference design). - Specify this clock in the PCIe node in the DT (i.e., IMX6QDL_CLK_LVDS1_IN or IMX6QDL_CLK_LVDS2_IN instead of IMX6QDL_CLK_LVDS1_GATE which configures it as a CLK output). [1] https://community.freescale.com/message/453209 Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Zhu Richard <Richard.Zhu@freescale.com> CC: Akshay Bhat <akshay.bhat@timesys.com> CC: Rob Herring <robh+dt@kernel.org> CC: Shawn Guo <shawnguo@kernel.org>
2016-04-19PCI: imx6: Add reset-gpio-active-high boolean property to DTPetr Štetiar1-0/+6
Currently the reset-gpio DT property which controls the PCI bus device reset signal defaults to active-low reset sequence (L=reset state, H=operation state) plus the code in reset function isn't GPIO polarity aware - it doesn't matter if the defined reset-gpio is active-low or active-high, it will always result into active-low reset sequence. I've tried to fix it properly and change the reset-gpio reset sequence to be polarity-aware, but this patch has been accepted and then reverted as it has introduced few backward incompatible issues: 1. Some DTBs, for example, imx6qdl-sabresd, don't define reset-gpio polarity correctly: reset-gpio = <&gpio7 12 0>; which means that it's defined as active-high, but in reality it's active-low; thus it wouldn't work without a DTS fix. 2. The logic in the reset function is inverted: gpio_set_value_cansleep(imx6_pcie->reset_gpio, 0) msleep(100); gpio_set_value_cansleep(imx6_pcie->reset_gpio, 1); so even if some of the i.MX6 boards had reset-gpio polarity defined correctly in their DTSes, they would stop working. As we can't break old DTBs, we can't fix them, so we need to introduce this new DT reset-gpio-active-high boolean property so we can support boards with active-high reset sequence. This active-high reset sequence is for example needed on Apalis SoMs, where GPIO1_IO28, used to PCIe reset is not connected directly to PERST# PCIe signal, but it's ORed with RESETBMCU coming off the PMIC, and thus is inverted, active-high. Tested-by: Tim Harvey <tharvey@gateworks.com> # Gateworks Ventana boards (which have active-low PERST#) Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org>
2016-04-19PCI: imx6: Add initial imx6sx supportChristoph Fritz1-2/+6
Add initial PCIe support for the imx6 SoC derivate imx6sx. PCI MSI support is untested as the necessary suspend/resume quirk is not included in this patch. This patch is heavily based on patches by Richard Zhu. [bhelgaas: factor out refclk enable, fix adjacent typos in imx6q-pcie.txt] Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Acked-by: Richard Zhu <Richard.Zhu@freescale.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
2016-04-19dt/bindings: bcm2835: correct description for DMA-intMartin Sperl1-2/+2
Interrupt DMA11 is the shared interrupt for DMA channels 11 to 14 Interrupt DMA12 is the shared interrupt triggering for any DMA channel (this also includes DMA channel 15) Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Rob Herring <robh@kernel.org>
2016-04-19clk: Add {devm_}clk_hw_{register,unregister}() APIsStephen Boyd1-0/+1
We've largely split the clk consumer and provider APIs along struct clk and struct clk_hw, but clk_register() still returns a struct clk pointer for each struct clk_hw that's registered. Eventually we'd like to only allocate struct clks when there's a user, because struct clk is per-user now, so clk_register() needs to change. Let's add new APIs to register struct clk_hws, but this time we'll hide the struct clk from the caller by returning an int error code. Also add an unregistration API that takes the clk_hw structure that was passed to the registration API. This way provider drivers never have to deal with a struct clk pointer unless they're using the clk consumer APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-04-19tracing: Add support for named hist triggersTom Zanussi1-8/+266
Allow users to define 'named' hist triggers. All triggers created with the same 'name=xxx' option will update the same shared histogram data. This expands the hist trigger syntax from this: # echo hist:keys=xxx ... [ if filter] > event/trigger to this: # echo hist:name=xxx:keys=xxx ... [ if filter] > event/trigger Named histograms must use a 'compatible' set of keys and values, which means each event added to a set of named triggers must have the same names and types. Reading the 'hist' file of any of the participating events will produce the same output as any other participating event, which is to be expected since they share the same data. Link: http://lkml.kernel.org/r/1dbc84ee3322a75daaf5b3ef1d0cc0a2fb682fc7.1457029949.git.tom.zanussi@linux.intel.com Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> Tested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Reviewed-by: Namhyung Kim <namhyung@kernel.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2016-04-19tracing: Add support for multiple hist triggers per eventTom Zanussi1-6/+148
Allow users to define any number of hist triggers per trace event. Any number of hist triggers may be added for a given event, which may differ by key, value, or filter. Reading the event's 'hist' file will display the output of all the hist triggers defined on an event concatenated in the order they were defined. Link: http://lkml.kernel.org/r/48a0c8dd34c344571de880fb35e211c6d9a28961.1457029949.git.tom.zanussi@linux.intel.com Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> Tested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Reviewed-by: Namhyung Kim <namhyung@kernel.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2016-04-19tracing: Add 'hist' trigger DocumentationTom Zanussi1-0/+1155
Add documentation and usage examples for 'hist' triggers. Link: http://lkml.kernel.org/r/2e13f35f47fea6d647f0efefccfc9673ea84b29f.1457029949.git.tom.zanussi@linux.intel.com Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> Tested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Reviewed-by: Namhyung Kim <namhyung@kernel.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2016-04-19devicetree: bindings: designware-pcie: Fix unit addressStephen Boyd1-1/+1
Remove the 0x in the unit address because it shouldn't be there. Cc: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19dt-bindings: tegra: Rename some bindings for consistencyThierry Reding7-0/+0
Device tree binding for NVIDIA Tegra have traditionally carried the "nvidia," vendor prefix in the filename. A couple of odd ones don't, so fix them up for consistency. Also rename existing bindings to reflect the first compatible value that they document. This wasn't done consistently either. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19dt-bindings: tegra: Remove 0, prefix from unit-addressesThierry Reding7-12/+12
When Tegra124 support was first merged the unit-addresses of all devices were listed with a "0," prefix to encode the reg property's second cell. It turns out that this notation is not correct, and the "," separator is only used to separate fields in the unit address (such as the device and function number in PCI devices), not individual cells for addresses with more than one cell. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19of: Add Inforce Computing to vendor prefix listSrinivas Kandagatla1-0/+1
This patch adds Inforce Computing to vendor prefix list. This vendor makes boards like IFC6410, IFC6540 based on Qualcomm SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19of: Add Arrow Electronics to vendor prefix listSrinivas Kandagatla1-0/+1
This patch adds Arrow Electronics to vendor perfix list, as this vendor makes some of the Qualcomm SOC based 96boards like DB600c and DB410c. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19of: Add vendor prefix for Shenzhen Embest TechnologySergio Prado1-0/+1
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19Documentation: devicetree: bindings: regulator: palmas-pmic.txtSchuyler Patton1-0/+8
Adding support for the tps659038 pmic so it doesn't generate a warning when running the patch check script to Documentation/devicetree/bindings/regulator/palmas-pmic.txt Adding a note that the tps659037 device is a OTP spin of the tps659038 pmic and device compatible. Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19dt-bindings: Correct path for ARM GIC documentationJon Hunter3-4/+4
Commit eb3fcf007fff ("dt-bindings: consolidate interrupt controller bindings") moved the binding documentation for the ARM GIC from arm/gic.txt to interrupt-controller/arm,gic.txt. However, there are still some binding documents referring to the old path. Update these binding documents to use the correct location. Fixes: eb3fcf007fff ("dt-bindings: consolidate interrupt controller bindings") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19Documentation: devicetree: Clean up gpio-keys exampleAndreas Färber1-5/+5
Drop #address-cells and #size-cells, which are not required by the gpio-keys binding documentation, as button sub-nodes are not devices. Rename sub-nodes to avoid new dtc unit address warnings when copied. While at it, adopt the dashes convention for the node name. Reported-by: Julien Chauveau <chauveau.julien@gmail.com> Cc: Julien Chauveau <chauveau.julien@gmail.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Julien Chauveau <chauveau.julien@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-19documentation: Add documentation for RCU's major data structuresPaul E. McKenney12-0/+8291
This commit adds documentation for RCU's major data structures, including rcu_state, rcu_node, rcu_data, rcu_dynticks, and rcu_head. Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
2016-04-19mtd: brcmnand: Add support for v6.2 controllersFlorian Fainelli1-0/+1
Document and match the brcm,brcmnand-v6.2 compatible string, the controller has a register layout identical to the v6.0 version and supports prefetch. Update the command shift logic to account for v6.2 controller which are the first ones to use a shift of 0 (6.1 used a shift of 24). Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: document the NAND controller/NAND chip DT representationBoris Brezillon1-1/+36
Standardize the NAND controller/NAND chip DT representation. Now, all new NAND controller drivers should comply with this representation, even if they are only supporting a single NAND chip. Existing drivers can keep support for the old representation (where only the NAND chip was described), but are encouraged to also support the new one. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
2016-04-19iio: Add resource managed APIs devm_iio_channel_{get,release) in devresLaxman Dewangan1-0/+4
Add following APIs in the list of managed resources of IIO: devm_iio_channel_get() devm_iio_channel_get_all() devm_iio_channel_release() devm_iio_channel_release_all() Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-04-19iio: st_sensors: support open drain modeLinus Walleij1-0/+4
Some types of ST Sensors can be connected to the same IRQ line as other peripherals using open drain. Add a device tree binding and a sensor data property to flip the right bit in the interrupt control register to enable open drain mode on the INT line. If the line is set to be open drain, also tag on IRQF_SHARED to the IRQ flags when requesting the interrupt, as the whole point of using open drain interrupt lines is to share them with more than one peripheral (wire-or). Cc: devicetree@vger.kernel.org Cc: Giuseppe Barba <giuseppe.barba@st.com> Cc: Denis Ciocca <denis.ciocca@st.com> Acked-by: Rob Herring <rob@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-04-19dmaengine: qcom: bam_dma: document controlled-remotely dt propertyStanimir Varbanov1-0/+2
Extend BAM dt bindings with controlled-remotely property. The property will be needed to handle cases where we need to skip register writes to initialise BAM hardware block. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-19dt/bindings: bcm2835: add interrupt-names propertyMartin Sperl1-0/+26
Added standard interrupt-names property so that platform_get_irq_byname() can get used to fetch the interrupt corresponding to each dma_channel instead of the current platform_get_irq() with an assumed ordering of the interrupts. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-19dt-bindings: Add power domain info for NVIDIA PMCJon Hunter1-0/+80
Add power-domain binding documentation for the NVIDIA PMC driver in order to support generic power-domains. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-19tracing: Update the documentation to describe "event-fork" optionSteven Rostedt (Red Hat)1-10/+24
Add documentation to the ftrace.txt file in Documentation to describe the event-fork option. Also add the missing "display-graph" option now that it shows up in the trace_options file (from a previous commit). Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2016-04-19hwmon: (it87) Add support for IT8628EGuenter Roeck1-6/+9
IT8628E is functionally identical to IT8620E. Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2016-04-19hwmon: (ltc2978) Add missing devicetree binding for LTM4675Guenter Roeck1-0/+1
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2016-04-19hwmon: (fam15h_power) Add documentation for TDP and accumulated power algorithmHuang Rui1-1/+64
This patch adds the description to explain the TDP reporting mechanism and accumulated power algorithm. Signed-off-by: Huang Rui <ray.huang@amd.com> Cc: Borislav Petkov <bp@alien8.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2016-04-19hwmon: (max31722) Add support for MAX31722/MAX31723 temperature sensorsTiberiu Breana1-0/+34
Add basic support for the Maxim Integrated MAX31722/MAX31723 SPI temperature sensors / thermostats. Includes: - ACPI support; - raw temperature readings; - power management Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX31722-MAX31723.pdf Signed-off-by: Tiberiu Breana <tiberiu.a.breana@intel.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2016-04-19ASoC: sti-asoc-card: update tdm modeMoise Gergaud1-5/+39
- Add "TDM" in the st,mode property list - st,mode property is also mandatory for reader - add tdm playback dai-link example Signed-off-by: Moise Gergaud <moise.gergaud@st.com> Acked-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>