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This avoids the ugliness of creating a nested platform device from probe.
While moving it around anyways, move the mk6q phy init code from probe
to imx_sata_enable, as the phy needs to be re-initialized on resume too,
otherwise the drive won't be recognized after resume.
Tested on a wandboard i.mx6 quad.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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This patch adds support for the ahci sata controler found on Allwinner A10
and A20 SoCs to the ahci_platform driver.
Orignally written by Olliver Schinagl using the approach of having a platform
device which probe method creates a new child platform device which gets
driven by ahci_platform.c, as done by ahci_imx.c .
Refactored by Hans de Goede to add most of the non sunxi specific functionality
to ahci_platform.c and use a platform_data pointer from of_device_id for the
sunxi specific bits.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the
imx AHCI controller needs 3 clocks to be enabled.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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Provide the option to configure these speed modes per host, for those
host driver's that can't distinguish this in runtime.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
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Provide the option to configure these speed modes per host, for those
host driver's that can't distinguish this in runtime.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
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Provide the option to configure these speed modes per host, for those
host driver's that can't distinguish this in runtime.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
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irqchip mvebu changes for v3.15
- armada-370-xp
- add MSI helper
- MPIC chained handler
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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The new Armada 375 and Armada 38x Marvell SoCs are based on Cortex-A9
CPU cores and use the ARM GIC as their main interrupt controller.
However, for various purposes (wake-up from suspend, MSI interrupts),
they have kept a separate MPIC interrupt controller, acting as a slave
to the GIC. This MPIC was already used as the primary controller on
previous Marvell SoCs, so this commit extends the existing driver to
allow the MPIC to be used as a GIC slave.
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Using the added infrastructure for handling SoC differences,
this commit adds support for the watchdog controller available
in Armada 370 and Armada XP SoCs.
Also, and because the AXP clock initialization uses of_clk_get_by_name,
this commit changes the orion clock initialization to use clk_get() and
adds a proper clk_put() on the common exit/error paths.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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In order to support other SoC, it's required to distinguish
the 'control' timer register, from the 'rstout' register
that enables system reset on watchdog expiration.
To prevent a compatibility break, this commit adds a fallback
to a hardcoded RSTOUT address.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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DT-enabled plaforms, where the irqchip driver for the brigde interrupt
controller is available, can handle the watchdog IRQ properly. Therefore,
request the interrupt and add a dummy handler that merely calls panic().
This is done in order to have an initial 'ack' of the interruption,
which clears the watchdog state.
Furthermore, since some platforms don't have such IRQ, this commit
makes the interrupt specification optional.
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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commit b55f627feeb9d48fdbde3835e18afbc76712e49b ("spi: new spi->mode bits")
added two new command line options without adding the respective help
texts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add the Seiko Instruments Inc S35390a to the list of trivial i2c
devices.
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The following patches make use of vendor names:
* ricoh (Ricoh Co. Ltd.);
* qnap (QNAP Systems, Inc.);
* sii (Seiko Instruments, Inc.); and
* synology (Synology, Inc.)
Add them to the vendor prefix list.
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This commit updates the documentation that describes the various
families of SOCs produced by Marvell, together with the corresponding
available technical documents. It adds Armada 375 and Armada 38x, and
adds a link to the product brief for the already supported Armada 370.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This commit adds the basic support for the Armada 380 and Armada 385
SOCs. These SoCs share most of their IP with the Armada 370/XP
SoCs. The main difference is the use of a Cortex A9 CPU instead of the
PJ4B CPU. The Armada 380 is a single core Cortex-A9, while the Armada
385 is a dual-core Cortex-A9.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 38x will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This commit adds the basic support for the Armada 375 SOCs. These SoCs
share most of their IP with the Armada 370/XP SoCs. The main
difference is the use of a Cortex A9 CPU instead of the PJ4B CPU. The
interrupt controller and the L2 cache controller are also different
they are respectively the GIC and the PL310.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 375 will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The system controller block in the Armada 375 has different register
offsets for the system reset and other related functions. Therefore,
this commit introduces the new "armada-375-system-controller"
compatible string to identify the Armada 375 variant of the system
controller.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Merge "Integrator/Versatile base patch stack for the v3.15 series"
from Linus Walleij:
"this is a set of patches I have sent for review and failed to get ACKs
from the proper subsystem maintainers after repeated pings. However I
now need to have this rotated in linux-next as a base for multiplatform,
so please pull it in, it is all ARM drivers anyway. Russell pointed out
some things and these have been fixed and iterated in this series."
- Move integrator clock definitions to the device tree, alter
clock and timer drivers accordingly.
- Alter the VIC irqchip driver to support cascaded VICs off
a parent IRQ controller.
- Update the IM-PD1 plugin code to use managed resources.
- Register the VIC on the IM-PD1.
- Select the PL061 GPIO block for the IM-PD1 on the
Integrator/AP.
* tag 'integrator-for-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: select GPIO block
ARM: integrator: register the IM-PD1 VIC
ARM: integrator: use managed resources for the IM-PD1
irqchip: support cascaded VICs
irqchip: vic: update the base IRQ member correctly
clk: versatile: respect parent rate in ICST clock
clk: versatile: pass a parent to the ICST clock
ARM: integrator: switch to fetch clocks from device tree
ARM: SP804: make Integrator/CP timer pick clock from DT
ARM: integrator: define clocks in the device trees
Signed-off-by: Olof Johansson <olof@lixom.net>
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Reason: Bring bakc upstream modification to resolve conflicts
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Cortex-A12 implements Performance Monitors compliant with the PMUv2
architecture.
This patch adds support for the Cortex-A12 PMU to the ARM perf backend.
Signed-off-by: Albin Tonnerre <albin.tonnerre@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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Document the Krait PMU compatible string.
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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Add the ieee80211_iface_limit and the ieee80211_iface_combination
structures to docbook. Reformat the examples of combinations
slightly, so it looks a bit better on docbook.
Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
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* pci/dead-code:
PCI: Remove unused SR-IOV VF Migration support
iommu/amd: Add include of <linux/irqreturn.h>
mei: Add include of <linux/irqreturn.h>
misc: mic: Add include of <linux/irqreturn.h>
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Pull PCI updates from Bjorn Helgaas:
"The most interesting thing here is the change to enable INTx (by
clearing PCI_COMMAND_INTX_DISABLE) if the BIOS left INTx disabled.
Apparently the Baytrail BIOS does this, which means EHCI doesn't work.
Also, fix an AHCI MSI regression and other issues with the recent MSI
changes. This also adds pci_enable_msi_exact() and
pci_enable_msix_exact(), which aren't regression fixes, but will keep
us from touching drivers twice (once to stop using the deprecated
pci_enable_msi(), etc., and again to use the *_exact() variants).
There's also a minor MVEBU fix.
Summary:
MSI:
- Fix AHCI single-MSI fallback (Alexander Gordeev)
- Fix populate_msi_sysfs() error paths (Greg Kroah-Hartman)
- Fix htmldocs problem (Masanari Iida)
- Add pci_enable_msi_exact() and pci_enable_msix_exact() (Alexander Gordeev)
- Update documentation (Alexander Gordeev)
Miscellaneous:
- mvebu: expose device ID & revision via lspci (Andrew Lunn)
- Enable INTx if the BIOS left them disabled (Bjorn Helgaas)"
* tag 'pci-v3.14-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
ahci: Fix broken fallback to single MSI mode
PCI: Enable INTx if BIOS left them disabled
PCI/MSI: Add pci_enable_msi_exact() and pci_enable_msix_exact()
PCI/MSI: Fix cut-and-paste errors in documentation
PCI/MSI: Add pci_enable_msi() documentation back
PCI/MSI: Fix pci_msix_vec_count() htmldocs failure
PCI/MSI: Fix leak of msi_attrs
PCI/MSI: Check kmalloc() return value, fix leak of name
PCI: mvebu: Use Device ID and revision from underlying endpoint
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Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Merge "Qualcomm ARM Based SoC Updates for v3.15" from Kumar Gala:
* Add support for determining smp ops based on device tree.
* Add DT binding specs for Krait/Scorpion enable method
* Add DT binding specs for various Krait Processor controller complexes
* Add SoC SMP support for Krait Processor Subsystem v1 & v2
* tag 'qcom-soc-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: qcom: Add SMP support for KPSSv2
ARM: qcom: Add SMP support for KPSSv1
devicetree: bindings: Document qcom,saw2 node
devicetree: bindings: Document qcom,kpss-acc
devicetree: bindings: Document Krait/Scorpion cpus and enable-method
ARM: qcom: Re-organize platsmp to make it extensible
ARM: Introduce CPU_METHOD_OF_DECLARE() for cpu hotplug/smp
ARM: qcom: Rename various msm prefixed functions to qcom
clocksource: qcom: split building of legacy vs multiplatform support
ARM: qcom: Split Qualcomm support into legacy and multiplatform
clocksource: qcom: Move clocksource code out of mach-msm
ARM: msm: kill off hotplug.c
ARM: msm: Remove pen_release usage
ARM: dts: msm: split out msm8660 and msm8960 soc into dts include
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge "i.MX device tree changes for 3.15" from Shawn Guo:
- New SoC device tree support for imx35 and imx50
- A good number of new board support: imx25-eukrea, imx28-duckbill,
imx28-eukrea, Eukrea cpuimx35, imx50-evk, imx51-eukrea, imx53-voipac,
MCIMX53-START-R and Ka-Ro TX53.
- Quite some updates and tweaking on imx27 phycore and apf27dev boards
- Add pinfunc headers for imx25, imx27 and imx50
- Make pinctrl nodes board specific to avoid floating board specific
device tree blob with so many unused pinctrl data
- Use generic node name for fixed regulator
- Use clock defines in imx5 DTS files
- Use macros for interrupt and gpio flags
- A plenty of random updates on various SoC and board device tree
sources, adding pinctrl settings, device nodes, properties, aliases.
* tag 'imx-dt-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6: (89 commits)
ARM: dts: imx28-m28cu3: Remove 'reset-active-high'
ARM: dts: imx5: use imx51-ssi
ARM: dts: imx51: Add mmc aliases
ARM: dts: imx53: Add mmc aliases
ARM: dts: imx53: add support for Ka-Ro TX53 modules
ARM: dts: Add support for the cpuimx35 board from Eukrea and its baseboard.
ARM: dts: imx28-apf28dev: add user button
ARM: dts: i.MX51: Switch to use standard definitions for input subsystem
ARM: dts: i.MX53: add support for MCIMX53-START-R
ARM: dts: i.MX53: move common QSB nodes to new file
ARM: dts: imx53-evk: Remove board support
ARM: dts: vf610: use the interrupt macros
ARM: dts: imx53: Add gpio and input dt includes.
ARM: dts: i.MX27: Add SSI nodes
ARM: dts: mxs: add mxs phy controller id
ARM: dts: imx27-phytec-phycore-rdk: Add pinctrl definitions for WEIM
ARM: dts: imx27-phytec-phycore-rdk: Add pingrp for SDHC
ARM: dts: imx27-phytec-phycore-som: Add spi-cs-high property to PMIC
ARM: dts: imx27-phytec-phycore-rdk: Enable 1-Wire module
ARM: dts: imx27-phytec-phycore-som: Add NFC pin group
...
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Merge "i.MX6 device tree changes for 3.15" from Shawn Guo:
- A good number of new i.MX6 boards support: cm-fx6, dmo-edmqmx6,
nitrogen6x, Gateworks Ventana gw5xxx family, DFI FS700-M60 and
Zealz GK802
- Update imx6q-sabrelite device tree and add Dual Lite/Solo support
- Move pins that are used by particular client device out of hog group
- Use GPIO_6 for FEC interrupt to workaround a hardware bug (ERR006687
ENET: Only the ENET wake-up interrupt request can wake the system
from Wait mode.)
- Make pinctrl nodes board specific to avoid floating board specific
device tree blob with so many unused pinctrl data
- Use generic node name for fixed regulator
- Update OPP table for cpufreq support
- Random updates on various board device tree sources, adding pinctrl
settings, device nodes, properties, etc.
* tag 'imx6-dt-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6: (62 commits)
ARM: dts: imx6q: Add support for Zealz GK802
ARM: dts: imx6: Add DFI FS700-M60 board support
ARM: dts: imx6: use imx51-ssi
ARM: dts: imx6qdl: Add mmc aliases
ARM: dts: imx6q: Add spi4 alias
ARM: dts: imx6qdl-sabreauto: Add LVDS support
ARM: dts: imx6sl: add keypad support for i.mx6sl-evk board.
ARM: dts: imx6sl: add ocram device support
ARM: dts: imx6qdl: enable dma for spi
ARM: dts: imx6qdl-sabresd: Add PFUZE100 support
ARM: dts: imx6: add mxs phy controller id
ARM: dts: imx6: add anatop phandle for usbphy
ARM: dts: imx6q-arm2: use GPIO_6 for FEC interrupt.
ARM: dts: imx6qdl-sabreauto: use GPIO_6 for FEC interrupt.
ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.
ARM: dts: imx6qdl: use interrupts-extended for fec
ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ
ARM: dts: imx6q-sabrelite: PHY reset is active-low
ARM: dts: imx6: Use 'vddarm' as the regulator name
ARM: dts: imx6qdl-sabresd: Add power key support
...
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Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This reverts commit 74bb1bcc7dbb ("PCI: handle SR-IOV Virtual Function
Migration"), removing this exported interface:
pci_sriov_migration()
Since pci_sriov_migration() is unused, it is impossible to schedule
sriov_migration_task() or use any of the other migration infrastructure.
This is based on Stephen Hemminger's patch (see link below), but goes a bit
further.
Link: http://lkml.kernel.org/r/20131227132710.7190647c@nehalam.linuxnetplumber.net
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Stephen Hemminger <stephen@networkplumber.org>
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Pull the functionality which is required to cleanup sdhci/sdio
in. It's in a separate branch so it can be pulled from others
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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The Qualcomm Universal Peripheral (QUP) core is an
AHB slave that provides a common data path (an output
FIFO and an input FIFO) for serial peripheral interface
(SPI) mini-core.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Conflicts:
drivers/net/bonding/bond_3ad.h
drivers/net/bonding/bond_main.c
Two minor conflicts in bonding, both of which were overlapping
changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
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This cleanup series gets rid of <mach/timex.h> for platforms not using
ARCH_MULTIPLATFORM. (For multi-platform code it's already unused since
387798b (ARM: initial multiplatform support).)
To make this work some code out of arch/arm needed to be adapted. The
respective changes got acks by their maintainers to be taken via armsoc
(with Andrew Morton substituting for Alessandro Zummo as rtc maintainer).
Compared to the previous pull request there was another patch added that
fixes a (non-critical) regression on ixp4xx. Olof Johansson asked to not
squash this fix into the original commit to save him from the need to
reverify the series.
* tag 'dropmachtimexh-v2' of git://git.pengutronix.de/git/ukl/linux:
ARM: ixp4xx: fix timer latch calculation
ARM: drop <mach/timex.h> for !ARCH_MULTIPLATFORM, too
ARM: rpc: stop using <mach/timex.h>
ARM: ixp4xx: stop using <mach/timex.h>
input: ixp4xx-beeper: don't use symbols from <mach/timex.h>
ARM: at91: don't use <mach/timex.h>
ARM: ep93xx: stop using mach/timex.h
ARM: mmp: stop using mach/timex.h
ARM: netx: stop using mach/timex.h
ARM: sa1100: stop using mach/timex.h
clocksource: sirf/marco+prima2: drop usage of CLOCK_TICK_RATE
rtc: pxa: drop unused #define TIMER_FREQ
rtc: at91sam9: include <mach/hardware.h> explicitly
ARM/serial: at91: switch atmel serial to use gpiolib
Signed-off-by: Olof Johansson <olof@lixom.net>
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Fixes for omaps, mostly to deal with the 34xx vs 36xx SoC
configuration for overo boards.
* tag 'omap-for-v3.14/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Documentation: dt: OMAP: Update Overo/Tobi
ARM: dts: Add support for both OMAP35xx and OMAP36xx Overo/Tobi
ARM: dts: omap3-tobi: Use the correct vendor prefix
ARM: dts: omap3-tobi: Fix boot with OMAP36xx-based Overo
ARM: OMAP2+: Remove legacy macros for zoom platforms
ARM: OMAP2+: Remove MACH_NOKIA_N800
ARM: dts: N900: add missing compatible property
ARM: dts: N9/N950: fix boot hang with 3.14-rc1
ARM: OMAP1: nokia770: enable tahvo-usb
ARM: OMAP2+: gpmc: fix: DT ONENAND child nodes not probed when MTD_ONENAND is built as module
ARM: OMAP2+: gpmc: fix: DT NAND child nodes not probed when MTD_NAND is built as module
ARM: dts: omap3-gta04: Fix mmc1 properties.
ARM: dts: omap3-gta04: Fix 'aux' gpio key flags.
ARM: OMAP2+: add missing ARCH_HAS_OPP
ARM: dts: am335x-evmsk: Fix mmc1 support
ARM: DTS: am335x-evmsk: Correct audio clock frequency
ARM: dts: omap3-gta04: Add EOC irq gpio line handling.
Signed-off-by: Olof Johansson <olof@lixom.net>
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Pull networking fixes from David Miller:
1) kvaser CAN driver has fixed limits of some of it's table, validate
that we won't exceed those limits at probe time. Fix from Olivier
Sobrie.
2) Fix rtl8192ce disabling interrupts for too long, from Olivier
Langlois.
3) Fix botched shift in ath5k driver, from Dan Carpenter.
4) Fix corruption of deferred packets in TIPC, from Erik Hugne.
5) Fix newlink error path in macvlan driver, from Cong Wang.
6) Fix netpoll deadlock in bonding, from Ding Tianhong.
7) Handle GSO packets properly in forwarding path when fragmentation is
necessary on egress, from Florian Westphal.
8) Fix axienet build errors, from Michal Simek.
9) Fix refcounting of ubufs on tx in vhost net driver, from Michael S
Tsirkin.
10) Carrier status isn't set properly in hyperv driver, from Haiyang
Zhang.
11) Missing pci_disable_device() in tulip_remove_one), from Ingo Molnar.
12) AF_PACKET qdisc bypass mode doesn't adhere to driver provided TX
queue selection method. Add a fallback method mechanism to fix this
bug, from Daniel Borkmann.
13) Fix regression in link local route handling on GRE tunnels, from
Nicolas Dichtel.
14) Bonding can assign dup aggregator IDs in some sequences of
configuration, fix by making the allocation counter per-bond instead
of global. From Jiri Bohac.
15) sctp_connectx() needs compat translations, from Daniel Borkmann.
16) Fix of_mdio PHY interrupt parsing, from Ben Dooks
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (62 commits)
MAINTAINERS: add entry for the PHY library
of_mdio: fix phy interrupt passing
net: ethernet: update dependency and help text of mvneta
NET: fec: only enable napi if we are successful
af_packet: remove a stray tab in packet_set_ring()
net: sctp: fix sctp_connectx abi for ia32 emulation/compat mode
ipv4: fix counter in_slow_tot
irtty-sir.c: Do not set_termios() on irtty_close()
bonding: 802.3ad: make aggregator_identifier bond-private
usbnet: remove generic hard_header_len check
gre: add link local route when local addr is any
batman-adv: fix potential kernel paging error for unicast transmissions
batman-adv: avoid double free when orig_node initialization fails
batman-adv: free skb on TVLV parsing success
batman-adv: fix TT CRC computation by ensuring byte order
batman-adv: fix potential orig_node reference leak
batman-adv: avoid potential race condition when adding a new neighbour
batman-adv: properly check pskb_may_pull return value
batman-adv: release vlan object after checking the CRC
batman-adv: fix TT-TVLV parsing on OGM reception
...
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This patch fixes a typo in the Device Tree binding for the
leading '#'.
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add support of the device tree probing for the Renesas SH-Mobile SoCs
documenting the device tree binding as necessary.
This work is loosely based on the original patch by Nobuhiro Iwamatsu
<nobuhiro.iwamatsu.yj@renesas.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The clk-phase property is used to represent the 2 clock phase values that is
needed for the SD/MMC driver. Add a prepare function to the clk_ops, that will
use the syscon driver to set sdmmc_clk's phase shift that is located in the
system manager.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
---
v9: none
v8: Use degrees in the clk-phase binding property
v7: Add dts property to represent the clk phase of the sdmmc_clk. Add a
prepare function to the gate clk that will toggle clock phase setting.
Remove the "altr,socfpga-sdmmc-sdr-clk" clock type.
v6: Add a new clock type "altr,socfpga-sdmmc-sdr-clk" that will be used to
set the phase shift settings.
v5: Use the "snps,dw-mshc" binding
v4: Use the sdmmc_clk prepare function to set the phase shift settings
v3: Not use the syscon driver because as of 3.13-rc1, the syscon driver is
loaded after the clock driver.
v2: Use the syscon driver
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This patch is an attempt to gather the Ethernet related bindings in one file,
like it's done in the MMC and some other subsystems. It should save some of
the trouble of documenting several properties over and over in each binding
document, instead only making reference to the main file.
I have used the Embedded Power Architecture(TM) Platform Requirements (ePAPR)
standard as a base for the properties description, also documenting some ad-hoc
properties that have been introduced over time despite having direct analogs in
ePAPR.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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CC: Jay Vosburgh <fubar@us.ibm.com>
CC: Andy Gospodarek <andy@greyhouse.net>
Signed-off-by: Veaceslav Falico <vfalico@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Currently it's disabled because it's sometimes hard, in typical configs, to
make it work - because of the nature how the loadbalance modes work - as
it's hard to deliver valid arp replies to correct slaves by the switch.
However we still can use arp_validation in loadbalance with several other
configs, per example with arp_validate == 2 for backup with one broadcast
domain, without the switch(es) doing any balancing - this way we'd be (a
bit more) sure that the slave is up.
So, enable it to let users decide which one works/suits them best. Also
correct the mode limitation from BOND_OPT_ARP_VALIDATE.
CC: Nikolay Aleksandrov <nikolay@redhat.com>
CC: Jay Vosburgh <fubar@us.ibm.com>
CC: Andy Gospodarek <andy@greyhouse.net>
Signed-off-by: Veaceslav Falico <vfalico@redhat.com>
Acked-by: Nikolay Aleksandrov <nikolay@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This is a correction to the documentation. It was previously required but not documented.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add dma support for lpuart. This function depend on DMA driver.
You can turn on it by write both the dmas and dma-name properties in dts node.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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mvebu irqchip changes for v3.14
- add Dove PMU interrupt controller
Duh. I completely forgot about that one...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Freescale IFC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the driver to driver/memory
and fix the header file includes.
Also remove module_platform_driver() and instead call
platform_driver_register() from subsys_initcall() to make sure this module
has been loaded before MTD partition parsing starts.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Hans de Goede
Olliver Schinagl
Jaehoon Chung
Ulf Hansson
Thomas Gleixner
Ezequiel Garcia
Geert Uytterhoeven
Andrew Lunn
Thomas Petazzoni
Gregory CLEMENT
Olof Johansson
Albin Tonnerre
Stephen Boyd
Luciano Coelho
Bjorn Helgaas
Linus Torvalds
Paul Bolle
Jiri Kosina
Olaf Hering
Max Filippov
Ivan T. Ivanov
David S. Miller
Florian Fainelli
Sergei Shtylyov
Dinh Nguyen
Veaceslav Falico
Yuan Yao
Prabhakar Kushwaha