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2021-12-15dt-bindings: usb: dwc3-xilinx: Convert USB DWC3 bindingsManish Narani2-56/+131
Convert USB DWC3 bindings to DT schema format using json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Manish Narani <manish.narani@xilinx.com> Link: https://lore.kernel.org/r/1638808021-26921-1-git-send-email-manish.narani@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-12-15dt-bindings: input: pwm-vibrator: Convert txt bindings to yamlDavid Heidelberg2-66/+57
Converts txt binding to new YAML format and simplify example. Reviewed-by: Sebastian Reichel <sre@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211208183434.98087-1-david@ixit.cz
2021-12-15Merge tag '20211207114003.100693-2-vkoul@kernel.org' into arm64-for-5.17Bjorn Andersson1-0/+85
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org The immutable branch contains DT binding and in defines for the global clock controller registers used the the Qualcomm SM8450 dtsi.
2021-12-15spi: atmel,quadspi: Define sama7g5 QSPITudor Ambarus1-2/+14
sama7g5 embedds 2 instances of the QSPI controller: 1/ One Octal Serial Peripheral Interface (QSPI0) Supporting up to 200 MHz DDR. Octal, TwinQuad, HyperFlash and OctaFlash Protocols Supported 2/ One Quad Serial Peripheral Interface (QSPI1) Supporting Up to 90 MHz DDR/133 MHz SDR Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211209122939.339810-3-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-15spi: atmel,quadspi: Convert to json-schemaTudor Ambarus2-37/+87
Convert the Atmel QuadSPI controller Device Tree binding documentation to json-schema. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211209122939.339810-2-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-15ASoC: nvidia,tegra-audio: Convert multiple txt bindings to yamlDavid Heidelberg19-445/+790
Convert Tegra audio complex with the * ALC5632 * MAX98090 * RT5640 * RT5677 * SGTL5000 * TrimSlice * WM8753 * WM8903 * WM9712 codec to the YAML format. Additional changes: - added missing HPOUTL to the WM9712 codec. - extended rt5677 codec with multiple pins Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211211224946.79875-1-david@ixit.cz Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-15dt-bindings: arm64: dts: mediatek: Add mt7986 seriesSam Shih1-0/+8
MT7986 series is Mediatek's new 4-core SoC, which is mainly for wifi-router application. The difference between mt7986a and mt7986b is that some pins do not exist on mt7986b. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211122123222.8016-2-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15ixgbe: Document how to enable NBASE-T supportRobert Schlabbach1-0/+16
Commit a296d665eae1 ("ixgbe: Add ethtool support to enable 2.5 and 5.0 Gbps support") introduced suppression of the advertisement of NBASE-T speeds by default, according to Todd Fujinaka to accommodate customers with network switches which could not cope with advertised NBASE-T speeds, as posted in the E1000-devel mailing list: https://sourceforge.net/p/e1000/mailman/message/37106269/ However, the suppression was not documented at all, nor was how to enable NBASE-T support. Properly document the NBASE-T suppression and how to enable NBASE-T support. Fixes: a296d665eae1 ("ixgbe: Add ethtool support to enable 2.5 and 5.0 Gbps support") Reported-by: Robert Schlabbach <robert_s@gmx.net> Signed-off-by: Robert Schlabbach <robert_s@gmx.net> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-15ice: support immediate firmware activation via devlink reloadJacob Keller1-2/+22
The ice hardware contains an embedded chip with firmware which can be updated using devlink flash. The firmware which runs on this chip is referred to as the Embedded Management Processor firmware (EMP firmware). Activating the new firmware image currently requires that the system be rebooted. This is not ideal as rebooting the system can cause unwanted downtime. In practical terms, activating the firmware does not always require a full system reboot. In many cases it is possible to activate the EMP firmware immediately. There are a couple of different scenarios to cover. * The EMP firmware itself can be reloaded by issuing a special update to the device called an Embedded Management Processor reset (EMP reset). This reset causes the device to reset and reload the EMP firmware. * PCI configuration changes are only reloaded after a cold PCIe reset. Unfortunately there is no generic way to trigger this for a PCIe device without a system reboot. When performing a flash update, firmware is capable of responding with some information about the specific update requirements. The driver updates the flash by programming a secondary inactive bank with the contents of the new image, and then issuing a command to request to switch the active bank starting from the next load. The response to the final command for updating the inactive NVM flash bank includes an indication of the minimum reset required to fully update the device. This can be one of the following: * A full power on is required * A cold PCIe reset is required * An EMP reset is required The response to the command to switch flash banks includes an indication of whether or not the firmware will allow an EMP reset request. For most updates, an EMP reset is sufficient to load the new EMP firmware without issues. In some cases, this reset is not sufficient because the PCI configuration space has changed. When this could cause incompatibility with the new EMP image, the firmware is capable of rejecting the EMP reset request. Add logic to ice_fw_update.c to handle the response data flash update AdminQ commands. For the reset level, issue a devlink status notification informing the user of how to complete the update with a simple suggestion like "Activate new firmware by rebooting the system". Cache the status of whether or not firmware will restrict the EMP reset for use in implementing devlink reload. Implement support for devlink reload with the "fw_activate" flag. This allows user space to request the firmware be activated immediately. For the .reload_down handler, we will issue a request for the EMP reset using the appropriate firmware AdminQ command. If we know that the firmware will not allow an EMP reset, simply exit with a suitable netlink extended ACK message indicating that the EMP reset is not available. For the .reload_up handler, simply wait until the driver has finished resetting. Logic to handle processing of an EMP reset already exists in the driver as part of its reset and rebuild flows. Implement support for the devlink reload interface with the "fw_activate" action. This allows userspace to request activation of firmware without a reboot. Note that support for indicating the required reset and EMP reset restriction is not supported on old versions of firmware. The driver can determine if the two features are supported by checking the device capabilities report. I confirmed support has existed since at least version 5.5.2 as reported by the 'fw.mgmt' version. Support to issue the EMP reset request has existed in all version of the EMP firmware for the ice hardware. Check the device capabilities report to determine whether or not the indications are reported by the running firmware. If the reset requirement indication is not supported, always assume a full power on is necessary. If the reset restriction capability is not supported, always assume the EMP reset is available. Users can verify if the EMP reset has activated the firmware by using the devlink info report to check that the 'running' firmware version has updated. For example a user might do the following: # Check current version $ devlink dev info # Update the device $ devlink dev flash pci/0000:af:00.0 file firmware.bin # Confirm stored version updated $ devlink dev info # Reload to activate new firmware $ devlink dev reload pci/0000:af:00.0 action fw_activate # Confirm running version updated $ devlink dev info Finally, this change does *not* implement basic driver-only reload support. I did look into trying to do this. However, it requires significant refactor of how the ice driver probes and loads everything. The ice driver probe and allocation flows were not designed with such a reload in mind. Refactoring the flow to support this is beyond the scope of this change. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-15dt-bindings: arm: samsung: document jackpotlte board bindingDavid Virag1-0/+6
Add binding for the jackpotlte board (Samsung Galaxy A8 (2018)). Signed-off-by: David Virag <virag.david003@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211206153124.427102-4-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-15Merge tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux into arm/dtArnd Bergmann6-9/+59
Apple SoC DT updates for 5.17, round 2: - Various cleanups (removing useless props, sorting nodes, renaming things) - Add PMGR min-state binding & props (see PMGR pull for driver change) - Initial compatibles for t600x machines (M1 Pro/Max). This covers the bindings that just need compatible bumps & minor tweaks, no driver changes. - Add watchdog node (driver not merged yet, hopefully will be; binding went in the previous pull) - Add missing power-domains property to the mailbox binding * tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux: dt-bindings: mailbox: apple,mailbox: Add power-domains property arm64: dts: apple: t8103: Sort nodes by address arm64: dts: apple: t8103: Rename clk24 to clkref arm64: dts: apple: t8103: Add watchdog node dt-bindings: pinctrl: apple,pinctrl: Add apple,t6000-pinctrl compatible dt-bindings: pci: apple,pcie: Add t6000 support dt-bindings: i2c: apple,i2c: Add apple,t6000-i2c compatible dt-bindings: arm: apple: Add t6000/t6001 MacBook Pro 14/16" compatibles arm64: dts: apple: t8103: Add apple,min-state to DCP PMGR nodes dt-bindings: power: apple,pmgr-pwrstate: Add apple,min-state prop arm64: dts: apple: t8103: Remove PCIe max-link-speed properties Link: https://lore.kernel.org/r/a24faafd-f2ae-c3a7-5327-b27da7d9e34b@marcan.st Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-15Merge tag 'stm32-dt-for-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dtArnd Bergmann1-0/+1
STM32 DT for v5.17, round 1 Highlights: ---------- -MCU: - fix ili9341 for dtbs_check warnings on stm32f429 disco. - MPU: - ST boards: - tune HS USB phys on stm32mp15 EV1 and DKx boards. - add pull-up on USART3/UART7 RX pins on STM32MP15 DKx boards. - use correct pinctrl setting for STUSB1600 on STM32MP15 DK boards. - ENGICAM: - enable LVDS pannel on i.Core STM32MP1 EDIMM2.2. - add "i.Core STM32MP1 C.TOUCH 2.0 10.1" OF" support: EDIMM compliant general purpose carrier board with ETH 10/100, WIFI/BT, CAN, ... * tag 'stm32-dt-for-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF ARM: dts: stm32: Enable LVDS panel on i.Core STM32MP1 EDIMM2.2 ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1 ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15 ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boards ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding on stm32f429 disco Link: https://lore.kernel.org/r/dfe942db-5af7-bb82-22b6-3bd866c9017d@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-15dt-bindings: mailbox: apple,mailbox: Add power-domains propertyHector Martin1-0/+3
This will bind to the PMGR pwrstate nodes that control power/clock gating to SoC blocks. The mailbox driver doesn't do runtime-pm yet, so initially this will just keep the domain on permanently. Reviewed-by: Sven Peter <sven@svenpeter.dev> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15dt-bindings: soc: samsung: Fix I2C clocks order in USI binding exampleSam Protsenko1-2/+2
Now that HSI2C binding [1] is converted to dt-schema format, it reveals incorrect HSI2C clocks order in USI binding example: .../exynos-usi.example.dt.yaml: i2c@13820000: clock-names:0: 'hsi2c' was expected From schema: .../i2c-exynos5.yaml .../exynos-usi.example.dt.yaml: i2c@13820000: clock-names:1: 'hsi2c_pclk' was expected From schema: .../i2c-exynos5.yaml Change HSI2C clock order in USI binding example to satisfy HSI2C binding requirements and fix above warnings. [1] Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211214170924.27998-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-15Merge branch 'icc-qcm2290' into icc-nextGeorgi Djakov1-0/+137
Add support for QCM2290 including a few prep changes. * icc-qcm2290 interconnect: icc-rpm: Define ICC device type interconnect: icc-rpm: Add QNOC type QoS support interconnect: icc-rpm: Support child NoC device probe dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support interconnect: qcom: Add QCM2290 driver support Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15dt-bindings: interconnect: Add Qualcomm QCM2290 NoC supportShawn Guo1-0/+137
Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211215002324.1727-5-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14dt-bindings: clock: Add SM8450 GCC clock bindingsVinod Koul1-0/+85
Add device tree bindings for global clock controller on SM8450 SoCs. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org
2021-12-14dt-bindings: arm: qcom: Document SDX65 platform and boardsVamsi krishna Lanka1-0/+6
Document the SDX65 platform binding and also the boards using it. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1635552125-16407-2-git-send-email-quic_vamslank@quicinc.com
2021-12-14dt-bindings: clock: Add SDX65 GCC clock bindingsVamsi krishna Lanka1-0/+80
Add device tree bindings for global clock controller on SDX65 SOCs. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
2021-12-14dt-bindings: PCI: designware: Fix 'unevaluatedProperties' warningsRob Herring5-5/+18
With 'unevaluatedProperties' support implemented, there's a number of warnings from the Designware PCIe based bindings: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie@1ffc000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'device_type', 'bus-range', 'ranges', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected) Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie@1ffc000: Unevaluated properties are not allowed ('clock-names' was unexpected) Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f4000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'clocks', 'clock-names' were unexpected) Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f4000000: Unevaluated properties are not allowed ('clock-names' was unexpected) Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f5000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'phys', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'reset-gpios', 'pcie@0,0' were unexpected) Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f5000000: Unevaluated properties are not allowed ('phys', 'hisilicon,clken-gpios' were unexpected) Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: Unevaluated properties are not allowed ('device_type', '#address-cells', '#size-cells', 'linux,pci-domain', 'bus-range', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected) Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: Unevaluated properties are not allowed ('resets', 'phys', 'phy-names', 'reset-assert-ms' were unexpected) Documentation/devicetree/bindings/pci/rockchip-dw-pcie.example.dt.yaml: pcie@fe280000: Unevaluated properties are not allowed ('clock-names', 'msi-map', 'phys', 'phy-names', 'power-domains', 'resets', 'reset-names' were unexpected) Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie@15700000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'bus-range', 'ranges', 'interrupt-map-mask', 'interrupt-map' were unexpected) Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie@15700000: Unevaluated properties are not allowed ('clock-names', 'phys', 'vdd10-supply', 'vdd18-supply' were unexpected) Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie@e00000000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'dma-coherent', 'bus-range', 'ranges', 'interrupts', 'interrupt-parent', 'interrupt-map-mask', 'interrupt-map', 'clock-names', 'clocks' were unexpected) Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie@e00000000: Unevaluated properties are not allowed ('dma-coherent', 'clock-names', 'resets', 'pwren-gpios' were unexpected) Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.example.dt.yaml: pcie-ep@66000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'reset-names', 'resets', 'phy-names', 'phys' were unexpected) Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie@28400000: Unevaluated properties are not allowed ('clock-names' was unexpected) Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie@28400000: Unevaluated properties are not allowed ('device_type', 'bus-range', 'num-viewport', '#address-cells', '#size-cells', '#interrupt-cells', 'ranges', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'max-link-speed' were unexpected) The main problem is that snps,dw-pcie.yaml and snps,dw-pcie-ep.yaml shouldn't set 'unevaluatedProperties: false'. Otherwise, bindings that reference them cannot add additional properties. With that addressed, there's a handful of other undocumented properties to add. Cc: Xiaowei Song <songxiaowei@hisilicon.com> Cc: Binghui Wang <wangbinghui@hisilicon.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Greentime Hu <greentime.hu@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: linux-pci@vger.kernel.org Cc: linux-riscv@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211206194426.2470080-1-robh@kernel.org
2021-12-14dt-bindings: PCI: cdns-ep: Fix 'unevaluatedProperties' warningsRob Herring2-1/+1
With 'unevaluatedProperties' support implemented, the TI j721e endpoint binding example has a warning: Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.example.dt.yaml: pcie-ep@d000000: Unevaluated properties are not allowed ('max-link-speed', 'num-lanes', 'max-functions' were unexpected) Adjust where pci-ep.yaml is referenced so that ti,j721e-pci-ep.yaml will include it. Cc: Tom Joseph <tjoseph@cadence.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211206194413.2469643-1-robh@kernel.org
2021-12-14dt-bindings: PCI: Fix 'unevaluatedProperties' warningsRob Herring6-3/+30
With 'unevaluatedProperties' support implemented, there's several warnings due to undocumented properties: Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@0,0: Unevaluated properties are not allowed ('phy-names' was unexpected) Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@1,0: Unevaluated properties are not allowed ('phy-names' was unexpected) Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@2,0: Unevaluated properties are not allowed ('phy-names' was unexpected) Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.example.dt.yaml: pcie@11230000: Unevaluated properties are not allowed ('phy-names' was unexpected) Documentation/devicetree/bindings/pci/microchip,pcie-host.example.dt.yaml: pcie@2030000000: Unevaluated properties are not allowed ('interrupt-controller' was unexpected) Documentation/devicetree/bindings/pci/ti,am65-pci-ep.example.dt.yaml: pcie-ep@5500000: Unevaluated properties are not allowed ('num-ib-windows', 'num-ob-windows' were unexpected) Documentation/devicetree/bindings/pci/ti,am65-pci-host.example.dt.yaml: pcie@5500000: Unevaluated properties are not allowed ('num-viewport', 'interrupts' were unexpected) Documentation/devicetree/bindings/pci/ti,j721e-pci-host.example.dt.yaml: pcie@2900000: Unevaluated properties are not allowed ('dma-coherent' was unexpected) Add the necessary property definitions or remove the properties from the examples to fix these warnings. Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Jianjun Wang <jianjun.wang@mediatek.com> Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Daire McNamara <daire.mcnamara@microchip.com> Cc: Abraham I <kishon@ti.com> Cc: linux-pci@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20211206194406.2469361-1-robh@kernel.org
2021-12-14dt-bindings: memory-controllers: ti,gpmc: Drop incorrect unevaluatedPropertiesRob Herring1-4/+1
With 'unevaluatedProperties' support implemented, the TI GPMC example has a warning: Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.example.dt.yaml: memory-controller@6e000000: onenand@0,0: Unevaluated properties are not allowed ('compatible', '#address-cells', '#size-cells', 'partition@0', 'partition@100000' were unexpected) The child node definition for GPMC is not a complete binding, so specifying 'unevaluatedProperties: false' for it is not correct and should be dropped. Fixup the unnecessary 'allOf' while we're here. Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Roger Quadros <rogerq@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211206174215.2297796-1-robh@kernel.org
2021-12-14dt-bindings: usb: Add missing properties used in examplesRob Herring2-0/+9
With 'unevaluatedProperties' support implemented, the following warnings are generated in the usb examples: Documentation/devicetree/bindings/usb/intel,keembay-dwc3.example.dt.yaml: usb: usb@34000000: Unevaluated properties are not allowed ('reg' was unexpected) Documentation/devicetree/bindings/usb/snps,dwc3.example.dt.yaml: usb@4a030000: Unevaluated properties are not allowed ('reg' was unexpected) Add the missing property definitions. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> Cc: Felipe Balbi <balbi@kernel.org> Cc: linux-usb@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211206174113.2295616-1-robh@kernel.org
2021-12-14dt-bindings: watchdog: atmel: Add missing 'interrupts' propertyRob Herring1-0/+3
With 'unevaluatedProperties' support implemented, the atmel,sama5d4-wdt example has the following warning: /home/rob/proj/git/linux-dt/.build-arm64/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.example.dt.yaml: watchdog@fc068640: Unevaluated properties are not allowed ('interrupts' was unexpected) Document the missing 'interrupts' property. Cc: Wim Van Sebroeck <wim@linux-watchdog.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: linux-watchdog@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211206174045.2294873-1-robh@kernel.org
2021-12-14dt-bindings: watchdog: ti,rti-wdt: Fix assigned-clock-parentsRob Herring1-6/+0
With 'unevaluatedProperties' support implemented, the ti,rti-wdt example has the following warning: /home/rob/proj/git/linux-dt/.build-arm64/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.example.dt.yaml: watchdog@2200000: Unevaluated properties are not allowed ('assigned-clock-parents' was unexpected) The problem is the schema has a typo in 'assigned-clocks-parents'. As it is not required to list assigned clocks in bindings, just drop the property definitions to fix this. Cc: Wim Van Sebroeck <wim@linux-watchdog.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Tero Kristo <t-kristo@ti.com> Cc: linux-watchdog@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20211206174028.2294330-1-robh@kernel.org
2021-12-14dt-bindings: i2c: aspeed: Drop stray '#interrupt-cells'Rob Herring1-1/+0
'#interrupt-cells' is not documented which causes a warning when 'unevaluatedProperties' is implemented. Unless the I2C controller is also an interrupt controller, '#interrupt-cells' is not valid. This doesn't appear to be the case from the driver, so just remove it from the example. Cc: Brendan Higgins <brendanhiggins@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Joel Stanley <joel@jms.id.au> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Rayn Chen <rayn_chen@aspeedtech.com> Cc: linux-i2c@vger.kernel.org Cc: openbmc@lists.ozlabs.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-aspeed@lists.ozlabs.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211206174237.2298580-1-robh@kernel.org
2021-12-14Merge branch 'icc-sm8450' into icc-nextGeorgi Djakov1-0/+11
This add device tree binding and driver for interconnect providers found in SM8450 SoC. * icc-sm8450 dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings interconnect: qcom: Add SM8450 interconnect provider driver Link: https://lore.kernel.org/r/20211209084842.189627-1-vkoul@kernel.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14dt-bindings: interconnect: Add Qualcomm SM8450 DT bindingsVinod Koul1-0/+11
The Qualcomm SM8450 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211209084842.189627-2-vkoul@kernel.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14Documentation/gpu: include description of some of the GC microcontrollersYann Dirson1-0/+35
This is Alex' description from the "Looking for clarifications around gfx/kcq/kiq" thread, edited to fit as ReST. Original text: https://www.spinics.net/lists/amd-gfx/msg71383.html Originally-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Yann Dirson <ydirson@free.fr> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-12-14Documentation/gpu: include description of AMDGPU hardware structureYann Dirson2-0/+84
This describes in broad lines the how an AMD GPU is organized, in terms of hardware blocks. This is Alex' description from the "gpu block diagram" thread, edited to fit as ReST. Original text: https://www.spinics.net/lists/amd-gfx/msg71543.html Originally-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Yann Dirson <ydirson@free.fr> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-12-14dt-bindings: perf: Add compatible for Arm DSU-110Robin Murphy1-2/+6
DSU-110 is the newest and shiniest for Armv9. Its programmer's model is largely identical to the previous generation of DSUs, so we can treat it as compatible, but it does have a a handful of extra IMP-DEF PMU events to call its own. Thanks to the new notion of core complexes, the maximum number of supported CPUs goes up as well. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/51a8060493e1220886dcd468fad9a2b603607297.1639490264.git.robin.murphy@arm.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: perf: Convert Arm DSU to schemaRobin Murphy2-27/+41
Convert the DSU binding to schema, as one does. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/9fde2e11b0d11285c26d0e9d261034a1628c7901.1639490264.git.robin.murphy@arm.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: mmc: Convert Broadcom STB SDHCI binding to YAMLFlorian Fainelli2-53/+100
Convert the Broadcom STB SDHCI controller Device Tree binding to YAML. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208003727.3596577-2-f.fainelli@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-12-14dt-bindings: mmc: Add missing properties used in examplesRob Herring6-1/+28
When 'unevaluatedProperties' support is enabled, the following warnings are generated in the mmc bindings: Documentation/devicetree/bindings/mmc/mtk-sd.example.dt.yaml: mmc@11230000: Unevaluated properties are not allowed ('reg', 'interrupts' were unexpected) Documentation/devicetree/bindings/mmc/sdhci-am654.example.dt.yaml: mmc@4f80000: Unevaluated properties are not allowed ('sdhci-caps-mask' was unexpected) Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.example.dt.yaml: mmc@5a400000: Unevaluated properties are not allowed ('dma-names', 'dmas' were unexpected) Documentation/devicetree/bindings/mmc/arm,pl18x.example.dt.yaml: mmc@80126000: Unevaluated properties are not allowed ('dmas', 'dma-names' were unexpected) Documentation/devicetree/bindings/mmc/arasan,sdhci.example.dt.yaml: mmc@80420000: Unevaluated properties are not allowed ('resets' was unexpected) Documentation/devicetree/bindings/mmc/arm,pl18x.example.dt.yaml: mmc@52007000: Unevaluated properties are not allowed ('interrupt-names' was unexpected) Documentation/devicetree/bindings/clock/imx8qxp-lpcg.example.dt.yaml: mmc@5b010000: Unevaluated properties are not allowed ('power-domains' was unexpected) Add the missing properties as necessary. For pl18x, drop interrupt-names as there isn't any use of it when there are 2 interrupts. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Chaotian Jing <chaotian.jing@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Wenbin Mei <wenbin.mei@mediatek.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: linux-mmc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211206174201.2297265-1-robh@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-12-14dt-bindings: mmc: fsl-imx-esdhc: add i.MXRT compatible stringJesse Taube1-0/+1
Add i.MXRT documentation for compatible string. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211125211443.1150135-11-Mr.Bossman075@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-12-14dt-bindings: mmc: imx-esdhc: Add imx8ulp compatible stringJacky Bai1-0/+4
The USDHC on i.MX8ULP is derived from i.MX8MM, it uses two compatible strings, so update the compatible string for i.MX8ULP. Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20211112082930.3809351-3-peng.fan@oss.nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-12-14dt-bindings: gpu: mali-bifrost: Document RZ/G2L supportBiju Das1-2/+43
The Renesas RZ/G2{L, LC} SoC (a.k.a R9A07G044) has a Bifrost Mali-G31 GPU, add a compatible string for it. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://lore.kernel.org/r/20211208104026.421-2-biju.das.jz@bp.renesas.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: thermal: Convert Broadcom TMON to YAMLFlorian Fainelli2-23/+56
Convert the Broadcom AVS TMON Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208003727.3596577-12-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: rng: Convert iProc RNG200 to YAMLFlorian Fainelli2-16/+30
Convert the Broadcom iProc RNG200 HWRNG Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208003727.3596577-11-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: interrupt-controller: Convert Broadcom STB L2 to YAMLFlorian Fainelli2-31/+72
Convert the Broadcom STB L2 generic Level 2 interrupt controller Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208003727.3596577-10-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-binding: interrupt-controller: Convert BCM7038 L1 intc to YAMLFlorian Fainelli2-61/+91
Convert the Broadcom STB BCM7038 Level 1 interrupt controller Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208003727.3596577-7-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: gpio: Convert Broadcom STB GPIO to YAMLFlorian Fainelli2-83/+104
Convert the Broadcom STB GPIO Device Tree binding to YAML to help with validation. Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20211208003727.3596577-6-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: rtc: Convert Broadcom STB waketimer to YAMLFlorian Fainelli2-20/+44
Convert the Broadcom STB waketimer Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208003727.3596577-5-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: pwm: Convert BCM7038 PWM binding to YAMLFlorian Fainelli2-20/+43
Convert the Broadcom STB BCM7038 PWM Device Tree binding to YAML to help with validation. Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211208003727.3596577-4-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: reset: Convert Broadcom STB reset to YAMLFlorian Fainelli2-27/+48
Convert the Broadcom STB SW_INIT style reset controller binding to YAML. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20211208003727.3596577-3-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: pci: Convert iProc PCIe to YAMLFlorian Fainelli2-133/+184
Conver the iProc PCIe controller Device Tree binding to YAML now that all DTS in arch/arm and arch/arm64 have been fixed to be compliant. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211214035820.2984289-7-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14dt-bindings: phy: Convert Cygnus PCIe PHY to YAMLFlorian Fainelli2-47/+76
Convert the Broadcom Cygnus PCIe PHY Device Tree binding t YAML to help with validation. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211214035820.2984289-6-f.fainelli@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-14docs/arm64: delete a space from tagged-address-abiYanteng Si1-1/+1
Since e71e2ace5721("userfaultfd: do not untag user pointers") which introduced a warning: linux/Documentation/arm64/tagged-address-abi.rst:52: WARNING: Unexpected indentation. Let's fix it. Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Link: https://lore.kernel.org/r/20211209091922.560979-1-siyanteng@loongson.cn Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-12-14arm64/sve: Minor clarification of ABI documentationMark Brown1-1/+1
As suggested by Luis for the SME version of this explicitly say that the vector length should be extracted from the return value of a set vector length prctl() with a bitwise and rather than just any old and. Suggested-by: Luis Machado <Luis.Machado@arm.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20211210184133.320748-4-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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