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2007-10-10[POWERPC] MPC52xx: Trim includes on mpc5200 platform support codeGrant Likely4-50/+4
Drop unnecessary includes for MPC5200 based boards Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
2007-10-10[POWERPC] MPC52xx: Drop show_cpuinfo platform hooks from Lite5200Grant Likely1-15/+0
This hook doesn't really add any new information. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
2007-10-08[POWERPC] Lite5200: Use comma delimiter format for lists in device treeGrant Likely2-36/+36
DTC now supports "foo","bar" format for lists of strings; use the new format on the lite5200 device trees. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] spi: Support non-QE processorsPeter Korsgaard1-0/+4
On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properlyAnton Vorontsov1-12/+16
Apart from that the current code doesn't compile it's also meaningless with regard to the MPC8568E-MDS' BCSR. This patch used to reset UCCs properly. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] 85xx: mpc8568mds - update dts to be able to use UCCsAnton Vorontsov1-11/+11
1. UCC1's RX_DV pin is 16, not 15; 2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent u-boot also using 0x7. 3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup. 4. tx-clock should be CLK16 (GE125, PB31); 5. phy-connection-type is RGMII-ID; Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] QE: pario - support for MPC85xx layoutAnton Vorontsov1-0/+3
8 bytes padding required to match MPC85xx registers layout. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Reviewed-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascadingAnton Vorontsov6-27/+78
set_irq_chained_handler overwrites MPIC's handle_irq function (handle_fasteoi_irq) thus MPIC never gets eoi event from the cascaded IRQ. This situation hangs MPIC on MPC8568E. To solve this problem efficiently, QEIC needs pluggable handlers, specific to the underlaying interrupt controller. Patch extends qe_ic_init() function to accept low and high interrupt handlers. To avoid #ifdefs, stack of interrupt handlers specified in the header file and functions are marked 'static inline', thus handlers are compiled-in only if actually used (in the board file). Another option would be to lookup for parent controller and automatically detect handlers (will waste text size because of never used handlers, so this option abolished). qe_ic_init() also changed in regard to support multiplexed high/low lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic() handler implemented appropriately. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] mpc85xx_mds: select QUICC_ENGINEAnton Vorontsov1-1/+1
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] 86xx: update immap_86xx.h for the 8610Timur Tabi1-8/+78
Update the definition of the global utilities structure (ccsr_guts) in immap_86xx.h and add some related macros for the Freescale 8610 SOC. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] 85xx/86xx: refactor RSTCR reset codeKumar Gala13-142/+53
On the majority of 85xx & 86xx we have a register that's ability to assert HRESET_REQ to reset the board. We refactored that code so it can be shared between both platforms into fsl_soc.c and removed all the duplication in each platform directory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] Use for_each_ matching routinues for pci PHBsKumar Gala13-27/+45
On the Freescale embedded (83xx, 85xx, 86xx) and a few of the discrete bridges (mpc10x, tsi108) use the new for_each_compatible_node() or for_each_node_by_type() to provide more exact matching when looking for PHBs in the device tree. With the previous code it was possible to match on pci bridges since we were only matching on device_type. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] FSL: Access PCIe LTSSM register with correct sizeKumar Gala1-2/+2
The LTSSM register is actual 32-bits wide so we should be doing a dword access. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] 85xx: Failure with odd memory sizes and CONFIG_HIGHMEMDale Farnsworth1-0/+2
The CONFIG_FSL_BOOKE mmu setup code fails when CONFIG_HIGHMEM=y and the 3 fixed TLB entries cannot exactly map the lowmem size. Each TLB entry can map 4MB, 16MB, 64MB or 256MB, so the failure is observed when the kernel lowmem size is not equal to the sum of up to 3 of those values. Normally, memory is sized in nice numbers, but I observed this problem while testing a crash dump kernel. The failure can also be observed by artificially reducing the kernel's main memory via the mem= kernel command line parameter. This commit fixes the problem by setting __initial_memory_limit in adjust_total_lowmem(). Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] Add initial MPC8610 HPCD Platform files.Xianghua Xiao4-0/+1270
Add basic board support for the MPC8610 HPCD. This does not include any support the SoC Display or Audio controllers. Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loelier <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08[POWERPC] Treat 8610 PCIe host bridge as transparentJason Jin2-0/+2
Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>