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2010-10-18xen: dynamically allocate irq & event structuresJeremy Fitzhardinge1-6/+10
Dynamically allocate the irq_info and evtchn_to_irq arrays, so that 1) the irq_info array scales to the actual number of possible irqs, and 2) we don't needlessly increase the static size of the kernel when we aren't running under Xen. Derived on patch from Mike Travis <travis@sgi.com>. [Impact: reduce memory usage ] [v2: Conflict in drivers/xen/events.c: Replaced alloc_bootmen with kcalloc ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2010-10-18xen: identity map gsi->irqsKonrad Rzeszutek Wilk1-5/+15
Impact: preserve compat with native Reserve the lower irq range for use for hardware interrupts so we can identity-map them. [v2: Rebased on top tip/irq/core] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2010-10-18x86/io_apic: add get_nr_irqs_gsi()Jeremy Fitzhardinge2-0/+6
Impact: new interface to get max GSI Add get_nr_irqs_gsi() to return nr_irqs_gsi. Xen will use this to determine how many irqs it needs to reserve for hardware irqs. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: x86@kernel.org Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-18xen: implement pirq type event channelsJeremy Fitzhardinge2-2/+252
A privileged PV Xen domain can get direct access to hardware. In order for this to be useful, it must be able to get hardware interrupts. Being a PV Xen domain, all interrupts are delivered as event channels. PIRQ event channels are bound to a pirq number and an interrupt vector. When a IO APIC raises a hardware interrupt on that vector, it is delivered as an event channel, which we can deliver to the appropriate device driver(s). This patch simply implements the infrastructure for dealing with pirq event channels. [ Impact: integrate hardware interrupts into Xen's event scheme ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2010-10-18xen: define BIOVEC_PHYS_MERGEABLE()Jeremy Fitzhardinge3-1/+27
Impact: allow Xen control of bio merging When running in Xen domain with device access, we need to make sure the block subsystem doesn't merge requests across pages which aren't machine physically contiguous. To do this, we define our own BIOVEC_PHYS_MERGEABLE. When CONFIG_XEN isn't enabled, or we're not running in a Xen domain, this has identical behaviour to the normal implementation. When running under Xen, we also make sure the underlying machine pages are the same or adjacent. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2010-10-18xen: Don't disable the I/O spaceAlex Nixon1-2/+0
If a guest domain wants to access PCI devices through the frontend driver (coming later in the patch series), it will need access to the I/O space. [ Impact: Allow for domU IO access, preparing for pci passthrough ] Signed-off-by: Alex Nixon <alex.nixon@citrix.com> Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2010-10-16arm: Use ARCH_IRQ_INIT_FLAGSThomas Gleixner2-8/+2
The core code now initializes the requested number of interrupts and sets the flags in irq_desc.status which are requested by the architecture via ARCH_IRQ_INIT_FLAGS. Add ARCH_IRQ_INIT_FLAGS and remove the loop which sets those flags after the irq descriptors are allocated. [ This patch should have been in the original irq rework and got dropped accidentaly ] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Anand Gadiyar <gadiyar@ti.com>
2010-10-16genirq, ARM: Fix boot on ARM platformsAnand Gadiyar1-1/+3
Commit b683de2b3 in linux-next as of 20101014 (genirq: Query arch for number of early descriptors) seems to have broken bootup on several ARM boards - my beagleboard gives the following dump with earlyprintk: NR_IRQS:402 Unable to handle kernel NULL pointer dereference at virtual address 00000028 pgd = c0004000 [00000028] *pgd=00000000 Internal error: Oops: 5 [#1] last sysfs file: Modules linked in: CPU: 0 Not tainted (2.6.36-rc7-next-20101014-linux-next-20101012+ #40) PC is at init_IRQ+0x14/0x48 LR is at start_kernel+0x150/0x2c0 [...] We seem to be using desc->status without assigning desc to anything. Fix this by adding back the code that was originally there. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org LKML-Reference: <1287077397-21781-1-git-send-email-gadiyar@ti.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-10-12genirq: Fix CONFIG_GENIRQ_NO_DEPRECATED=y buildThomas Gleixner2-2/+2
This option can be set to verify the full conversion to the new chip functions. Fix the fallout of the patch rework, so the core code compiles and works with it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-10-12x86: Switch sparse_irq allocations to GFP_KERNELThomas Gleixner1-8/+8
No callers from atomic context (except boot) anymore. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12genirq: Switch sparse_irq allocator to GFP_KERNELThomas Gleixner1-3/+2
The allocator functions are now called outside of preempt disabled regions. Switch to GFP_KERNEL. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12genirq: Make sparse_lock a mutexThomas Gleixner1-19/+14
No callers from atomic regions. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: lguest: Use new irq allocatorThomas Gleixner1-2/+2
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: Rusty Russell <rusty@rustcorp.com.au>
2010-10-12genirq: Remove the now unused sparse irq leftoversThomas Gleixner6-266/+4
The move_irq_desc() function was only used due to the problem that the allocator did not free the old descriptors. So the descriptors had to be moved in create_irq_nr(). That's history. The code would have never been able to move active interrupt descriptors on affinity settings. That can be done in a completely different way w/o all this horror. Remove all of it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12genirq: Sanitize dynamic irq handlingThomas Gleixner4-125/+31
Use the cleanup functions of the dynamic allocator. No need to have separate implementations. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12genirq: Remove arch_init_chip_data()Thomas Gleixner3-10/+0
This function should have not been there in the first place. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: xen: Sanitise sparse_irq handlingThomas Gleixner1-12/+11
There seems to be more cleanups possible, but that's left to the xen experts :) Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
2010-10-12x86: Use sane enumerationThomas Gleixner1-12/+10
Instead of looping through all interrupts, use the bitmap lookup to find the next. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: uv: Clean up the direct access to irq_descThomas Gleixner3-38/+20
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: Make io_apic.c local functions staticThomas Gleixner2-11/+5
No users outside of io_apic.c Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12genirq: Remove irq_2_iommuThomas Gleixner2-22/+0
irq_2_iommu is now in the x86 code where it belongs. Remove all leftovers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12x86: Speed up the irq_remapped check in hot pathesThomas Gleixner4-15/+14
irq_2_iommu is in struct irq_cfg, so we can do the irq_remapped check based on irq_cfg instead of going through a lookup function. That's especially interesting in the eoi_ioapic_irq() hotpath. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12intr_remap: Simplify the code furtherThomas Gleixner1-84/+29
Having irq_2_iommu in struct irq_cfg allows further simplifications. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12intr_remap: Use irq_2_iommu in struct irq_cfgThomas Gleixner1-36/+3
Switch the intr_remapping code to use the irq_2_iommu struct in irg_cfg. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12x86: Embedd irq_2_iommu into irq_cfgThomas Gleixner3-7/+11
That interrupt remapping code is x86 specific and tied to the io_apic code. No need for separate allocator functions in the interrupt remapping code. This allows to simplify the code and irq_2_iommu is small (13 bytes on 64bit) so it's not a real problem even if interrupt remapping is runtime disabled. If it's compile time disabled the impact is zero. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12pci: intr_remap: Remove unused functionsThomas Gleixner2-49/+0
No users. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12pci: intr_remap: Use irq_dataThomas Gleixner1-31/+8
No need to dereference irq_desc. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12pci: intr-remap: Free irte memory if SPARSE_IRQ=yThomas Gleixner1-0/+14
With SPARSE_IRQ=y the irte descriptors are dynamically allocated, but not freed in free_irte(). That was ok as long as the sparse irq core was not freeing irq descriptors on destroy_irq(). Now we leak the irte descriptor. Free it in free_irte(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12x86: io_apic: Remove the now unused sparse_irq arch_* functionsThomas Gleixner1-120/+0
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: ioapic: Cleanup sparse irq codeThomas Gleixner2-60/+48
Switch over to the new allocator and remove all the magic which was caused by the unability to destroy irq descriptors. Get rid of the create_irq_nr() loop for sparse and non sparse irq. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: Don't setup ioapic irq for sci twiceYinghai Lu1-4/+4
The sparseirq rework triggered a warning in the iommu code, which was caused by setting up ioapic for ACPI irq 9 twice. This function is solely to handle interrupts which are on a secondary ioapic and outside the legacy irq range. Replace the sparse irq_to_desc check with a non ifdeffed version. [ tglx: Moved it before the ioapic sparse conversion and simplified the inverse logic ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4CB00122.3030301@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: io_apic: Prepare alloc/free_irq_cfg()Thomas Gleixner1-9/+9
Rename the grossly misnamed get_one_free_irq_cfg() to alloc_irq_cfg(). Add a (not yet used) irq number argument to free_irq_cfg() Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: Implement new allocator functionsThomas Gleixner1-7/+47
Implement new allocator functions which make use of the core changes. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: ioapic: Cleanup get_one_free_irq_cfg()Thomas Gleixner1-12/+11
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: ioapic: Cleanup some moreThomas Gleixner1-12/+8
Cleanup after the irq_chip conversion a bit. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: Convert ht set_affinity to new chip functionThomas Gleixner1-14/+11
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12x86: Cleanup hpet affinity settingThomas Gleixner1-2/+1
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: Convert dmar affinity setting to new chip functionThomas Gleixner1-13/+12
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: David Woodhouse <dwmw2@infradead.org>
2010-10-12x86: Convert remapped msi to new chip.irq_set_affinity functionThomas Gleixner1-17/+17
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12x86: Convert remapped ioapic affinity setting to new irq chip functionThomas Gleixner1-38/+20
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: Suresh Siddha <suresh.b.siddha@intel.com>
2010-10-12x86: Convert msi affinity setting to new chip functionsThomas Gleixner1-14/+12
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12x86: Prepare the affinity common functions for taking struct irq_data *Thomas Gleixner3-52/+33
While at it rename it to sensible function names and fix the return value from unsigned to int for __ioapic_set_affinity (set_desc_affinity). Returning -1 in a function returning unsigned int is somewhat strange. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: ioapic: Clean up the direct access to irq_descThomas Gleixner1-51/+28
Most of it is useless pseudo optimization. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12ht: Convert to new irq_chip functionsThomas Gleixner3-18/+13
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-12dmar: Convert to new irq chip functionsThomas Gleixner4-10/+11
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: David Woodhouse <dwmw2@infradead.org>
2010-10-12x86: ioapic/hpet: Convert to new chip functionsThomas Gleixner3-30/+26
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: ioapic: Convert mask to new irq_chip functionThomas Gleixner1-52/+43
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: io_apic: Convert startup to new irq_chip functionThomas Gleixner1-7/+5
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: Cleanup io_apicThomas Gleixner1-67/+42
Sanitize functions. Remove irq_desc pointer magic. Preparatory patch for further cleanups. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
2010-10-12x86: Cleanup access to irq_dataThomas Gleixner2-32/+33
Fixup the open coded access to irq_desc->[handler_data|chip_data|msi-desc] Use the macros and inline functions for it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
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