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i.MX7ULP does NOT support runtime switching clock source for PCC,
APLL_PFD1 by default is usdhc's clock source, so just use it
in kernel to avoid below kernel dump during kernel boot up and
make sure kernel can boot up with SD root file-system.
[ 3.035892] Loading compiled-in X.509 certificates
[ 3.136301] sdhci-esdhc-imx 40370000.mmc: Got CD GPIO
[ 3.242886] mmc0: Reset 0x1 never completed.
[ 3.247190] mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
[ 3.253751] mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00000002
[ 3.260218] mmc0: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000001
[ 3.266775] mmc0: sdhci: Argument: 0x00009a64 | Trn mode: 0x00000000
[ 3.273333] mmc0: sdhci: Present: 0x00088088 | Host ctl: 0x00000002
[ 3.279794] mmc0: sdhci: Power: 0x00000000 | Blk gap: 0x00000080
[ 3.286350] mmc0: sdhci: Wake-up: 0x00000008 | Clock: 0x0000007f
[ 3.292901] mmc0: sdhci: Timeout: 0x0000008c | Int stat: 0x00000000
[ 3.299364] mmc0: sdhci: Int enab: 0x007f010b | Sig enab: 0x00000000
[ 3.305918] mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00008402
[ 3.312471] mmc0: sdhci: Caps: 0x07eb0000 | Caps_1: 0x0000b400
[ 3.318934] mmc0: sdhci: Cmd: 0x0000113a | Max curr: 0x00ffffff
[ 3.325488] mmc0: sdhci: Resp[0]: 0x00000900 | Resp[1]: 0x0039b37f
[ 3.332040] mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x00400e00
[ 3.338501] mmc0: sdhci: Host ctl2: 0x00000000
[ 3.343051] mmc0: sdhci: ============================================
Fixes: 20434dc92c05 ("ARM: dts: imx: add common imx7ulp dtsi support")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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usdhc's clock rate is different according to different devices
connected, so clock rate assignment should be placed in board
DT according to different devices connected on each usdhc port.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Enable USBOTG1 support for evk board, it is dual-role function
port.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This patch adds i.MX7ULP EVK board MIPI-DSI backlight support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The NXP i.MX 7ULP Evaluation Kit (EVK) provides a platform for rapid
evaluation of the i.MX 7ULP, which features NXP's advanced implementation
of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and
2D Graphics Processing Units (GPUs).
The EVK enables HDMI output for simple out-of-the-box to bring up but
allows reconfiguration for MIPI displays. The EVK is designed as a
System-On-Module(SOM) board that connects to an associated baseboard.
The SOM provides 1 GB LPDDR3, 8 MB Quad SPI flash, Micro SD 3.0 card
socket, WiFi/ Bluetooth capability, USB 2.0 OTG with Type C connector
and an NXP PF1550 power management IC (PMIC). The baseboard provides
additional capabilities including a full SD/MMC 3.0 card socket, audio
codec, multiple sensors, an HDMI connector, and an alternate MIPI display
connector. Additionally, the EVK facilitates software development with the
ultimate goal of faster time to market through the support of both
Linux OS and AndroidTM rich operating systems, as well as FreeRTOS.
This patch aims to support the preliminary booting up features
as follows:
GPIO
LPUART
FEC
SD/MMC
See more board details:
https://www.nxp.com/products/processors-and-microcontrollers/
arm-based-processors-and-mcus/i.mx-applications-processors/
i.mx-7-processors/evaluation-kit-for-the-i.mx-7ulp-applications
-processor:MCIMX7ULP-EVK
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang
Peter Chen
A.s. Dong