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2018-12-05ARM: dts: iwg20d-q7-common: Move cmt/rwdt node out of RZ/G1M SOMBiju Das1-0/+9
The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules are SoC specific and should be part of board dts rather than SoM dtsi. By moving these nodes to the common dtsi it allows cmt and rwdt to be enabled on both of these boards with less lines of code. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-28ARM: dts: iwg20d-q7-common: Move pciec node out of common dtsiBiju Das1-4/+0
PCIe is not populated by default on iWave RZ/G1N board. RZ/G1N board is almost identical to RZ/G1M. In order to reuse the common dtsi for both the boards, it is required to move pcie node from common dtsi to board specific dts. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-23ARM: dts: convert to SPDX identifier for Renesas boardsWolfram Sang1-4/+1
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTSBiju Das1-2/+25
DMA transfer uses DVC DMA DMApp [MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI] DMA DMApp [MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI] Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTSBiju Das1-2/+2
DMA transfer to/from SRC DMA DMApp [MEM] -> [SRC] -> [SSIU] -> [SSI] DMA DMApp [MEM] <- [SRC] <- [SSIU] <- [SSI] Current sound driver is supporting SSI/SRC random connection. So, this patch is trying SSI1 -> SRC3 SSI0 <- SRC2 Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTSBiju Das1-5/+0
DMA transfer to/from SSIU DMA [MEM] -> [SSIU] -> [SSI] DMA [MEM] <- [SSIU] <- [SSI] Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20ARM: dts: iwg20d-q7-common: Sound DMA support on DTSBiju Das1-2/+2
DMA transfer to/from SSI DMA [MEM] -> [SSI] DMA [MEM] <- [SSI] Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20ARM: dts: iwg20d-q7-common: Sound PIO supportBiju Das1-0/+46
Enable sound PIO support on carrier board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codecBiju Das1-0/+24
This patch enables SGTL5000 audio codec on the carrier board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg20d-q7: Enable PCIe ControllerBiju Das1-0/+8
Enable PCIe Controller & set PCIe bus clock frequency. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg20d-q7-common: Add can0 support to carrier boardFabrizio Castro1-0/+12
This patch enables CAN0 interface exposed through connector J20 on the carrier board. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg20d-q7: Add support for ttySC3Fabrizio Castro1-0/+14
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12ARM: dts: iwg20d-q7: Enable HS-USBBiju Das1-1/+6
Enable HS-USB device for the iWave G20D-Q7 carrier board based on RZ/G1M. Also disable the host mode support on usb otg port by default to avoid pin conflicts. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-09ARM: dts: iwg20d-q7: Rework DT architectureFabrizio Castro1-0/+147
Since the same carrier board may host RZ/G1M and RZ/G1N based Systems on Module, the DT architecture for iwg20d-q7 needs better decoupling. This patch provides: * iwg20d-q7-common.dtsi - its purpose is to define the carrier board definitions, and its content is basically the same as the previous version of r8a7743-iwg20d-q7.dts, only it has no reference to the SoM .dtsi, and that's why the filename doesn't mention the SoC name any more. * r8a7743-iwg20d-q7.dts - its new purpose is to put together the SoM .dtsi (r8a7743-iwg20m.dtsi) and the carrier board .dtsi defined by this very patch, along with "model" and "compatible" properties. The final DT architecture to describe the board is now: r8a7743-iwg20d-q7.dts # Carrier Board + SoM ├── r8a7743-iwg20m.dtsi # SoM │   └── r8a7743.dtsi # SoC └── iwg20d-q7-common.dtsi # Carrier Board and maximizes the reuse of the definitions for the carrier board and for the SoM. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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