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2019-06-21ARM: dts: r7s9210: Add IRQC device nodeChris Brandt1-0/+19
Enable support for the IRQC on RZ/A2M, which is a small front-end to the GIC. This allows to use up to 8 external interrupts with configurable sense select. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add USB Device supportChris Brandt1-0/+24
Add USB Device support for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add USB Host supportChris Brandt1-0/+66
Add EHCI and OHCI host support for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add USB clockChris Brandt1-0/+7
Add USB clock node. If present, this clock input must be 48MHz. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add SDHI supportChris Brandt1-0/+24
Add SDHI support for the R7S9210 (RZ/A2) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add RIIC supportChris Brandt1-0/+76
Add I2C support for the R7S9210 (RZ/A2) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add Ethernet supportChris Brandt1-0/+25
Add Ethernet support for the RZ/A2 SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add RSPIChris Brandt1-0/+45
Add RSPI support for RZ/A2 SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-23ARM: dts: r7s9210: Initial SoC device treeChris Brandt1-0/+218
Basic support for the RZ/A2 (R7S9210) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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