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2017-07-27ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for vin nodesSimon Horman1-2/+2
Use R-Car Gen 2 fallback binding for vind nodes in DT for r8a7794 SoC. This has no run-time effect for the current driver as the initialisation sequence is the same for the SoC-specific binding for r8a7794 and the fallback binding for R-Car Gen 2 Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-27ARM: dts: r8a7794: Reserve SRAM for the SMP jump stubGeert Uytterhoeven1-0/+8
Reserve SRAM for the jump stub for CPU core bringup. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r8a7794: Add Inter Connect RAMGeert Uytterhoeven1-0/+10
R-Car E2 has 2 regions of Inter Connect RAM (72 + 4 KiB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12ARM: dts: r8a779x: Fix PCI bus dtc warningsRob Herring1-10/+6
The bogus 'device_type = "pci"' confuses dtc, causing lots of totally unrelated warnings. After fixing that, real warnings like arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0" are left. Correct the unit-addresses and reg properties of the subnodes to fix these. Signed-off-by: Rob Herring <robh@kernel.org> [geert: Improve description] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03ARM: dts: r8a7794: Add Z2 clockGeert Uytterhoeven1-0/+8
Add the Z2 clock (Cortex-A7 CPU core clock), which uses a fixed divider, and link the first CPU node to it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-28ARM: dts: r8a7794: Correct clock of DU1Geert Uytterhoeven1-1/+1
The second channel of the display unit uses a different module clock than the first channel. Fixes: 46c4f13d04d729fa ("ARM: shmobile: r8a7794: Add DU node to device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-28ARM: dts: r8a7794: Add DU1 clock to device treeGeert Uytterhoeven1-3/+5
Add the missing module clock for the second channel of the display unit. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10ARM: dts: r8a7794: Add INTC-SYS clock to device treeGeert Uytterhoeven1-3/+6
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always on" PM Domain, so it can be power managed using that clock. Note that currently the GIC-400 driver doesn't support module clocks nor Runtime PM, so this must be handled as a critical clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07ARM: dts: r8a7794: Remove unit-address and reg from integrated cacheGeert Uytterhoeven1-2/+1
The Cortex-A7 cache controller is an integrated controller, and thus the device node representing it should not have a unit-addresses or reg property. Fixes: 34ea4b4a827b4ee7 ("ARM: dts: r8a7794: Fix W=1 dtc warnings") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-02-07ARM: DTS: Fix register map for virt-capable GICMarc Zyngier1-1/+1
Since everybody copied my own mistake from the DT binding example, let's address all the offenders in one swift go. Most of them got the CPU interface size wrong (4kB, while it should be 8kB), except for both keystone platforms which got the control interface wrong (4kB instead of 8kB). In a few cases where I knew for sure what implementation was used, I've added the "arm,gic-400" compatible string. I'm 99% sure that this is what everyone is using, but short of having the TRM for all the other SoCs, I've left them alone. Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-01-03ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for iic nodesSimon Horman1-2/+4
Use recently added R-Car Gen 2 fallback binding for iic nodes in DT for r8a7794 SoC. This has no run-time effect for the current driver as the initialisation sequence is the same for the SoC-specific binding for r8a7794 and the fallback binding for R-Car Gen 2. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-01-03ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for i2c nodesSimon Horman1-6/+6
Use recently added R-Car Gen 2 fallback binding for i2c nodes in DT for r8a7794 SoC. This has no run-time effect for the current driver as the initialisation sequence is the same for the SoC-specific binding for r8a7794 and the fallback binding for R-Car Gen 2. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-01-03ARM: dts: r8a7794: Use renesas,rcar-gen2-usb-phy fallback bindingSimon Horman1-1/+2
A fallback binding for the Renesas R-Car Gen2 PHY driver was added by commit 7777cb8ba08d ("phy: rcar-gen2: add fallback binding"). This patch makes use of this binding in the DT for the r8a7794 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-12-15Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-37/+44
Pull ARM DT updates from Arnd Bergmann: "Lots of changes as usual, so I'm trying to be brief here. Most of the new hardware support has the respective driver changes merged through other trees or has had it available for a while, so this is where things come together. We get a DT descriptions for a couple of new SoCs, all of them variants of other chips we already support, and usually coming with a new evaluation board: - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices - Qualcomm MDM9615 LTE baseband - NXP imx6ull, the latest and smallest i.MX6 application processor variant - Renesas RZ/G (r8a7743 and r8a7745) application processors - Rockchip PX3, a variant of the rk3188 chip used in Android tablets - Rockchip rk1108 single-core application processor - ST stm32f746 Cortex-M7 based microcontroller - TI DRA71x automotive processors These are commercially available consumer platforms we now support: - Motorola Droid 4 (xt894) mobile phone - Rikomagic MK808 Android TV stick based on Rockchips rx3066 - Cloud Engines PogoPlug v3 based on OX820 - Various Broadcom based wireless devices: - Netgear R8500 router - Tenda AC9 router - TP-LINK Archer C9 V1 - Luxul XAP-1510 Access point - Turris Omnia open hardware router based on Armada 385 And a couple of new boards targeted at developers, makers or industrial integration: - Macnica Sodia development platform for Altera socfpga (Cyclone V) - MicroZed board based on Xilinx Zynq FPGA platforms - TOPEET itop/elite based on exynos4412 - WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615 - NextThing CHIP Pro gadget - NanoPi M1 development board - AM571x-IDK industrial board based on TI AM5718 - i.MX6SX UDOO Neo - Boundary Devices Nitrogen6_SOM2 (i.MX6) - Engicam i.CoreM6 - Grinn i.MX6UL liteSOM/liteBoard - Toradex Colibri iMX6 module Other changes: - added peripherals on renesas, davinci, stm32f429, uniphier, sti, mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm, mvebu, allwinner, broadcom, exynos, zynq - Continued fixes for W=1 dtc warnings - The old STiH415/416 SoC support gets removed, these never made it into products and have served their purpose in the kernel as a template for teh newer chips from ST - The exynos4415 dtsi file is removed as nothing uses it. - Intel PXA25x can now be booted using devicetree" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits) arm: dts: zynq: Add MicroZed board support ARM: dts: da850: enable high speed for mmc ARM: dts: da850: Add node for pullup/pulldown pinconf ARM: dts: da850: enable memctrl and mstpri nodes per board ARM: dts: da850-lcdk: Add ethernet0 alias to DT ARM: dts: artpec: add pcie support ARM: dts: add support for Turris Omnia devicetree: Add vendor prefix for CZ.NIC ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node ARM: dts: berlin2q-marvell-dmp: fix regulators' name ARM: dts: Add xo to sdhc clock node on qcom platforms ARM: dts: r8a7794: Add device node for PRR ARM: dts: r8a7793: Add device node for PRR ARM: dts: r8a7792: Add device node for PRR ARM: dts: r8a7791: Add device node for PRR ARM: dts: r8a7790: Add device node for PRR ARM: dts: r8a7779: Add device node for PRR ARM: dts: r8a73a4: Add device node for PRR ARM: dts: sk-rzg1e: add Ether support ARM: dts: sk-rzg1e: initial device tree ...
2016-11-23ARM: dts: r8a7794: Add device node for PRRGeert Uytterhoeven1-0/+5
Add a device node for the Product Register, which provides SoC product and revision information. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23ARM: dts: r8a7794: Use SYSC "always-on" PM Domain for soundGeert Uytterhoeven1-2/+2
Hook up the Audio-DMAC and sound device nodes to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Cfr. commit 0761ff2ad0c581f3 ("ARM: dts: r8a7794: Add SYSC PM Domains"). Fixes: 320d6c5a08a4abd3 ("ARM: dts: r8a7794: add sound support") Fixes: 298e4ee3d213a076 ("ARM: dts: r8a7794: add Audio-DMAC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23ARM: dts: r8a7794: Correct hsusb parent clockGeert Uytterhoeven1-1/+1
The parent clock of the HSUSB clock is the HP clock, not the MP clock. Fixes: c7bab9f929e51761 ("ARM: shmobile: r8a7794: Add USB clocks to device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04ARM: dts: r8a7794: remove Z clockSergei Shtylyov1-2/+1
R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock... Fixes: 0dce5454d5c2 ("ARM: shmobile: Initial r8a7794 SoC device tree") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04ARM: dts: r8a7794: Fix W=1 dtc warningsGeert Uytterhoeven1-29/+29
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04ARM: dts: r8a7794: Correct SCIFB reg properties to cover all registersGeert Uytterhoeven1-3/+3
Several SCIFB registers reside outside the reported register ranges. Fortunately this works (on Linux), due to the PAGE_SIZE granularity of ioremap(). Extend the sizes from 64 to 0x100 bytes to fix this, like is done on SH/R-Mobile SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04ARM: dts: r8a7794: set maximum frequency for SDHI clocksSimon Horman1-0/+3
Define the upper limit otherwise the driver cannot utilize max speeds. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2016-11-02ARM: dts: r8a7794: Add device node for RST moduleGeert Uytterhoeven1-0/+5
Add a device node for the RST module, which provides a.o. reset control and mode pin monitoring. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-09-05ARM: dts: r8a7794: fix PWM clock parentSergei Shtylyov1-1/+1
When removing the non-existing thermal clock I forgot to remove its parent from the node's "clocks" property -- this led to a wrong PWM clock's parent clock. Fixes: 2a29f9d6fea8 ("ARM: dts: r8a7794: add MSTP5 clocks") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-17ARM: dts: r8a7794: add VSP1 supportSergei Shtylyov1-0/+16
Describe two instances (VSPS and VSPD0) of the VSP1 in the R8A7794 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-09ARM: dts: r8a7794: add sound supportSergei Shtylyov1-0/+181
Define the generic R8A7794 part of the sound device node. This sound device is a complex one and comprises the Audio Clock Generator (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit] (SSI[U]), and Audio DMAC-Peripheral-Peripheral. It is up to the board file to enable the device. This patch is based on the R8A7791 sound work by Kuninori Morimoto. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-09ARM: dts: r8a7794: add Audio-DMAC supportSergei Shtylyov1-0/+28
Describe Audio-DMAC in the R8A7794 device tree. This patch is loosely based on the commit 8994fff67761 ("ARM: shmobile: r8a7791: Add Audio DMAC devices to DT"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-09ARM: dts: r8a7794: add MSTP10 clocksSergei Shtylyov1-0/+52
Add MSTP10 clocks to the R8A7794 device tree. This patch is based on the commit ee9141522dcf ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-09ARM: dts: r8a7794: add MSTP5 clocksSergei Shtylyov1-0/+9
Add some MSTP5 clocks to the R8A7794 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-09ARM: dts: r8a7794: add audio clocksSergei Shtylyov1-0/+21
Describe the external audio clocks (signals AUDIO_CLK[ABC]) required by the sound driver. Boards that provide audio clocks need to override the clock frequencies. This patch is based on the commit 0d3dbde84a45 ("ARM: shmobile: r8a7791: add audio clock on DTSI"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-08ARM: dts: r8a7794: Correct SDHI register sizeSimon Horman1-1/+1
r8a7794 SDHI ch0 has SD_DMACR which is located in 0x324. This patch updates register size Based on work for the r8a7790 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2016-05-30ARM: dts: r8a7794: Fix W=1 dtc warningsGeert Uytterhoeven1-6/+7
Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Move the cache-controller node under the cpus node, and make its unit name and reg property match the MPIDR value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30ARM: dts: r8a7794: Reference both DMA controllersNiklas Söderlund1-44/+75
R-Car Gen2 have two DMA controllers, which are equivalent. Add references to both dmac0 and dmac1 so the driver can choose which one to use. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-24Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-53/+63
Pull ARM SoC late DT updates from Arnd Bergmann: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ...
2016-04-27ARM: dts: r8a7794: Use SYSC "always-on" PM DomainGeert Uytterhoeven1-53/+53
Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27ARM: dts: r8a7794: Add SYSC PM DomainsGeert Uytterhoeven1-0/+10
Add a device node for the System Controller. Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27ARM: dts: r8a7794: Don't disable referenced optional clocksGeert Uytterhoeven1-2/+0
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20ARM: dts: r8a7794: Add IIC nodesSimon Horman1-0/+28
Add IIC nodes to r8a7794 device tree. Based on similar work for the r8a7793 by Laurent Pinchart. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-04-20ARM: dts: r8a7794: add IIC clocksSimon Horman1-3/+6
Add IIC clocks to r8a7794 device tree. Based on similar work for the r8a7790 by Wolfram Sang. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-04-20ARM: dts: r8a7794: add CAN nodes to device treeSimon Horman1-0/+22
Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
2016-04-20ARM: dts: r8a7794: add CAN clocks to device treeSimon Horman1-7/+26
Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
2016-03-28ARM: dts: r8a7794: Remove unnecessary clock-output-names propertiesSimon Horman1-44/+22
* Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-19ARM: dts: r8a7794: add EtherAVB supportSergei Shtylyov1-0/+12
Define the generic R8A7794 part of the EtherAVB device node. Based on the commit 46ece349aa54 ("ARM: shmobile: r8a7791: add EtherAVB DT support"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19ARM: dts: r8a7794: add EtherAVB clockSergei Shtylyov1-3/+4
Add the EtherAVB clock to the R8A7794 device tree. Based on the commit eaa870b30553 ("ARM: shmobile: r8a7791: add EtherAVB clock"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19ARM: dts: r8a7794: Add L2 cache-controller nodeGeert Uytterhoeven1-0/+8
Add a device node for the L2 cache, and link the CPU nodes to it. The L2 cache for the Cortex-A7 CPU cores is 512 KiB large (organized as 64 KiB x 8 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-15ARM: dts: r8a7794: use fallback pci compatibility stringSimon Horman1-2/+2
Use recently added fallback compatibility string in r8a7794 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: r8a7794: Add BRG support for (H)SCIFGeert Uytterhoeven1-18/+36
Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: r8a7794: Rename the serial port clock to fckLaurent Pinchart1-18/+18
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: r8a7794: Add SCIF fallback compatibility stringsGeert Uytterhoeven1-18/+36
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7794: use GIC_* definesSimon Horman1-117/+117
Use GIC_* defines for GIC interrupt cells in r8a7794 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-01-25ARM: dts: r8a7794: use fallback usbhs compatibility stringSimon Horman1-1/+1
Use recently added fallback compatibility string in r8a7794 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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